coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

1 participants
3269 discussions

[S] Change in coreboot[main]: soc/mediatek/mt8196: Add vcore DVFS settings
by Paul Menzel (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Paul Menzel has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86070?usp=email ) Change subject: soc/mediatek/mt8196: Add vcore DVFS settings ...................................................................... Patch Set 4: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86070/comment/07e3229a_e283f9ee?us… : PS4, Line 9: other tinysys Sorry, I do not understand. What is “other tinysys”? https://review.coreboot.org/c/coreboot/+/86070/comment/41d20910_84203a4c?us… : PS4, Line 15: Signed-off-by: kunlong.wang(a)mediatek.corp-partner.google.com Please add the name. https://review.coreboot.org/c/coreboot/+/86070/comment/9d5b5295_03fc2b80?us… : PS4, Line 16: As Jarried is denoted as the author, their Signed-off-by line should also be added. -- To view, visit https://review.coreboot.org/c/coreboot/+/86070?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d3e1d6ea648af938d41a5c9461cdd2972371177 Gerrit-Change-Number: 86070 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kunlong Wang <kunlong.wang(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 11:02:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/google/rauru: Add panel driver in mainboard
by Yidi Lin (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85951?usp=email ) Change subject: mb/google/rauru: Add panel driver in mainboard ...................................................................... Patch Set 13: (1 comment) File src/mainboard/google/rauru/panel.c: https://review.coreboot.org/c/coreboot/+/85951/comment/5609a306_143b8a71?us… : PS13, Line 14: GPIO_AP_EDP_BKLTEN > I’d expected a _ before EN. The naming is from the schematic provided by ODM. -- To view, visit https://review.coreboot.org/c/coreboot/+/85951?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea610c97351beb94a49cc1044701a523b7c85a6e Gerrit-Change-Number: 85951 Gerrit-PatchSet: 13 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jitao Shi <jitao.shi(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 11:01:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: mb/google/brya/var/uldrenite: Update HDA verb tables
by Paul Menzel (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro, Subrata Banik. Paul Menzel has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/86079?usp=email ) Change subject: mb/google/brya/var/uldrenite: Update HDA verb tables ...................................................................... Patch Set 1: (4 comments) Patchset: PS1: Please make the style changes a separate commit. Commit Message: https://review.coreboot.org/c/coreboot/+/86079/comment/d9905c48_a1fbea30?us… : PS1, Line 7: Update HDA verb tables Remove location setting in HDA verb tables File src/mainboard/google/brya/variants/uldrenite/hda_verb.c: https://review.coreboot.org/c/coreboot/+/86079/comment/52eb82a7_df295df6?us… : PS1, Line 7: 0x10ec0236, // Codec Vendor ID: Realtek ALC3204 Unrelated. Should be a separate patch with a tab instead of spaces. https://review.coreboot.org/c/coreboot/+/86079/comment/3ce9180f_eb98ceba?us… : PS1, Line 32: AZALIA_PIN_CFG(0, 0x21, 0x00211020), Gerrit highlights the line. What changed here? -- To view, visit https://review.coreboot.org/c/coreboot/+/86079?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I05767ac80c2e3d609f944d0f669fcb343c1991ef Gerrit-Change-Number: 86079 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 21 Jan 2025 11:00:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/google/rauru: Add panel driver in mainboard
by Paul Menzel (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin. Paul Menzel has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85951?usp=email ) Change subject: mb/google/rauru: Add panel driver in mainboard ...................................................................... Patch Set 13: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85951/comment/df0ad619_33ca9a9a?us… : PS13, Line 13: EQ training pass No more logs regarding the detected panel? File src/mainboard/google/rauru/panel.c: https://review.coreboot.org/c/coreboot/+/85951/comment/29daf741_a0459079?us… : PS13, Line 14: GPIO_AP_EDP_BKLTEN I’d expected a _ before EN. -- To view, visit https://review.coreboot.org/c/coreboot/+/85951?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea610c97351beb94a49cc1044701a523b7c85a6e Gerrit-Change-Number: 85951 Gerrit-PatchSet: 13 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jitao Shi <jitao.shi(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 10:57:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/intel/alderlake: Change the maximum C state to C8
by Paul Menzel (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Jayvik Desai, Matt DeVillier, Michał Żygowski, Nick Vaccaro, Sean Rhodes, Subrata Banik. Paul Menzel has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84622?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: soc/intel/alderlake: Change the maximum C state to C8 ...................................................................... Patch Set 8: (1 comment) Patchset: PS6: > I don't see any issue with making non-S0iX based platform use C8 which is supported as per the Alder […] Sean, maybe you could summarize this in the commit message. Especially the copy-paste and the EDS note. -- To view, visit https://review.coreboot.org/c/coreboot/+/84622?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb3e4d34361c8ac25ef144c0d1cda9f801ed0c54 Gerrit-Change-Number: 84622 Gerrit-PatchSet: 8 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 21 Jan 2025 10:55:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add thermal driver
by Paul Menzel (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Jarried Lin. Paul Menzel has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86017?usp=email ) Change subject: soc/mediatek/mt8196: Add thermal driver ...................................................................... Patch Set 11: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86017/comment/eb99e7ad_60fc098a?us… : PS8, Line 9: Add thermal driver to support LVTS (Low Voltage Thermal Sensor). > The other SOC also have such driver, but only have kernel part. […] Why? coreboot’s design goal is to do as few things as possible. If something can be done in the OS/kernel it should be done there. Please add such things in the future to the commit message. -- To view, visit https://review.coreboot.org/c/coreboot/+/86017?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ieef94a6909e4da82461351bcb9292e9d01db3362 Gerrit-Change-Number: 86017 Gerrit-PatchSet: 11 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 10:53:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: mb/google/brya/baseboard/trulo: Disable GPIO dynamic clock gating
by Paul Menzel (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Subrata Banik. Paul Menzel has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/85818?usp=email ) Change subject: mb/google/brya/baseboard/trulo: Disable GPIO dynamic clock gating ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85818/comment/a4ada477_dbc576fe?us… : PS1, Line 20: TEST=Verified that GPIO dynamic clock gating is disabled by dumping the : GPIO community MISC_CONFIGURATION registers. What is the expected downside on power usage? -- To view, visit https://review.coreboot.org/c/coreboot/+/85818?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5e853f12a0c78d8d179faba0cef4c99128296f2f Gerrit-Change-Number: 85818 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Yuval Peress <peress(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 21 Jan 2025 10:42:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: util/crossgcc: Update variable use
by Elyes Haouas (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Jon Murphy, Martin L Roth. Elyes Haouas has posted comments on this change by Jon Murphy. ( https://review.coreboot.org/c/coreboot/+/85718?usp=email ) Change subject: util/crossgcc: Update variable use ...................................................................... Patch Set 2: (1 comment) File util/crossgcc/buildgcc: https://review.coreboot.org/c/coreboot/+/85718/comment/00c17e93_752290ff?us… : PS2, Line 873: "$DESTDIR" would you please teach me why you did this modification here and not at lines #665, #683, ... #854 ? Thx -- To view, visit https://review.coreboot.org/c/coreboot/+/85718?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9eb833b11f20b72db88e4094a3297a1d8891bac2 Gerrit-Change-Number: 85718 Gerrit-PatchSet: 2 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 10:41:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Add vcore DVFS settings
by Kunlong Wang (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Kunlong Wang has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86070?usp=email ) Change subject: soc/mediatek/mt8196: Add vcore DVFS settings ...................................................................... Patch Set 4: (1 comment) File src/soc/mediatek/mt8196/include/soc/mtk_vcore_opp.h: https://review.coreboot.org/c/coreboot/+/86070/comment/add5b9d5_3ef4d96e?us… : PS1, Line 8: > Explain what "opp" means. OPP(Operating Performance Points), same as cpu dvfs opp -- To view, visit https://review.coreboot.org/c/coreboot/+/86070?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d3e1d6ea648af938d41a5c9461cdd2972371177 Gerrit-Change-Number: 86070 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kunlong Wang <kunlong.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 10:28:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Add vcore DVFS settings
by Jarried Lin (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86070?usp=email ) Change subject: soc/mediatek/mt8196: Add vcore DVFS settings ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/mt8196/dvfsrc.c: https://review.coreboot.org/c/coreboot/+/86070/comment/c5f9806c_f3ac6d84?us… : PS3, Line 4: #include <delay.h> > No need. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86070?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d3e1d6ea648af938d41a5c9461cdd2972371177 Gerrit-Change-Number: 86070 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 10:25:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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