coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

1 participants
3270 discussions

[S] Change in coreboot[main]: mb/brya/var/uldrenite: Remove location setting in HDA verb tables
by John Su (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Dinesh Gehlot, Dtrain Hsu, Eric Lai, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro, Subrata Banik. Hello Dinesh Gehlot, Dtrain Hsu, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86079?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+2 by Dtrain Hsu, Verified-1 by build bot (Jenkins) Change subject: mb/brya/var/uldrenite: Remove location setting in HDA verb tables ...................................................................... mb/brya/var/uldrenite: Remove location setting in HDA verb tables Update the HDA verb table to remove the location setting for uldrenite. BUG=b:374203133 TEST=emerge-nissa coreboot Change-Id: I05767ac80c2e3d609f944d0f669fcb343c1991ef Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/variants/uldrenite/hda_verb.c 1 file changed, 14 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/86079/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86079?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I05767ac80c2e3d609f944d0f669fcb343c1991ef Gerrit-Change-Number: 86079 Gerrit-PatchSet: 2 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

1 0

[M] Change in coreboot[main]: mb/amd/birman_plus/ec: register bits
by Ana Carolina Cabral (Code Review) 21 Jan '25

21 Jan '25

Ana Carolina Cabral has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86084?usp=email ) Change subject: mb/amd/birman_plus/ec: register bits ...................................................................... mb/amd/birman_plus/ec: register bits Rectify wrong EC module ECRAM registers bits based on PI source code 1.0.0.1b Change-Id: I1a13d99a55a4aa02a5cb0e67ffa4ed555f91a471 Signed-off-by: Ana Carolina Cabral <ana.cabral(a)amd.com> --- M src/mainboard/amd/birman_plus/ec.c 1 file changed, 37 insertions(+), 41 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/86084/1 diff --git a/src/mainboard/amd/birman_plus/ec.c b/src/mainboard/amd/birman_plus/ec.c index 1fc5e3e..e02be05 100644 --- a/src/mainboard/amd/birman_plus/ec.c +++ b/src/mainboard/amd/birman_plus/ec.c @@ -8,6 +8,9 @@ #define BIRMAN_EC_CMD 0x666 #define BIRMAN_EC_DATA 0x662 +#define EC_GPIO_0_ADDR 0xA0 +#define EC0_EVAL_PRSNTn BIT(2) + #define EC_GPIO_1_ADDR 0xA1 #define EC1_EVAL_PWREN BIT(1) @@ -23,22 +26,25 @@ #define EC3_LOM_RST_AUX BIT(1) #define EC3_EVAL_RST_AUX BIT(0) +#define EC_GPIO_6_ADDR 0xA6 +#define EC6_TPNL_BUF_EN BIT(1) +#define EC6_TPAD_BUF_EN BIT(0) + #define EC_GPIO_7_ADDR 0xA7 #define EC7_WWAN_PWR_OFF_N BIT(7) -#define EC7_BT_RADIO_DIS BIT(2) -#define EC7_WL_RADIO_DIS BIT(0) +#define EC7_BT_RADIO_DIS BIT(2) +#define EC7_WL_RADIO_DIS_N BIT(0) #define EC_GPIO_8_ADDR 0xA8 #define EC8_ADAPTER_OFF BIT(5) #define EC8_EVAL_SMBUS1_N_SW BIT(3) #define EC8_MP2_SEL BIT(2) -#define EC8_DT_N_SSD1_SW BIT(1) #define EC_GPIO_9_ADDR 0xA9 #define EC9_CAM0_PWR_EN BIT(7) #define EC9_CAM1_PWR_EN BIT(6) -#define EC9_WWAN_RST BIT(5) -#define EC9_DT_PWREN BIT(2) +#define EC9_WWAN_RST_N BIT(5) +#define EC9_SSD1_PWREN BIT(2) #define EC9_TPM_PWR_EN BIT(1) #define EC9_TPM_S0I3_N BIT(0) @@ -52,15 +58,9 @@ #define ECA_SMBUS1_EN BIT(1) #define ECA_SMBUS0_EN BIT(0) -#define EC_GPIO_C_ADDR 0xAC -#define ECC_TPNL_BUF_EN BIT(6) -#define ECC_TPAD_BUF_EN BIT(5) -#define ECC_NFC_BUF_EN BIT(4) - #define EC_GPIO_D_ADDR 0xAD #define ECD_TPNL_PWR_EN BIT(7) #define ECD_TPNL_EN BIT(6) -#define ECD_SSD1_PWR_EN BIT(5) #define ECD_FPR_PWR_EN BIT(3) #define ECD_FPR_OFF_N BIT(2) #define ECD_FPR_LOCK_N BIT(1) @@ -73,19 +73,19 @@ #define ECE_WLAN_PWR_EN BIT(4) #define ECE_WWAN_PWR_EN BIT(3) #define ECE_CAM_PWR_EN BIT(2) -#define ECE_FPR_N_GBE_SEL BIT(1) -#define ECE_BT_N_TPNL_SEL BIT(0) +#define ECE_FPR_N_GBE_SEL BIT(1) //USB5_MUX_FPR#_GBE_SEL +#define ECE_BT_N_TPNL_SEL BIT(0) //USB6_MUX_BT#_TPNL_SEL #define EC_GPIO_F_ADDR 0xAF #define ECF_CAM_FW_WP_N BIT(7) #define ECF_I2C_MUX_OE_N BIT(4) -#define ECF_WLAN0_N_WWAN1_SW BIT(1) -#define ECF_WWAN0_N_WLAN1_SW BIT(0) +#define ECF_SDE_N_WLAN1_SW BIT(1) +#define ECF_GBE_N_WWAN1_SW BIT(0) #define EC_GPIO_G_ADDR 0xB0 #define ECG_IR_LED_PWR_EN BIT(7) #define ECG_U0_WLAN_HDR_SEL BIT(6) -#define ECG_DT_SSD1_MUX_OFF BIT(5) +#define ECG_NFC_BUF_EN BIT(5) #define ECG_WLAN_WWAN_MUX_OFF BIT(4) static void configure_ec_gpio(void) @@ -124,13 +124,13 @@ tmp = ec_read(EC_GPIO_7_ADDR); tmp &= ~EC7_BT_RADIO_DIS; - tmp &= ~EC7_WL_RADIO_DIS; - tmp |= EC7_WWAN_PWR_OFF_N; + tmp |= EC7_WWAN_PWR_OFF_N | EC7_WL_RADIO_DIS_N; printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_7_ADDR, tmp); ec_write(EC_GPIO_7_ADDR, tmp); tmp = ec_read(EC_GPIO_9_ADDR); - tmp |= EC9_CAM0_PWR_EN | EC9_CAM1_PWR_EN | EC9_WWAN_RST | EC9_TPM_PWR_EN | EC9_DT_PWREN; + tmp &= ~EC9_WWAN_RST_N; + tmp |= EC9_CAM0_PWR_EN | EC9_CAM1_PWR_EN | EC9_TPM_PWR_EN | EC9_SSD1_PWREN; printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_9_ADDR, tmp); ec_write(EC_GPIO_9_ADDR, tmp); @@ -138,10 +138,10 @@ printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_A_ADDR, tmp); ec_write(EC_GPIO_A_ADDR, tmp); - tmp = ec_read(EC_GPIO_C_ADDR); - tmp |= ECC_TPNL_BUF_EN | ECC_TPAD_BUF_EN | ECC_NFC_BUF_EN; - printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_C_ADDR, tmp); - ec_write(EC_GPIO_C_ADDR, tmp); + tmp = ec_read(EC_GPIO_6_ADDR); + tmp |= EC6_TPNL_BUF_EN | EC6_TPAD_BUF_EN; + printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_6_ADDR, tmp); + ec_write(EC_GPIO_6_ADDR, tmp); tmp = ec_read(EC_GPIO_D_ADDR); tmp |= ECD_TPNL_PWR_EN | ECD_TPNL_EN | ECD_TPAD_DISABLE_N; @@ -149,40 +149,36 @@ ec_write(EC_GPIO_D_ADDR, tmp); tmp = ec_read(EC_GPIO_E_ADDR); - tmp |= ECE_LOM_PWR_EN | ECE_SSD0_PWR_EN | ECE_SD_PWR_EN; + tmp |= ECE_LOM_PWR_EN | ECE_SSD0_PWR_EN | ECE_SD_PWR_EN | ECE_WLAN_PWR_EN | ECE_WWAN_PWR_EN; tmp |= ECE_CAM_PWR_EN | ECE_FPR_N_GBE_SEL; tmp &= ~ECE_BT_N_TPNL_SEL; if (CONFIG(WLAN01_BIRMANPLUS)) { // no WWAN, turn off WWAN power tmp &= ~ECE_WWAN_PWR_EN; - } else { - tmp |= ECE_WWAN_PWR_EN; } - if (CONFIG(WWAN01_BIRMANPLUS)) { // no WLAN, turn off WLAN power + + if (CONFIG(DISABLE_WLAN_SD_BIRMANPLUS)) { // no WLAN, turn off WLAN power tmp &= ~ECE_WLAN_PWR_EN; - } else { - tmp |= ECE_WLAN_PWR_EN; } + printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_E_ADDR, tmp); ec_write(EC_GPIO_E_ADDR, tmp); tmp = ec_read(EC_GPIO_F_ADDR); - if (CONFIG(WLAN01_BIRMANPLUS)) { - tmp |= ECF_WWAN0_N_WLAN1_SW; - } else { - tmp &= ~ECF_WWAN0_N_WLAN1_SW; + tmp |= ECF_GBE_N_WWAN1_SW | ECF_SDE_N_WLAN1_SW; // Default SDCard x1 WLAN x1 and GBE x1 WWAN x1 + + if (CONFIG(ENABLE_WLAN02_BIRMANPLUS)) { + tmp &= ~ECF_GBE_N_WWAN1_SW; // Enable x2 WLAN, SD disable } - if (CONFIG(WWAN01_BIRMANPLUS)) { - tmp |= ECF_WLAN0_N_WWAN1_SW; - } else { - tmp &= ~ECF_WLAN0_N_WWAN1_SW; + + if (CONFIG(ENABLE_WWAN02_BIRMANPLUS)) { + tmp &= ~ECF_SDE_N_WLAN1_SW; // Enable x2 WWAN, GBE disable } printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_F_ADDR, tmp); ec_write(EC_GPIO_F_ADDR, tmp); - tmp = ec_read(EC_GPIO_G_ADDR); - tmp &= ~ECG_DT_SSD1_MUX_OFF; - tmp &= ~ECG_WLAN_WWAN_MUX_OFF; - tmp |= ECG_IR_LED_PWR_EN | ECG_U0_WLAN_HDR_SEL; + tmp = ec_read(EC_GPIO_G_ADDR); + tmp &= ~ECG_WLAN_WWAN_MUX_OFF; // Keep low to avoid GPP13, GPP14 not work. + tmp |= ECG_IR_LED_PWR_EN | ECG_U0_WLAN_HDR_SEL | ECG_NFC_BUF_EN; printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_G_ADDR, tmp); ec_write(EC_GPIO_G_ADDR, tmp); } -- To view, visit https://review.coreboot.org/c/coreboot/+/86084?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1a13d99a55a4aa02a5cb0e67ffa4ed555f91a471 Gerrit-Change-Number: 86084 Gerrit-PatchSet: 1 Gerrit-Owner: Ana Carolina Cabral

1 0

[M] Change in coreboot[main]: mb/amd/birman_plus: Kconfig
by Ana Carolina Cabral (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Ana Carolina Cabral. Hello Felix Held, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85493?usp=email to look at the new patch set (#13). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/amd/birman_plus: Kconfig ...................................................................... mb/amd/birman_plus: Kconfig Rectify board configuration flags based on the schematics Doc. 105-D99700-00C and User Guide #58168 (NDA). Change-Id: Ia310ea616006479b9a052afb99d08df6a11431f4 Signed-off-by: Ana Carolina Cabral <ana.cabral(a)amd.com> --- M src/mainboard/amd/birman_plus/Kconfig M src/mainboard/amd/birman_plus/ec.c M src/mainboard/amd/birman_plus/port_descriptors_glinda.c 3 files changed, 33 insertions(+), 49 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/85493/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/85493?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia310ea616006479b9a052afb99d08df6a11431f4 Gerrit-Change-Number: 85493 Gerrit-PatchSet: 13 Gerrit-Owner: Ana Carolina Cabral Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ana Carolina Cabral

1 0

[S] Change in coreboot[main]: mb/*: Drop xhci_overcurrent_mapping for the easy ones
by Keith Hui (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Alexander Couzens, Elyes Haouas, Kevin Keijzer, Nicholas Chin, Patrick Rudolph, Paul Menzel. Keith Hui has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85923?usp=email ) Change subject: mb/*: Drop xhci_overcurrent_mapping for the easy ones ...................................................................... Patch Set 5: (2 comments) File src/mainboard/lenovo/t430s/devicetree.cb: https://review.coreboot.org/c/coreboot/+/85923/comment/1148e70c_2cf2d9c2?us… : PS4, Line 46: > Please, why this extra empty line? Was a sed leftover. Thanks for the catch. https://review.coreboot.org/c/coreboot/+/85923/comment/9e61d4fd_79e08fad?us… : PS4, Line 46: > Please, why this extra empty line? Was a sed leftover. Thanks for the catch. -- To view, visit https://review.coreboot.org/c/coreboot/+/85923?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I36944e2f2ed265ee492019b75b7dd8b95ca26dbb Gerrit-Change-Number: 85923 Gerrit-PatchSet: 5 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 21 Jan 2025 13:08:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr>

1 0

[S] Change in coreboot[main]: mb/*: Drop xhci_overcurrent_mapping for the easy ones
by Keith Hui (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Alexander Couzens, Keith Hui, Kevin Keijzer, Nicholas Chin, Patrick Rudolph, Paul Menzel. Hello Alexander Couzens, Kevin Keijzer, Nicholas Chin, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85923?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+2 by Patrick Rudolph, Verified+1 by build bot (Jenkins) Change subject: mb/*: Drop xhci_overcurrent_mapping for the easy ones ...................................................................... mb/*: Drop xhci_overcurrent_mapping for the easy ones This is now copied from USBOCM1 built with main USB port config. Boards patched here have matching EHCI and xHCI overcurrent mappings. Change-Id: I36944e2f2ed265ee492019b75b7dd8b95ca26dbb Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/mainboard/asrock/b75m-itx/devicetree.cb M src/mainboard/asrock/b75pro3-m/devicetree.cb M src/mainboard/asrock/h77pro4-m/devicetree.cb M src/mainboard/asus/p8x7x-series/devicetree.cb M src/mainboard/compulab/intense_pc/devicetree.cb M src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb M src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb M src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb M src/mainboard/dell/snb_ivb_latitude/variants/e6430/overridetree.cb M src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb M src/mainboard/gigabyte/ga-b75m-d3h/variants/ga-b75-d3v/overridetree.cb M src/mainboard/hp/snb_ivb_desktops/variants/compaq_elite_8300_usdt/overridetree.cb M src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb M src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb M src/mainboard/lenovo/s230u/devicetree.cb M src/mainboard/lenovo/t430/devicetree.cb M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb M src/mainboard/lenovo/x230/devicetree.cb M src/mainboard/roda/rv11/variants/rv11/devicetree.cb M src/mainboard/roda/rv11/variants/rw11/devicetree.cb M src/mainboard/supermicro/x9sae/devicetree.cb 28 files changed, 0 insertions(+), 28 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/85923/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/85923?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I36944e2f2ed265ee492019b75b7dd8b95ca26dbb Gerrit-Change-Number: 85923 Gerrit-PatchSet: 5 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Keith Hui <buurin(a)gmail.com>

1 0

[XS] Change in coreboot[main]: mb/*: Drop xhci_overcurrent_mapping for the hard ones
by Keith Hui (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Alexander Couzens, Michał Żygowski, Nicholas Chin, Riku Viitanen. Hello Alexander Couzens, Michał Żygowski, Nicholas Chin, Patrick Rudolph, Riku Viitanen, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85924?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/*: Drop xhci_overcurrent_mapping for the hard ones ...................................................................... mb/*: Drop xhci_overcurrent_mapping for the hard ones This is now copied from USBOCM1 built with main USB port config. Boards to be patched here have mismatched xhci_overcurrent_map and needs manual review and/or testing. Change-Id: Ie60d34cae5ae94d148854b42f77ab4c02e8f49ef Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb M src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/overridetree.cb 2 files changed, 0 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/85924/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/85924?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie60d34cae5ae94d148854b42f77ab4c02e8f49ef Gerrit-Change-Number: 85924 Gerrit-PatchSet: 5 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Michał Żygowski <miczyg94(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Attention: Michał Żygowski <miczyg94(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com>

1 0

[M] Change in coreboot[main]: mb/google/rauru: Add panel driver in mainboard
by Yu-Ping Wu (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85951?usp=email ) Change subject: mb/google/rauru: Add panel driver in mainboard ...................................................................... Patch Set 14: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85951?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea610c97351beb94a49cc1044701a523b7c85a6e Gerrit-Change-Number: 85951 Gerrit-PatchSet: 14 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Gerrit-CC: Jitao Shi <jitao.shi(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 12:41:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[S] Change in coreboot[main]: soc/mediatek/mt8196: Add vcore DVFS settings
by Jarried Lin (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Kunlong Wang, Paul Menzel, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86070?usp=email ) Change subject: soc/mediatek/mt8196: Add vcore DVFS settings ...................................................................... Patch Set 5: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86070/comment/61c664e6_ee48730a?us… : PS4, Line 9: other tinysys > Sorry, I do not understand. […] Done https://review.coreboot.org/c/coreboot/+/86070/comment/a81b507e_c9f9c7cb?us… : PS4, Line 11: TEST=Build pass. > Are you able to run-time test? Done https://review.coreboot.org/c/coreboot/+/86070/comment/b61703be_9120448a?us… : PS4, Line 15: Signed-off-by: kunlong.wang(a)mediatek.corp-partner.google.com > Please add the name. Acknowledged https://review.coreboot.org/c/coreboot/+/86070/comment/a7a8e1d2_079a209e?us… : PS4, Line 16: > As Jarried is denoted as the author, their Signed-off-by line should also be added. Thanks paul,since the main effort is on Kunlong, I believe the current sign-off should be fine. -- To view, visit https://review.coreboot.org/c/coreboot/+/86070?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d3e1d6ea648af938d41a5c9461cdd2972371177 Gerrit-Change-Number: 86070 Gerrit-PatchSet: 5 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Kunlong Wang <kunlong.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kunlong Wang <kunlong.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 12:37:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

1 0

[S] Change in coreboot[main]: soc/mediatek/mt8196: Add vcore DVFS settings
by Jarried Lin (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Kunlong Wang, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Kunlong Wang, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86070?usp=email to look at the new patch set (#5). Change subject: soc/mediatek/mt8196: Add vcore DVFS settings ...................................................................... soc/mediatek/mt8196: Add vcore DVFS settings Add vcore settings, so that other tinysys (such as mcupm, spm, etc.) will reference these value during initialization. BUG=b:343878736 TEST=Build pass, boot successful. Check log with: [INFO] Vcore DVFS settings done Change-Id: I0d3e1d6ea648af938d41a5c9461cdd2972371177 Signed-off-by: kunlong.wang(a)mediatek.corp-partner.google.com --- M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/dvfsrc.c M src/soc/mediatek/mt8196/include/soc/addressmap.h A src/soc/mediatek/mt8196/include/soc/dvfsrc.h 4 files changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/86070/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/86070?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d3e1d6ea648af938d41a5c9461cdd2972371177 Gerrit-Change-Number: 86070 Gerrit-PatchSet: 5 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Kunlong Wang <kunlong.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Kunlong Wang <kunlong.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

1 0

[XS] Change in coreboot[main]: CFR: Add version field to root struct
by Filip Brozovic (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Angel Pons, Matt DeVillier, Sean Rhodes. Filip Brozovic has posted comments on this change by Filip Brozovic. ( https://review.coreboot.org/c/coreboot/+/86080?usp=email ) Change subject: CFR: Add version field to root struct ...................................................................... Patch Set 2: (2 comments) File src/commonlib/include/commonlib/cfr.h: https://review.coreboot.org/c/coreboot/+/86080/comment/05361bbc_497cbe1a?us… : PS1, Line 52: 0x00010000 > We can start at 0 Done File src/commonlib/include/commonlib/coreboot_tables.h: https://review.coreboot.org/c/coreboot/+/86080/comment/ac04ec05_06cc5fda?us… : PS1, Line 605: major and minor > I don't think we need a major/minor distinction. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86080?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifcb950f1bdedc0ab925f3841befb7e7001c0f7f4 Gerrit-Change-Number: 86080 Gerrit-PatchSet: 2 Gerrit-Owner: Filip Brozovic <fbrozovic(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 11:49:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2025