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Change subject: soc/mediatek/mt8196: Add unmask eint event for bootblock
......................................................................
Patch Set 14:
(3 comments)
File src/soc/mediatek/common/eint_event.c:
https://review.coreboot.org/c/coreboot/+/84025/comment/7c122141_85b8bb1a?us… :
PS14, Line 10: 0x880
If this is shared with mt8196, please add `#define EINT_EVENT_MASK_CLEAR_OFFSET 0x880` to eint_event.h.
File src/soc/mediatek/mt8196/eint_event.c:
https://review.coreboot.org/c/coreboot/+/84025/comment/7c15af1d_d4e4cf5b?us… :
PS14, Line 16: static void eint_clear_event_mask(uintptr_t base, unsigned int port_num)
This function looks quite similar to the common `unmask_eint_event_mask`. The `eint_event_mask_clr` array is of type u32, so `+ i * NEXT_ADDRESS` is equivalent to `eint_event_mask_clr[i]`.
Can we move this function to common code, and then the common `unmask_eint_event_mask` function can call this function, with `port_num` being `ARRAY_SIZE(mtk_eint_event->eint_event_mask_clr)`.
https://review.coreboot.org/c/coreboot/+/84025/comment/28190ed6_8ad2a45a?us… :
PS14, Line 26: eint_clear_event_mask(EINT_E_BASE, MAX_E);
Define an array of pairs `(base, port_num)` and use a for loop.
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Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#14).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: soc/mediatek/mt8196: Add unmask eint event for bootblock
......................................................................
soc/mediatek/mt8196: Add unmask eint event for bootblock
EINT event mask register is used to mask EINT wakeup source.
All wakeup sources are masked by default. Since most MediaTek SoCs do
not have this design, we can't modify the kernel EINT upstream driver to
solve the issue 'Can't wake using power button (cros_ec) or touchpad'.
So we add a driver here to unmask all wakeup sources.
TEST=write eint data successfully.
BUG=b:31709620
Change-Id: I4bf3820a89172186b8f51591f8760787affbb7a3
Signed-off-by: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com>
---
M src/soc/mediatek/common/eint_event.c
M src/soc/mediatek/common/include/soc/eint_event.h
M src/soc/mediatek/mt8196/Makefile.mk
M src/soc/mediatek/mt8196/bootblock.c
A src/soc/mediatek/mt8196/eint_event.c
M src/soc/mediatek/mt8196/include/soc/addressmap.h
6 files changed, 47 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/84025/14
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Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/blobs/+/84029?usp=email )
(
4 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: soc/mediatek/mt8196: Add MCUPM firmware v1.0
......................................................................
soc/mediatek/mt8196: Add MCUPM firmware v1.0
Add mcupm.bin initial version.
TEST=NA
BUG=b:317009620
Change-Id: I639eb495e3499e0ed886368e6581031baaec0b9d
Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com>
---
M soc/mediatek/mt8196/README.md
A soc/mediatek/mt8196/mcupm.bin
A soc/mediatek/mt8196/mcupm.bin.md5
A soc/mediatek/mt8196/mcupm_release_notes.txt
4 files changed, 23 insertions(+), 0 deletions(-)
Approvals:
Yu-Ping Wu: Verified; Looks good to me, approved
Yidi Lin: Looks good to me, but someone else must approve
diff --git a/soc/mediatek/mt8196/README.md b/soc/mediatek/mt8196/README.md
index 19e17e3..bdc850b 100644
--- a/soc/mediatek/mt8196/README.md
+++ b/soc/mediatek/mt8196/README.md
@@ -1,9 +1,27 @@
# Firmware list
+- mcupm.bin
- sspm.bin
- dpm.dm
- dpm.pm
--------------------------------------------------------------------------------
+# MCUPM introduction
+MCUPM is a hardware module which is used for MCUSYS Power Management.
+MCUPM firmware (`mcupm.bin`) is loaded into MCUPM SRAM at system initialization.
+
+## Who uses it
+Coreboot will load MCUPM at ramstage. It will copy mcupm.bin to MCUPM SRAM.
+
+## How to load `mcupm.bin`
+Use CBFS to load `mcupm.bin`, then set normal boot flag and release software reset pin of MCUPM.
+
+## Return values
+No return value.
+
+## Version
+`$ strings mcupm.bin | grep "MCUPM firmware"`
+
+--------------------------------------------------------------------------------
# SSPM introduction
SSPM is "Secure System Power Manager" that provides power control in secure domain.
SSPM provides power related features, e.g. CPU DVFS, thermal control, to offload
diff --git a/soc/mediatek/mt8196/mcupm.bin b/soc/mediatek/mt8196/mcupm.bin
new file mode 100644
index 0000000..df4ea8f
--- /dev/null
+++ b/soc/mediatek/mt8196/mcupm.bin
Binary files differ
diff --git a/soc/mediatek/mt8196/mcupm.bin.md5 b/soc/mediatek/mt8196/mcupm.bin.md5
new file mode 100644
index 0000000..a30b9f0
--- /dev/null
+++ b/soc/mediatek/mt8196/mcupm.bin.md5
@@ -0,0 +1 @@
+5b8708510dc7d2f305791fdf286c2d42 *mcupm.bin
diff --git a/soc/mediatek/mt8196/mcupm_release_notes.txt b/soc/mediatek/mt8196/mcupm_release_notes.txt
new file mode 100644
index 0000000..f3b09fd
--- /dev/null
+++ b/soc/mediatek/mt8196/mcupm_release_notes.txt
@@ -0,0 +1,4 @@
+** Build from MediaTek Internal **
+
+# Version 1.0
+1. Initial release.
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Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/blobs/+/84028?usp=email )
Change subject: soc/mediatek/mt8196: Add dpm.pm and dpm.dm version 1.0
......................................................................
soc/mediatek/mt8196: Add dpm.pm and dpm.dm version 1.0
See the README file for details.
Change-Id: I91c34f105992f38aa42521f7e11f42a4ccb81856
Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com>
---
M soc/mediatek/mt8196/README.md
A soc/mediatek/mt8196/dpm.dm
A soc/mediatek/mt8196/dpm.dm.md5
A soc/mediatek/mt8196/dpm.pm
A soc/mediatek/mt8196/dpm.pm.md5
A soc/mediatek/mt8196/dpm_release_notes.txt
6 files changed, 37 insertions(+), 0 deletions(-)
Approvals:
Yidi Lin: Looks good to me, but someone else must approve
Yu-Ping Wu: Verified; Looks good to me, approved
diff --git a/soc/mediatek/mt8196/README.md b/soc/mediatek/mt8196/README.md
index 3f60df8..19e17e3 100644
--- a/soc/mediatek/mt8196/README.md
+++ b/soc/mediatek/mt8196/README.md
@@ -1,5 +1,7 @@
# Firmware list
- sspm.bin
+- dpm.dm
+- dpm.pm
--------------------------------------------------------------------------------
# SSPM introduction
@@ -23,3 +25,32 @@
`$ strings sspm.bin | grep "SSPM firmware"`
--------------------------------------------------------------------------------
+# DPM introduction
+DPM is a hardware module for DRAM Power Management, which is used for DRAM low power.
+For example: self refresh, disable PLL/DLL when not in use.
+
+DPM includes two parts of images: data part (`dpm.dm`) and program part (`dpm.pm`).
+
+## Who uses it
+Coreboot loads dpm at ramstage, and copies `dpm.dm` & `dpm.pm` to DPM SRAM.
+
+## How to load DPM
+Use CBFS to load `dpm.dm` and `dpm.pm`.
+No need to pass other parameters to DPM.
+
+## Return values
+No return value.
+
+## Add version
+```
+$ echo -n 'DPMD Firmware version: x.x' >> dpm.dm
+$ echo -n 'DPMP Firmware version: x.x' >> dpm.pm
+```
+
+## Version
+```
+$ strings dpm.dm | grep version
+$ strings dpm.pm | grep version
+```
+
+--------------------------------------------------------------------------------
diff --git a/soc/mediatek/mt8196/dpm.dm b/soc/mediatek/mt8196/dpm.dm
new file mode 100644
index 0000000..2e13794
--- /dev/null
+++ b/soc/mediatek/mt8196/dpm.dm
Binary files differ
diff --git a/soc/mediatek/mt8196/dpm.dm.md5 b/soc/mediatek/mt8196/dpm.dm.md5
new file mode 100644
index 0000000..b9d1915
--- /dev/null
+++ b/soc/mediatek/mt8196/dpm.dm.md5
@@ -0,0 +1 @@
+2e1adbc9fc7065227e2bdcbd44a54fcb *dpm.dm
diff --git a/soc/mediatek/mt8196/dpm.pm b/soc/mediatek/mt8196/dpm.pm
new file mode 100644
index 0000000..7b055ab
--- /dev/null
+++ b/soc/mediatek/mt8196/dpm.pm
Binary files differ
diff --git a/soc/mediatek/mt8196/dpm.pm.md5 b/soc/mediatek/mt8196/dpm.pm.md5
new file mode 100644
index 0000000..c9b4576
--- /dev/null
+++ b/soc/mediatek/mt8196/dpm.pm.md5
@@ -0,0 +1 @@
+988dbb1ebe80721d5831ef2e26cf4c60 *dpm.pm
diff --git a/soc/mediatek/mt8196/dpm_release_notes.txt b/soc/mediatek/mt8196/dpm_release_notes.txt
new file mode 100644
index 0000000..d9cafa4
--- /dev/null
+++ b/soc/mediatek/mt8196/dpm_release_notes.txt
@@ -0,0 +1,4 @@
+** Build from MediaTek Internal **
+
+# Version 1.0
+1. Add DRAM suspend/DVFS support.
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Change subject: soc/mediatek/mt8196: Add SSPM firmware v1.0
......................................................................
soc/mediatek/mt8196: Add SSPM firmware v1.0
Add sspm.bin to support suspend/resume.
TEST=NA
BUG=b:317009620
Change-Id: I180421be4077198edd4bcabc2d25ed52a3abedda
Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com>
---
A soc/mediatek/mt8196/README.md
A soc/mediatek/mt8196/license.txt
A soc/mediatek/mt8196/sspm.bin
A soc/mediatek/mt8196/sspm.bin.md5
A soc/mediatek/mt8196/sspm_release_notes.txt
5 files changed, 39 insertions(+), 0 deletions(-)
Approvals:
Yu-Ping Wu: Verified; Looks good to me, approved
Yidi Lin: Looks good to me, but someone else must approve
diff --git a/soc/mediatek/mt8196/README.md b/soc/mediatek/mt8196/README.md
new file mode 100644
index 0000000..3f60df8
--- /dev/null
+++ b/soc/mediatek/mt8196/README.md
@@ -0,0 +1,25 @@
+# Firmware list
+- sspm.bin
+
+--------------------------------------------------------------------------------
+# SSPM introduction
+SSPM is "Secure System Power Manager" that provides power control in secure domain.
+SSPM provides power related features, e.g. CPU DVFS, thermal control, to offload
+application processor for security reason.
+
+SSPM firmware is loaded into SSPM SRAM at system initialization.
+
+## Who uses it
+Coreboot will load sspm.bin to SSPM SRAM at ramstage.
+
+## How to load `sspm.bin`
+Use CBFS to load `sspm.bin`.
+No need to pass other parameters to SSPM.
+
+## Return value
+No return value.
+
+## Version
+`$ strings sspm.bin | grep "SSPM firmware"`
+
+--------------------------------------------------------------------------------
diff --git a/soc/mediatek/mt8196/license.txt b/soc/mediatek/mt8196/license.txt
new file mode 100644
index 0000000..6886c61
--- /dev/null
+++ b/soc/mediatek/mt8196/license.txt
@@ -0,0 +1,9 @@
+MediaTek Inc. grants permission to use and redistribute aforementioned firmware
+files for the use with devices containing MediaTek chipsets, but not as part of
+the Linux kernel or in any other form which would require these files themselves
+to be covered by the terms of the GNU General Public License or the GNU Lesser
+General Public License.
+
+These firmware files are distributed in the hope that they will be useful, but
+are provided WITHOUT ANY WARRANTY, INCLUDING BUT NOT LIMITED TO IMPLIED WARRANTY
+OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
diff --git a/soc/mediatek/mt8196/sspm.bin b/soc/mediatek/mt8196/sspm.bin
new file mode 100644
index 0000000..6841081
--- /dev/null
+++ b/soc/mediatek/mt8196/sspm.bin
Binary files differ
diff --git a/soc/mediatek/mt8196/sspm.bin.md5 b/soc/mediatek/mt8196/sspm.bin.md5
new file mode 100644
index 0000000..c4c3110
--- /dev/null
+++ b/soc/mediatek/mt8196/sspm.bin.md5
@@ -0,0 +1 @@
+cbfd0cac5f9ee49a20a64291de7ab8b4 *sspm.bin
diff --git a/soc/mediatek/mt8196/sspm_release_notes.txt b/soc/mediatek/mt8196/sspm_release_notes.txt
new file mode 100644
index 0000000..be43022
--- /dev/null
+++ b/soc/mediatek/mt8196/sspm_release_notes.txt
@@ -0,0 +1,4 @@
+** Build from MediaTek Internal **
+
+# Version 1.0
+1. Add sspm.bin v1.0.
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yuchi.chen(a)intel.com has posted comments on this change by yuchi.chen(a)intel.com. ( https://review.coreboot.org/c/coreboot/+/84109?usp=email )
Change subject: soc/intel/common/systemagent: read sa resources only from domain 0
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84109/comment/94bc1c92_8cb83e1a?us… :
PS3, Line 8:
> Why?
Some Intel SoC have multiple domains and each includes a systemagent, this patch is to avoid adding memory resources multiple times because they are identical to all domains. Although adding a memory resource multiple times works, it's a bit confusing.
File src/soc/intel/common/block/systemagent/systemagent.c:
https://review.coreboot.org/c/coreboot/+/84109/comment/c1f022df_bae89234?us… :
PS3, Line 277: reading
> read
I will update it in another patch.
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Change subject: soc/mediatek/mt8196: Add MCUPM firmware v1.0
......................................................................
Patch Set 5: Code-Review+1
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