coreboot-gerrit September 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Remove unused pch_handle_sideband() function
by Eric Lai (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun. Eric Lai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84189?usp=email ) Change subject: soc/intel/meteorlake: Remove unused pch_handle_sideband() function ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84189?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idd14748aa1d917d6e88d738541a737c04a2c6a15 Gerrit-Change-Number: 84189 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 03 Sep 2024 02:41:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/intel: Refactor ITSS macros
by Eric Lai (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Arthur Heymans, Christian Walter, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jayvik Desai, Johnny Lin, Jonathan Zhang, Kapil Porwal, Lean Sheng Tan, Nick Vaccaro, Patrick Rudolph, Rishika Raj, Shuo Liu, Subrata Banik, Tarun, Tim Chu, Werner Zeh. Eric Lai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84183?usp=email ) Change subject: soc/intel: Refactor ITSS macros ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/84183?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6461dc93b0d21bec5429075bc26435bae3754d74 Gerrit-Change-Number: 84183 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 03 Sep 2024 02:40:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel: Remove unused `GPIO_IRQ_xxx` definitions
by Eric Lai (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jayvik Desai, Kapil Porwal, Lean Sheng Tan, Nick Vaccaro, Rishika Raj, Subrata Banik, Tarun, Werner Zeh. Eric Lai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84182?usp=email ) Change subject: soc/intel: Remove unused `GPIO_IRQ_xxx` definitions ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84182?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I60a08ba2c894fd1c1af6c6aef3ddc4a33ec63e76 Gerrit-Change-Number: 84182 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 03 Sep 2024 02:40:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/brox/jubilant: Generate RAM IDs
by Ren Kuo (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Bob Moragues, David Wu, Karthik Ramasubramanian, Kenneth Chan, Tyler Wang. Ren Kuo has posted comments on this change by Ren Kuo. ( https://review.coreboot.org/c/coreboot/+/84193?usp=email ) Change subject: mb/google/brox/jubilant: Generate RAM IDs ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brox/variants/jubilant/memory/dram_id.generated.txt: https://review.coreboot.org/c/coreboot/+/84193/comment/1d81dd87_138540ee?us… : PS1, Line 10: MT62F1G32D2DS-023 WT:B 2 (0010) : H58G56BK8BX068 2 (0010) > Do these two need to be de-conflicted? The RAM ID is generated by tool. The two memory types should share the same SPD parameters. -- To view, visit https://review.coreboot.org/c/coreboot/+/84193?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6b6e351ceaacfd65eae7b1db14c195b34359689a Gerrit-Change-Number: 84193 Gerrit-PatchSet: 1 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-CC: Bob Moragues <moragues(a)google.com> Gerrit-CC: Richard Lin <richardlin(a)quanta.corp-partner.google.com> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Bob Moragues <moragues(a)google.com> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 03 Sep 2024 02:27:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bob Moragues <moragues(a)google.com>

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[XS] Change in coreboot[main]: mb/google/brox/jubilant: Modify FP IRQ pin to GPP_D13
by Subrata Banik (Code Review) 03 Sep '24

03 Sep '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84124?usp=email ) Change subject: mb/google/brox/jubilant: Modify FP IRQ pin to GPP_D13 ...................................................................... mb/google/brox/jubilant: Modify FP IRQ pin to GPP_D13 Modify the FP IRQ pin to GPP_D13 from GPP_F15 from HW change on EVT. The design change to follow the brox's GPE0 routing, and the FP wake source can be routed. BUG=b:363166664 TEST= Build jubilant firmware Change-Id: Ic4a7ca07eab0dab234ab025cf77bbb8093b6b9d1 Signed-off-by: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84124 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brox/variants/jubilant/gpio.c M src/mainboard/google/brox/variants/jubilant/overridetree.cb 2 files changed, 4 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Kenneth Chan: Looks good to me, approved Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/brox/variants/jubilant/gpio.c b/src/mainboard/google/brox/variants/jubilant/gpio.c index a8e652c..7562b65 100644 --- a/src/mainboard/google/brox/variants/jubilant/gpio.c +++ b/src/mainboard/google/brox/variants/jubilant/gpio.c @@ -40,8 +40,8 @@ PAD_CFG_GPO_LOCK(GPP_D3, 0, LOCK_CONFIG), /* GPP_D15 : ISH_UART0_RTS_L/I2C7B_SDA ==> FPMCU_RST_J_SUB_L (active low) */ PAD_CFG_GPO_LOCK(GPP_D15, 0, LOCK_CONFIG), - /* GPP_F15 : [NF1: GSXSRESET# NF3: THC1_SPI2_IO3 NF6: USB_C_GPP_F15] ==> FP GSPI INT */ - PAD_CFG_GPI_IRQ_WAKE(GPP_F15, NONE, PWROK, LEVEL, INVERT), + /* GPP_D13 : [NF1: ISH_UART0_RXD NF3: I2C6_SDA NF6: USB_C_GPP_D13] ==> FP GSPI INT */ + PAD_CFG_GPI_IRQ_WAKE(GPP_D13, NONE, PWROK, LEVEL, INVERT), /* GPP_F11 : [NF3: THC1_SPI2_CLK NF4: GSPI1_CLK NF6: USB_C_GPP_F11] ==> FP GSPI CLK */ PAD_CFG_NF_LOCK(GPP_F11, NONE, NF4, LOCK_CONFIG), /* GPP_F12 : [NF1: GSXDOUT NF3: THC1_SPI2_IO0 NF4: GSPI1_MOSI NF5: I2C1A_SCL diff --git a/src/mainboard/google/brox/variants/jubilant/overridetree.cb b/src/mainboard/google/brox/variants/jubilant/overridetree.cb index d1fbb8b..2f6f83b 100644 --- a/src/mainboard/google/brox/variants/jubilant/overridetree.cb +++ b/src/mainboard/google/brox/variants/jubilant/overridetree.cb @@ -399,8 +399,8 @@ register "hid" = "ACPI_DT_NAMESPACE_HID" register "uid" = "1" register "compat_string" = ""google,cros-ec-spi"" - register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)" - register "wake" = "GPE0_DW2_15" + register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_D13_IRQ)" + register "wake" = "GPE0_DW1_13" register "has_power_resource" = "1" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" -- To view, visit https://review.coreboot.org/c/coreboot/+/84124?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic4a7ca07eab0dab234ab025cf77bbb8093b6b9d1 Gerrit-Change-Number: 84124 Gerrit-PatchSet: 11 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Richard Lin <richardlin(a)quanta.corp-partner.google.com>

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[XS] Change in coreboot[main]: mb/google/brox/jubilant: Modify FP IRQ pin to GPP_D13
by Subrata Banik (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Bob Moragues, Karthik Ramasubramanian, Marx Wang, Marx Wang, Nick Vaccaro, Paul Menzel, Ren Kuo. Subrata Banik has posted comments on this change by Ren Kuo. ( https://review.coreboot.org/c/coreboot/+/84124?usp=email ) Change subject: mb/google/brox/jubilant: Modify FP IRQ pin to GPP_D13 ...................................................................... Patch Set 10: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84124?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic4a7ca07eab0dab234ab025cf77bbb8093b6b9d1 Gerrit-Change-Number: 84124 Gerrit-PatchSet: 10 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Richard Lin <richardlin(a)quanta.corp-partner.google.com> Gerrit-Attention: Marx Wang <marx.wang(a)intel.com> Gerrit-Attention: Marx Wang <marx.wang(a)intel.corp-partner.google.com> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bob Moragues <moragues(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 03 Sep 2024 02:22:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/brox/jubilant: Generate RAM IDs
by Bob Moragues (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: David Wu, Karthik Ramasubramanian, Kenneth Chan, Ren Kuo, Tyler Wang. Bob Moragues has posted comments on this change by Ren Kuo. ( https://review.coreboot.org/c/coreboot/+/84193?usp=email ) Change subject: mb/google/brox/jubilant: Generate RAM IDs ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brox/variants/jubilant/memory/dram_id.generated.txt: https://review.coreboot.org/c/coreboot/+/84193/comment/6d55f12a_98f54676?us… : PS1, Line 10: MT62F1G32D2DS-023 WT:B 2 (0010) : H58G56BK8BX068 2 (0010) Do these two need to be de-conflicted? -- To view, visit https://review.coreboot.org/c/coreboot/+/84193?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6b6e351ceaacfd65eae7b1db14c195b34359689a Gerrit-Change-Number: 84193 Gerrit-PatchSet: 1 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-CC: Bob Moragues <moragues(a)google.com> Gerrit-CC: Richard Lin <richardlin(a)quanta.corp-partner.google.com> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 03 Sep 2024 02:22:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brox: Increase PL1 Min and remove PL4 modification
by Sowmya Aralguppe (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Karthik Ramasubramanian, Paul Menzel, Shelley Chen, Subrata Banik. Sowmya Aralguppe has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/84185?usp=email ) Change subject: mb/google/brox: Increase PL1 Min and remove PL4 modification ...................................................................... Patch Set 4: (4 comments) Patchset: PS3: > Make it two patches? Both PL1 and PL4 are part of cpu_power_limits(performance_efficient_limits) structure - so I would prefer to keep it in a single patch Commit Message: https://review.coreboot.org/c/coreboot/+/84185/comment/80ff034b_5fa658f2?us… : PS3, Line 7: . > Please remove the dot/period. Done https://review.coreboot.org/c/coreboot/+/84185/comment/6bd6169c_577c42a4?us… : PS3, Line 7: Update > More specific: Increase Done https://review.coreboot.org/c/coreboot/+/84185/comment/a1764888_270a8ce6?us… : PS3, Line 10: Remove PL4 value modification based on : PsysPL3 value. : > Why? cpu_power_limits values are fixed for brox they should not be changed unless there is a special case like low battery or no battery scenario. -- To view, visit https://review.coreboot.org/c/coreboot/+/84185?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib65b517c4cdba04b7e4d15b729ae782f0662717e Gerrit-Change-Number: 84185 Gerrit-PatchSet: 4 Gerrit-Owner: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 03 Sep 2024 02:20:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/google/brox: Increase PL1 Min and remove PL4 modification
by Sowmya Aralguppe (Code Review) 03 Sep '24

03 Sep '24

Attention is currently required from: Karthik Ramasubramanian, Shelley Chen, Sowmya Aralguppe, Subrata Banik. Hello Karthik Ramasubramanian, Shelley Chen, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84185?usp=email to look at the new patch set (#4). Change subject: mb/google/brox: Increase PL1 Min and remove PL4 modification ...................................................................... mb/google/brox: Increase PL1 Min and remove PL4 modification Increase PL1 Min value from 6W to 15W based on the brox thermal cooling capacity and hardware design. Remove PL4 value modification based on PsysPL3 value. BUG=None BRANCH=None TEST=Build and boot on brox board Change-Id: Ib65b517c4cdba04b7e4d15b729ae782f0662717e Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> --- M src/mainboard/google/brox/variants/baseboard/brox/ramstage.c M src/mainboard/google/brox/variants/brox/ramstage.c 2 files changed, 2 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/84185/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/84185?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib65b517c4cdba04b7e4d15b729ae782f0662717e Gerrit-Change-Number: 84185 Gerrit-PatchSet: 4 Gerrit-Owner: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

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[S] Change in coreboot[main]: mb/google/brox/jubilant: Generate RAM IDs
by Ren Kuo (Code Review) 03 Sep '24

03 Sep '24

Ren Kuo has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84193?usp=email ) Change subject: mb/google/brox/jubilant: Generate RAM IDs ...................................................................... mb/google/brox/jubilant: Generate RAM IDs Generate RAM IDs of lp5 memory: 1)H58G56BK8BX068 2)K3KL8L80CM-MGCT BUG=None TEST=Run part_id_gen tool and check the generated files. Change-Id: I6b6e351ceaacfd65eae7b1db14c195b34359689a Signed-off-by: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brox/variants/jubilant/memory/Makefile.mk M src/mainboard/google/brox/variants/jubilant/memory/dram_id.generated.txt M src/mainboard/google/brox/variants/jubilant/memory/mem_parts_used.txt 3 files changed, 8 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/84193/1 diff --git a/src/mainboard/google/brox/variants/jubilant/memory/Makefile.mk b/src/mainboard/google/brox/variants/jubilant/memory/Makefile.mk index 380edbf..38855d8 100644 --- a/src/mainboard/google/brox/variants/jubilant/memory/Makefile.mk +++ b/src/mainboard/google/brox/variants/jubilant/memory/Makefile.mk @@ -1,9 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brox/variants/brox/memory src/mainboard/google/brox/variants/brox/memory/mem_parts_used.txt +# util/spd_tools/bin/part_id_gen adl lp5 src/mainboard/google/brox/variants/jubilant/memory src/mainboard/google/brox/variants/jubilant/memory/mem_parts_used.txt SPD_SOURCES = SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT62F512M32D2DR-031 WT:B, H9JCNNNBK3MLYR-N6E SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 1(0b0001) Parts = MT62F1G32D4DR-031 WT:B -SPD_SOURCES += spd/lp5/set-0/spd-11.hex # ID = 2(0b0010) Parts = MT62F1G32D2DS-023 WT:B +SPD_SOURCES += spd/lp5/set-0/spd-11.hex # ID = 2(0b0010) Parts = MT62F1G32D2DS-023 WT:B, H58G56BK8BX068 +SPD_SOURCES += spd/lp5/set-0/spd-7.hex # ID = 3(0b0011) Parts = K3KL8L80CM-MGCT diff --git a/src/mainboard/google/brox/variants/jubilant/memory/dram_id.generated.txt b/src/mainboard/google/brox/variants/jubilant/memory/dram_id.generated.txt index d6224cc..589410b 100644 --- a/src/mainboard/google/brox/variants/jubilant/memory/dram_id.generated.txt +++ b/src/mainboard/google/brox/variants/jubilant/memory/dram_id.generated.txt @@ -1,10 +1,12 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brox/variants/brox/memory src/mainboard/google/brox/variants/brox/memory/mem_parts_used.txt +# util/spd_tools/bin/part_id_gen adl lp5 src/mainboard/google/brox/variants/jubilant/memory src/mainboard/google/brox/variants/jubilant/memory/mem_parts_used.txt DRAM Part Name ID to assign MT62F512M32D2DR-031 WT:B 0 (0000) H9JCNNNBK3MLYR-N6E 0 (0000) MT62F1G32D4DR-031 WT:B 1 (0001) MT62F1G32D2DS-023 WT:B 2 (0010) +H58G56BK8BX068 2 (0010) +K3KL8L80CM-MGCT 3 (0011) diff --git a/src/mainboard/google/brox/variants/jubilant/memory/mem_parts_used.txt b/src/mainboard/google/brox/variants/jubilant/memory/mem_parts_used.txt index f5c81a3..a09fd75 100644 --- a/src/mainboard/google/brox/variants/jubilant/memory/mem_parts_used.txt +++ b/src/mainboard/google/brox/variants/jubilant/memory/mem_parts_used.txt @@ -2,3 +2,5 @@ H9JCNNNBK3MLYR-N6E MT62F1G32D4DR-031 WT:B MT62F1G32D2DS-023 WT:B +H58G56BK8BX068 +K3KL8L80CM-MGCT -- To view, visit https://review.coreboot.org/c/coreboot/+/84193?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6b6e351ceaacfd65eae7b1db14c195b34359689a Gerrit-Change-Number: 84193 Gerrit-PatchSet: 1 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com>

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