Attention is currently required from: Krishna P Bhat D, Saurabh Mishra.
Ashish Kumar Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83732?usp=email )
Change subject: vc/intel/fsp/fsp2_0/ptl: Add placeholder FSP headers to compile
......................................................................
Patch Set 9:
(2 comments)
File src/vendorcode/intel/fsp/fsp2_0/pantherlake/MemInfoHob.h:
https://review.coreboot.org/c/coreboot/+/83732/comment/23a5ec43_af95c9bd?us… :
PS9, Line 34: #pragma pack (push, 1)
Suggest: Inconsistent use of:
#pragma (push , 1) and #pragma pack(1)
across different headers in this CL.
Could we use same syntax across.
https://review.coreboot.org/c/coreboot/+/83732/comment/9db506fc_25331346?us… :
PS9, Line 129: #pragma pack (pop)
Suggest:
Similar to #pragma comment above.
#pragma pack(top) and #pragma pack()
--
To view, visit https://review.coreboot.org/c/coreboot/+/83732?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I4c069ba64f487259ce746dc52296618d91209602
Gerrit-Change-Number: 83732
Gerrit-PatchSet: 9
Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com>
Gerrit-CC: Appukuttan V K <appukuttan.vk(a)intel.com>
Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com>
Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com>
Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com>
Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com>
Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com>
Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com>
Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com>
Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com>
Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com>
Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com>
Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com>
Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com>
Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com>
Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com>
Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com>
Gerrit-Comment-Date: Mon, 05 Aug 2024 04:25:46 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Attention is currently required from: Yidi Lin, Yu-Ping Wu.
Xixi Chen has posted comments on this change by Xixi Chen. ( https://review.coreboot.org/c/blobs/+/83748?usp=email )
Change subject: soc/mediatek/mt8186: Update DRAM binary from 0.1.0 to 0.1.1
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
@yupingso@google.com @yidilin@google.com Could you please help to review this patch? thanks.
--
To view, visit https://review.coreboot.org/c/blobs/+/83748?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: blobs
Gerrit-Branch: main
Gerrit-Change-Id: Id7df502346d590d3cf3827f48d868da021f6ec9d
Gerrit-Change-Number: 83748
Gerrit-PatchSet: 5
Gerrit-Owner: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com>
Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com>
Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-Attention: Yidi Lin <yidilin(a)google.com>
Gerrit-Comment-Date: Mon, 05 Aug 2024 03:36:03 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Attention is currently required from: Karthik Ramasubramanian, Nick Vaccaro.
Bob Moragues has posted comments on this change by Karthik Ramasubramanian. ( https://review.coreboot.org/c/coreboot/+/83755?usp=email )
Change subject: mb/google/brox: Tune Touchpad I2C parameters
......................................................................
Patch Set 1: Code-Review+1
--
To view, visit https://review.coreboot.org/c/coreboot/+/83755?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I0006bfb9bb5839ffa1248d9f2ea055160ed0936e
Gerrit-Change-Number: 83755
Gerrit-PatchSet: 1
Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Reviewer: Bob Moragues <moragues(a)google.com>
Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Comment-Date: Mon, 05 Aug 2024 03:28:24 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Xixi Chen has uploaded a new patch set (#4). ( https://review.coreboot.org/c/blobs/+/83748?usp=email )
Change subject: soc/mediatek/mt8186: Update DRAM binary from 0.1.0 to 0.1.1
......................................................................
soc/mediatek/mt8186: Update DRAM binary from 0.1.0 to 0.1.1
For fast-k RX flow, Vref value is readed from the MRC_CACHE, but the
preferred RX Vref value 0xE is set, with no re-calibration. But some
DRAM vendor may use higher RX Vref value, increase the default RX
Vref value(from full-k reference) to let different DRAM RX Vref
compatible.
BUG=b:352632973
TEST=Check the fast-k RX Vref value is normal
Signed-off-by: Xi Chen <xixi.chen(a)mediatek.corp-partner.google.com>
Change-Id: Id7df502346d590d3cf3827f48d868da021f6ec9d
---
M soc/mediatek/mt8186/dram.elf
M soc/mediatek/mt8186/dram.elf.md5
M soc/mediatek/mt8186/dram_release_notes.txt
3 files changed, 9 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/blobs refs/changes/48/83748/4
--
To view, visit https://review.coreboot.org/c/blobs/+/83748?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: newpatchset
Gerrit-Project: blobs
Gerrit-Branch: main
Gerrit-Change-Id: Id7df502346d590d3cf3827f48d868da021f6ec9d
Gerrit-Change-Number: 83748
Gerrit-PatchSet: 4
Gerrit-Owner: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com>
Xixi Chen has uploaded a new patch set (#3). ( https://review.coreboot.org/c/blobs/+/83748?usp=email )
Change subject: soc/mediatek/mt8186: Update DRAM binary from 0.1.0 to 0.1.1
......................................................................
soc/mediatek/mt8186: Update DRAM binary from 0.1.0 to 0.1.1
For fast-k RX flow, Vref value is readed from the MRC_CACHE, but the
preferred RX Vref value 0xE is set, with no re-calibration. But some
DRAM vendor may use higher RX Vref value, increase the default RX
Vref value(from full-k reference) to let different DRAM RX Vref
compatible.
BUG=b:352632973
TEST=Check the fast-k RX Vref value is normal
Signed-off-by: Xi Chen <xixi.chen(a)mediatek.corp-partner.google.com>
Change-Id: Id7df502346d590d3cf3827f48d868da021f6ec9d
---
M soc/mediatek/mt8186/dram.elf
M soc/mediatek/mt8186/dram.elf.md5
M soc/mediatek/mt8186/dram_release_notes.txt
3 files changed, 9 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/blobs refs/changes/48/83748/3
--
To view, visit https://review.coreboot.org/c/blobs/+/83748?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: newpatchset
Gerrit-Project: blobs
Gerrit-Branch: main
Gerrit-Change-Id: Id7df502346d590d3cf3827f48d868da021f6ec9d
Gerrit-Change-Number: 83748
Gerrit-PatchSet: 3
Gerrit-Owner: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com>
Attention is currently required from: Alexander Couzens.
Hello Alexander Couzens,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83764?usp=email
to look at the new patch set (#2).
Change subject: mb/lenovo/t520: Add USB port config into devicetree
......................................................................
mb/lenovo/t520: Add USB port config into devicetree
Devicetree for lenovo/520 is missing USB ports config, hence they
don't work.
This change introduces USB port config.
Change-Id: I96dba153a563e0e290b96b837fdca39d7598ef17
Signed-off-by: PuFF1k <exopuf(a)gmail.com>
---
M src/mainboard/lenovo/t520/devicetree.cb
1 file changed, 18 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/83764/2
--
To view, visit https://review.coreboot.org/c/coreboot/+/83764?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: newpatchset
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I96dba153a563e0e290b96b837fdca39d7598ef17
Gerrit-Change-Number: 83764
Gerrit-PatchSet: 2
Gerrit-Owner: Valentyn Sudomyr <exopuf(a)gmail.com>
Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu>