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Change subject: mb/google/brox: Tune Touchpad I2C parameters
......................................................................
Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83755/comment/e0db9607_f4f7e001?us… :
PS1, Line 9: that it meets the
: I2C fast mode specification
What does it require?
https://review.coreboot.org/c/coreboot/+/83755/comment/5da4a7ca_500ec147?us… :
PS1, Line 13: BIOS
firmware
https://review.coreboot.org/c/coreboot/+/83755/comment/fc2cc217_8e0fe6b2?us… :
PS1, Line 13: Confirm the I2C bus
: frequency, rise and fall times meet the specification.
Please list the measured values.
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Change subject: MAINTAINERS: Add google/fatcat entry and update maintainers
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83767/comment/5d4ecfb2_2cec0ccd?us… :
PS1, Line 7: Add google/fatcat entry and update maintainers
Maybe:
> Add Subrata and Pranava for new google/fatcat entry
https://review.coreboot.org/c/coreboot/+/83767/comment/748c9a0c_24b15812?us… :
PS1, Line 10: updated
update
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Change subject: mb/google/brya/var/nova: Adjust Type-C port to USB 2.0 only
......................................................................
Patch Set 10:
(1 comment)
Patchset:
PS4:
> Acknowledged
I’d preferred, if this suggestion would have been followed. The current message misses the motivation.
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Attention is currently required from: Cliff Huang, Lance Zhao, Martin L Roth, Tim Wawrzynczak.
Hello Cliff Huang, Lance Zhao, Martin L Roth, Tim Wawrzynczak, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/81419?usp=email
to look at the new patch set (#24).
Change subject: [for test] test upgrade crossgcc
......................................................................
[for test] test upgrade crossgcc
Change-Id: I463c303694c304bb3bf664bc1d914462e7af5dbb
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M src/acpi/sata.c
M src/commonlib/bsd/include/commonlib/bsd/metadata_hash.h
M src/commonlib/include/commonlib/loglevel.h
M src/include/cpu/intel/smm_reloc.h
M util/crossgcc/buildgcc
R util/crossgcc/patches/acpica-unix2-20240321_iasl.patch
R util/crossgcc/patches/gcc-15-20240804_asan_shadow_offset_callback.patch
R util/crossgcc/patches/gcc-15-20240804_gnat.patch
R util/crossgcc/patches/gcc-15-20240804_libcpp.patch
R util/crossgcc/patches/gcc-15-20240804_libgcc.patch
R util/crossgcc/patches/gcc-15-20240804_musl_poisoned_calloc.patch
R util/crossgcc/patches/gcc-15-20240804_rv32iafc.patch
D util/crossgcc/sum/acpica-unix-20230628.tar.gz.cksum
A util/crossgcc/sum/acpica-unix2-20240321.tar.gz.cksum
D util/crossgcc/sum/clang-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/clang-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/clang-tools-extra-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/clang-tools-extra-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/cmake-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/cmake-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/cmake-3.29.3.tar.gz.cksum
A util/crossgcc/sum/cmake-3.30.2.tar.gz.cksum
D util/crossgcc/sum/compiler-rt-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/compiler-rt-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/gcc-14.1.0.tar.xz.cksum
A util/crossgcc/sum/gcc-15-20240804.tar.xz.cksum
D util/crossgcc/sum/libunwind-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/libunwind-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/lld-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/lld-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/llvm-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/llvm-18.1.8.src.tar.xz.cksum
32 files changed, 35 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/81419/24
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Change subject: [for test] test upgrade crossgcc
......................................................................
[for test] test upgrade crossgcc
Change-Id: I463c303694c304bb3bf664bc1d914462e7af5dbb
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M src/acpi/sata.c
M src/commonlib/bsd/include/commonlib/bsd/metadata_hash.h
M src/commonlib/include/commonlib/loglevel.h
M src/include/cpu/intel/smm_reloc.h
M util/crossgcc/buildgcc
R util/crossgcc/patches/acpica-unix2-20240321_iasl.patch
R util/crossgcc/patches/gcc-15-20240804_asan_shadow_offset_callback.patch
R util/crossgcc/patches/gcc-15-20240804_gnat.patch
R util/crossgcc/patches/gcc-15-20240804_libcpp.patch
R util/crossgcc/patches/gcc-15-20240804_libgcc.patch
R util/crossgcc/patches/gcc-15-20240804_musl_poisoned_calloc.patch
R util/crossgcc/patches/gcc-15-20240804_rv32iafc.patch
D util/crossgcc/sum/acpica-unix-20230628.tar.gz.cksum
A util/crossgcc/sum/acpica-unix2-20240321.tar.gz.cksum
D util/crossgcc/sum/clang-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/clang-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/clang-tools-extra-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/clang-tools-extra-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/cmake-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/cmake-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/cmake-3.29.3.tar.gz.cksum
A util/crossgcc/sum/cmake-3.30.2.tar.gz.cksum
D util/crossgcc/sum/compiler-rt-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/compiler-rt-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/gcc-14.1.0.tar.xz.cksum
A util/crossgcc/sum/gcc-15-20240728.tar.xz.cksum
D util/crossgcc/sum/libunwind-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/libunwind-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/lld-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/lld-18.1.8.src.tar.xz.cksum
D util/crossgcc/sum/llvm-18.1.6.src.tar.xz.cksum
A util/crossgcc/sum/llvm-18.1.8.src.tar.xz.cksum
32 files changed, 35 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/81419/23
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Jayvik Desai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83770?usp=email )
Change subject: drivers/intel/fsp2: Add config for FSP uGOP eSOL
......................................................................
drivers/intel/fsp2: Add config for FSP uGOP eSOL
This patch adds a new config 'FSP_UGOP_EARLY_SIGN_OF_LIFE' to FSP driver
code to enable uGOP for early sign of life feature in the SOC using FSP-M
BUG=NA
TEST=Able to build google/rex and checked the config in output.
Change-Id: Ic0426ff7974a141ae9188b0098677b4cc97aee36
Signed-off-by: Jayvik Desai <jayvik(a)google.com>
---
M src/drivers/intel/fsp2_0/Kconfig
1 file changed, 10 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/83770/1
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 9ea1526..a3d8907 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -467,6 +467,16 @@
To be able to use this, FSP has to be compiled with `PcdFspPerformanceEnable` set to
`TRUE`.
+config FSP_UGOP_EARLY_SIGN_OF_LIFE
+ bool
+ default n
+ select VBT_CBFS_COMPRESSION_DEFAULT_LZ4
+ help
+ Enable the FSP-M Sign-of-Life feature to display a configurable
+ text message on screen during memory training and CSME update.
+ This utilizes Intel's underlying uGOP technology to enable
+ early sign of life (eSOL) as part of FSP-M.
+
config FSP_ENABLE_SERIAL_DEBUG
bool "Output FSP debug messages on serial console"
default y
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Change subject: [for test] test upgrade crossgcc
......................................................................
Patch Set 21:
(1 comment)
File src/commonlib/bsd/include/commonlib/bsd/metadata_hash.h:
https://review.coreboot.org/c/coreboot/+/81419/comment/7f303df3_f8298a0a?us… :
PS21, Line 32: "\xadMdtHsh\x15"
this needs `uint8_t magic[15];` , isn't it?
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