Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83724?usp=email )
(
3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: mb/google/dedede/var/awasuki: Add Fn key scancode
......................................................................
mb/google/dedede/var/awasuki: Add Fn key scancode
The Fn key on awasuki emits a scancode of 94 (0x5e).
BUG=b:355538142
TEST=Flash awasuki, boot to Linux kernel, and verify that KEY_FN is
generated when pressed using `evtest`.
Change-Id: Ic7aa183bf314fed4901133dc70d848d84fab0784
Signed-off-by: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83724
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: zhongtian wu <wuzhongtian(a)huaqin.corp-partner.google.com>
Reviewed-by: Eric Lai <ericllai(a)google.com>
---
M src/mainboard/google/dedede/Kconfig
1 file changed, 3 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Eric Lai: Looks good to me, approved
zhongtian wu: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig
index bdd2f4c..e17b68e 100644
--- a/src/mainboard/google/dedede/Kconfig
+++ b/src/mainboard/google/dedede/Kconfig
@@ -1,5 +1,8 @@
## SPDX-License-Identifier: GPL-2.0-only
+config ACPI_FNKEY_GEN_SCANCODE
+ default 94 if BOARD_GOOGLE_AWASUKI
+
config BOARD_GOOGLE_BASEBOARD_DEDEDE
def_bool n
select BOARD_ROMSIZE_KB_16384 if !BOARD_ROMSIZE_KB_32768
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Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83820?usp=email )
Change subject: mb/google/brya: Enable storing ISH FW version for trulo
......................................................................
mb/google/brya: Enable storing ISH FW version for trulo
This change enables storing the ISH firmware version on the Trulo
baseboard by selecting the `SOC_INTEL_STORE_ISH_FW_VERSION` config
option.
BUG=b:354607924
TEST=Able to dump ISH version on trulo.
> cbmem -c | grep ISH
[DEBUG] ISH version: 5.4.2.7780
Change-Id: I69a7fa19c53f435ef1f6306b259f703c7b196137
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/mainboard/google/brya/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/83820/1
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 2201ce7..5c788fe 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -117,6 +117,7 @@
select SOC_INTEL_COMMON_MMC_OVERRIDE
select SOC_INTEL_CSE_LITE_COMPRESS_ME_RW
select SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE
+ select SOC_INTEL_STORE_ISH_FW_VERSION
select SOC_INTEL_TWINLAKE
select SYSTEM_TYPE_LAPTOP
select TPM_GOOGLE_TI50
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Subrata Banik has posted comments on this change by Jamie Ryu. ( https://review.coreboot.org/c/coreboot/+/83784?usp=email )
Change subject: soc/intel/cmn/pmc: Add API to dump silicon QDF information
......................................................................
Patch Set 13: Code-Review+2
(1 comment)
Patchset:
PS11:
> Subrata, as you mentioned, we have not added to call pmc_dump_soc_qdf_info from pantherlake soc code yet, so we can remove this CL from the PTL SoC recipe and land this first.
exactly, that is the point. we should first land this CL as is then add into PTL SoC.
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Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83732?usp=email )
Change subject: vc/intel/fsp/fsp2_0/ptl: Add placeholder FSP headers to compile
......................................................................
Patch Set 16:
(3 comments)
File src/vendorcode/intel/fsp/fsp2_0/pantherlake/FirmwareVersionInfo.h:
https://review.coreboot.org/c/coreboot/+/83732/comment/63a071ea_f478de9a?us… :
PS15, Line 5:
: * This software is released under the MIT License.
: * https://opensource.org/licenses/MIT
: *
: * Permission is hereby granted, free of charge, to any person obtaining a copy
: * of this software and associated documentation files (the "Software"), to deal
: * in the Software without restriction, including without limitation the rights
: * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
: * copies of the Software, and to permit persons to whom the Software is
: * furnished to do so, subject to the following conditions:
: *
: * The above copyright notice and this permission notice shall be included in all
: * copies or substantial portions of the Software.
: *
: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
: * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
: * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
: * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
: * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
: * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
: * SOFTWARE.
: */
> need change […]
Acknowledged
File src/vendorcode/intel/fsp/fsp2_0/pantherlake/FspProducerDataHeader.h:
https://review.coreboot.org/c/coreboot/+/83732/comment/086a189b_0a6506d2?us… :
PS15, Line 8: Permission is hereby granted, free of charge, to any person obtaining a copy
: * of this software and associated documentation files (the "Software"), to deal
: * in the Software without restriction, including without limitation the rights
: * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
: * copies of the Software, and to permit persons to whom the Software is
: * furnished to do so, subject to the following conditions:
: *
: * The above copyright notice and this permission notice shall be included in all
: * copies or substantial portions of the Software.
: *
: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
: * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
: * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
: * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
: * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
: * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
: * SOFTWARE.
: */
> need change […]
Acknowledged
File src/vendorcode/intel/fsp/fsp2_0/pantherlake/MemInfoHob.h:
https://review.coreboot.org/c/coreboot/+/83732/comment/8f748f5b_cd0e2ddc?us… :
PS15, Line 3: Memory S3 Save data, Memory Info data and Memory Platform
: * data hobs.
: *
: * Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
: *
: * This software is released under the MIT License.
: * https://opensource.org/licenses/MIT
: *
: * Permission is hereby granted, free of charge, to any person obtaining a copy
: * of this software and associated documentation files (the "Software"), to deal
: * in the Software without restriction, including without limitation the rights
: * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
: * copies of the Software, and to permit persons to whom the Software is
: * furnished to do so, subject to the following conditions:
: *
: * The above copyright notice and this permission notice shall be included in all
: * copies or substantial portions of the Software.
: *
: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
: * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
: * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
: * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
: * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
: * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
: * SOFTWARE.
> need change […]
Acknowledged
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Change subject: soc/intel/cmn/pmc: Add API to dump silicon QDF information
......................................................................
Patch Set 12:
(1 comment)
Patchset:
PS11:
> > Hi Subrata, this new API change is added for Intel Silicons. […]
Subrata, as you mentioned, we have not added to call pmc_dump_soc_qdf_info from pantherlake soc code yet, so we can remove this CL from the PTL SoC recipe and land this first.
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Attention is currently required from: Hung-Te Lin, Paul Menzel, Xi Chen, Yu-Ping Wu.
Hello Hung-Te Lin, Xi Chen, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83703?usp=email
to look at the new patch set (#4).
Change subject: soc/mediatek/common: Refactor EINT driver
......................................................................
soc/mediatek/common: Refactor EINT driver
Refactor EINT driver by
- Move `pos_bit_calc_for_eint` to `common/gpio_eint_v1.c` and rename to
`gpio_calc_eint_pos_bit`.
- Implement `gpio_get_eint_reg` to obtain EINT base address.
This change is prepared for the driver change in MT8196.
BUG=b:334723688
TEST=EINT works on Geralt
Change-Id: Ie53abc23971bfa39250ebd7dd48e28d6b91c5973
Signed-off-by: Yidi Lin <yidilin(a)chromium.org>
---
M src/soc/mediatek/common/gpio.c
A src/soc/mediatek/common/gpio_eint_v1.c
M src/soc/mediatek/common/include/soc/gpio_common.h
M src/soc/mediatek/mt8183/Makefile.mk
M src/soc/mediatek/mt8186/Makefile.mk
M src/soc/mediatek/mt8188/Makefile.mk
M src/soc/mediatek/mt8192/Makefile.mk
M src/soc/mediatek/mt8195/Makefile.mk
8 files changed, 37 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/83703/4
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