coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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[XL] Change in coreboot[main]: soc/intel/ptl: Add SoC ACPI directory for Panther Lake
by Saurabh Mishra (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Hannah Williams, Jamie Ryu, Kapil Porwal, Paul Menzel, Pranava Y N, Ravishankar Sarawadi, Subrata Banik, Wonkyu Kim. Saurabh Mishra has posted comments on this change by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/83772?usp=email ) Change subject: soc/intel/ptl: Add SoC ACPI directory for Panther Lake ...................................................................... Patch Set 72: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/83772/comment/99cc437c_2172f17d?us… : PS66, Line 12: wake up > waking up or wakeup or wake-up wake-up https://review.coreboot.org/c/coreboot/+/83772/comment/199d2ca9_061895f4?us… : PS66, Line 14: , > Not needed. Acknowledged https://review.coreboot.org/c/coreboot/+/83772/comment/cd00d226_7cc7acc0?us… : PS66, Line 15: common/block/acpi/acpi/northbridge.asl binding with PTL change, : #if DMI_BASE_SIZE gaurd check is added in northbridge.asl > Indent with one more space to align with above. […] Acknowledged https://review.coreboot.org/c/coreboot/+/83772/comment/d371a0c4_12e19965?us… : PS66, Line 16: gaurd > guard Acknowledged File src/soc/intel/pantherlake/acpi/tcss.asl: https://review.coreboot.org/c/coreboot/+/83772/comment/d616ad38_1e38293e?us… : PS66, Line 7: Type C Subsystem(TCSS) topology provides Runtime D3 support for USB host controller(xHCI), : * USB device controller(xDCI) > Please add a space before (. Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/83772?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5cf899b049cb8eb27b4ea30c7f3ce7a14884f15 Gerrit-Change-Number: 83772 Gerrit-PatchSet: 72 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 06:01:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
by Saurabh Mishra (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Kapil Porwal, Pranava Y N, Subrata Banik. Hello Kapil Porwal, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83798?usp=email to look at the new patch set (#63). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage ...................................................................... soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage List of changes: 1. Add required SoC programming till ramstage. 2. Include only required headers into include/soc. 3. Skeleton code used to call FSP-S API. BUG=b:348678529 TEST=Verified on Intel® Simics® Pre Silicon Simulation platform for PTL using google/fatcat mainboard. Change-Id: Idc6fb11e9e84c28c7567ae2b7abc1ab832a88362 Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com> --- M src/soc/intel/pantherlake/Kconfig M src/soc/intel/pantherlake/Makefile.mk A src/soc/intel/pantherlake/acpi.c A src/soc/intel/pantherlake/chip.c M src/soc/intel/pantherlake/chip.h M src/soc/intel/pantherlake/chipset.cb A src/soc/intel/pantherlake/cpu.c A src/soc/intel/pantherlake/crashlog.c A src/soc/intel/pantherlake/cse_telemetry.c A src/soc/intel/pantherlake/elog.c A src/soc/intel/pantherlake/finalize.c A src/soc/intel/pantherlake/fsp_params.c A src/soc/intel/pantherlake/gspi.c A src/soc/intel/pantherlake/i2c.c A src/soc/intel/pantherlake/include/soc/cpu.h A src/soc/intel/pantherlake/include/soc/crashlog.h A src/soc/intel/pantherlake/include/soc/dptf.h M src/soc/intel/pantherlake/include/soc/iomap.h A src/soc/intel/pantherlake/include/soc/irq.h A src/soc/intel/pantherlake/include/soc/itss.h A src/soc/intel/pantherlake/include/soc/nvs.h M src/soc/intel/pantherlake/include/soc/p2sb.h A src/soc/intel/pantherlake/include/soc/pcie.h A src/soc/intel/pantherlake/include/soc/ramstage.h A src/soc/intel/pantherlake/include/soc/serialio.h M src/soc/intel/pantherlake/include/soc/systemagent.h A src/soc/intel/pantherlake/include/soc/tcss.h A src/soc/intel/pantherlake/include/soc/usb.h A src/soc/intel/pantherlake/lockdown.c A src/soc/intel/pantherlake/p2sb.c A src/soc/intel/pantherlake/pcie_rp.c A src/soc/intel/pantherlake/pmc.c A src/soc/intel/pantherlake/pmutil.c A src/soc/intel/pantherlake/retimer.c A src/soc/intel/pantherlake/smihandler.c A src/soc/intel/pantherlake/soundwire.c A src/soc/intel/pantherlake/spi.c A src/soc/intel/pantherlake/systemagent.c A src/soc/intel/pantherlake/tcss.c A src/soc/intel/pantherlake/uart.c A src/soc/intel/pantherlake/xhci.c 41 files changed, 3,745 insertions(+), 104 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/83798/63 -- To view, visit https://review.coreboot.org/c/coreboot/+/83798?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idc6fb11e9e84c28c7567ae2b7abc1ab832a88362 Gerrit-Change-Number: 83798 Gerrit-PatchSet: 63 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[XL] Change in coreboot[main]: soc/intel/ptl: Add SoC ACPI directory for Panther Lake
by Saurabh Mishra (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Hannah Williams, Jamie Ryu, Kapil Porwal, Paul Menzel, Pranava Y N, Ravishankar Sarawadi, Subrata Banik, Wonkyu Kim. Saurabh Mishra has uploaded a new patch set (#73) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/83772?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/ptl: Add SoC ACPI directory for Panther Lake ...................................................................... soc/intel/ptl: Add SoC ACPI directory for Panther Lake List of changes: 1. Select common ACPI Kconfig to include common ACPI code block from IA-common code 2. Select ACPI Kconfig support for wake-up from sleep states. 3. Add SoC ASL code for SoC IPs like IPU, HDA etc. 4. PTL replaces DMI3 with SAF to ensure common/block/acpi/acpi/northbridge.asl binding with PTL change, #if DMI_BASE_SIZE guard check is added in northbridge.asl BUG=b:348678529 TEST=Verified on Intel® Simics® Pre Silicon Simulation platform for PTL using google/fatcat mainboard. Change-Id: Ia5cf899b049cb8eb27b4ea30c7f3ce7a14884f15 Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com> --- M src/soc/intel/common/block/acpi/acpi/northbridge.asl M src/soc/intel/pantherlake/Kconfig A src/soc/intel/pantherlake/acpi/camera_clock_ctl.asl A src/soc/intel/pantherlake/acpi/hda.asl A src/soc/intel/pantherlake/acpi/pcie.asl A src/soc/intel/pantherlake/acpi/serialio.asl A src/soc/intel/pantherlake/acpi/southbridge.asl A src/soc/intel/pantherlake/acpi/tcss.asl A src/soc/intel/pantherlake/acpi/tcss_dma.asl A src/soc/intel/pantherlake/acpi/tcss_pcierp.asl A src/soc/intel/pantherlake/acpi/tcss_xhci.asl A src/soc/intel/pantherlake/acpi/xhci.asl 12 files changed, 2,003 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/83772/73 -- To view, visit https://review.coreboot.org/c/coreboot/+/83772?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5cf899b049cb8eb27b4ea30c7f3ce7a14884f15 Gerrit-Change-Number: 83772 Gerrit-PatchSet: 73 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[S] Change in coreboot[main]: soc/mediatek/common/pcie: Use clr/setbits32p
by Jianjun Wang (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Jianjun Wang has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84114?usp=email ) Change subject: soc/mediatek/common/pcie: Use clr/setbits32p ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84114?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id99d5aafdf4d687dbe3a0bef29b148537cf58dd8 Gerrit-Change-Number: 84114 Gerrit-PatchSet: 3 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 05:50:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek/common/pcie: Add DEVTREE_CONST qualifier
by Jianjun Wang (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Jianjun Wang has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84113?usp=email ) Change subject: soc/mediatek/common/pcie: Add DEVTREE_CONST qualifier ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84113?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7c95424019ec0dca50bbc6be7f81b6180d06d6e Gerrit-Change-Number: 84113 Gerrit-PatchSet: 3 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 05:49:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/nissa/var/teliks: Add fw_config fields for rtl8852be
by Qinghong Zeng (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Jianeng Ceng, Kapil Porwal, Nick Vaccaro, Rishika Raj, Subrata Banik. Qinghong Zeng has posted comments on this change by Jianeng Ceng. ( https://review.coreboot.org/c/coreboot/+/84138?usp=email ) Change subject: mb/google/nissa/var/teliks: Add fw_config fields for rtl8852be ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/84138?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib6ba641c23cce7f1253022c9bb78b986b323bcaa Gerrit-Change-Number: 84138 Gerrit-PatchSet: 2 Gerrit-Owner: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 05:38:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/nissa/var/teliks: Add fw_config fields for rtl8852be
by Jianeng Ceng (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rishika Raj, Subrata Banik. Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rishika Raj, Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84138?usp=email to look at the new patch set (#2). Change subject: mb/google/nissa/var/teliks: Add fw_config fields for rtl8852be ...................................................................... mb/google/nissa/var/teliks: Add fw_config fields for rtl8852be Add a new fw config field for wifi category as WIFI_6_8852, which is PCIe based. Also, enable WIFI_6_8852 for existing PCIe based wifi port as well as bluetooth port. BUG=b:356434907 BRANCH=NONE TEST=Verified Wifi6 module detection Change-Id: Ib6ba641c23cce7f1253022c9bb78b986b323bcaa Signed-off-by: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/teliks/overridetree.cb M src/mainboard/google/brya/variants/teliks/variant.c 2 files changed, 8 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/84138/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84138?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib6ba641c23cce7f1253022c9bb78b986b323bcaa Gerrit-Change-Number: 84138 Gerrit-PatchSet: 2 Gerrit-Owner: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

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[S] Change in coreboot[main]: mb/google/nissa/var/teliks: Add fw_config fields for rtl8852be
by Jianeng Ceng (Code Review) 30 Aug '24

30 Aug '24

Jianeng Ceng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84138?usp=email ) Change subject: mb/google/nissa/var/teliks: Add fw_config fields for rtl8852be ...................................................................... mb/google/nissa/var/teliks: Add fw_config fields for rtl8852be Add a new fw config field for wifi category as WIFI_6_8852, which is PCIe based. Also, enable WIFI_6_8852 for existing PCIe based wifi port as well as bluetooth port. BUG=b:356434907 BRANCH=NONE TEST=Verified Wifi6 module detection Change-Id: Ib6ba641c23cce7f1253022c9bb78b986b323bcaa Signed-off-by: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/teliks/overridetree.cb M src/mainboard/google/brya/variants/teliks/variant.c 2 files changed, 7 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/84138/1 diff --git a/src/mainboard/google/brya/variants/teliks/overridetree.cb b/src/mainboard/google/brya/variants/teliks/overridetree.cb index 2f4534f..d2603f1 100644 --- a/src/mainboard/google/brya/variants/teliks/overridetree.cb +++ b/src/mainboard/google/brya/variants/teliks/overridetree.cb @@ -1,8 +1,9 @@ fw_config field WIFI 8 9 option UNKNOWN 0 - option WIFI_6 1 + option WIFI_6_7921 1 option WIFI_6E 2 + option WIFI_6_8852 3 end field CAMERA 10 11 option UF_720P_WF 0 @@ -406,7 +407,8 @@ register "wake" = "GPE0_DW1_03" register "add_acpi_dma_property" = "true" device pci 00.0 on - probe WIFI WIFI_6 + probe WIFI WIFI_6_7921 + probe WIFI WIFI_6_8852 end end end @@ -511,7 +513,8 @@ register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" device ref usb2_port8 on - probe WIFI WIFI_6 + probe WIFI WIFI_6_7921 + probe WIFI WIFI_6_8852 end end chip drivers/usb/acpi diff --git a/src/mainboard/google/brya/variants/teliks/variant.c b/src/mainboard/google/brya/variants/teliks/variant.c index 3f7cfd6..363e599 100644 --- a/src/mainboard/google/brya/variants/teliks/variant.c +++ b/src/mainboard/google/brya/variants/teliks/variant.c @@ -35,7 +35,7 @@ void fw_config_gpio_padbased_override(struct pad_config *padbased_table) { - if (fw_config_probe(FW_CONFIG(WIFI, WIFI_6))) { + if (fw_config_probe(FW_CONFIG(WIFI, WIFI_6_7921)) || fw_config_probe(FW_CONFIG(WIFI, WIFI_6_8852))) { printk(BIOS_INFO, "Enable PCie based Wifi GPIO pins.\n"); gpio_padbased_override(padbased_table, wifi_pcie_enable_pad, ARRAY_SIZE(wifi_pcie_enable_pad)); -- To view, visit https://review.coreboot.org/c/coreboot/+/84138?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib6ba641c23cce7f1253022c9bb78b986b323bcaa Gerrit-Change-Number: 84138 Gerrit-PatchSet: 1 Gerrit-Owner: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com>

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add SSPM firmware v1.0
by Jarried Lin (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/blobs/+/84027?usp=email ) Change subject: soc/mediatek/mt8196: Add SSPM firmware v1.0 ...................................................................... Patch Set 4: (2 comments) File soc/mediatek/mt8196/sspm.bin.md5: https://review.coreboot.org/c/blobs/+/84027/comment/8f50d1a3_f7a2f3fa?usp=e… : PS3, Line 1: 4da8300c63118b78c2850b53369bd8b6 sspm.bin > Which one is correct? Done https://review.coreboot.org/c/blobs/+/84027/comment/1d5fcc81_dd593e8d?usp=e… : PS3, Line 2: cbfd0cac5f9ee49a20a64291de7ab8b4 sspm.bin > `-b/--binary` should be passed (`md5sum -b sspm.bin`), resulting an `*` right before the file name. […] Done -- To view, visit https://review.coreboot.org/c/blobs/+/84027?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I180421be4077198edd4bcabc2d25ed52a3abedda Gerrit-Change-Number: 84027 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 04:50:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add SSPM firmware v1.0
by Jarried Lin (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Jarried Lin, Yidi Lin. Hello Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/blobs/+/84027?usp=email to look at the new patch set (#4). Change subject: soc/mediatek/mt8196: Add SSPM firmware v1.0 ...................................................................... soc/mediatek/mt8196: Add SSPM firmware v1.0 Add sspm.bin to support suspend/resume. TEST=NA BUG=b:317009620 Change-Id: I180421be4077198edd4bcabc2d25ed52a3abedda Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- A soc/mediatek/mt8196/README.md A soc/mediatek/mt8196/license.txt A soc/mediatek/mt8196/sspm.bin A soc/mediatek/mt8196/sspm.bin.md5 A soc/mediatek/mt8196/sspm_release_notes.txt 5 files changed, 39 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/blobs refs/changes/27/84027/4 -- To view, visit https://review.coreboot.org/c/blobs/+/84027?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I180421be4077198edd4bcabc2d25ed52a3abedda Gerrit-Change-Number: 84027 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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coreboot-gerrit August 2024