Attention is currently required from: Arthur Heymans.
Nico Huber has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84013?usp=email )
Change subject: libpayload: Fix x86 output arch
......................................................................
Patch Set 2: Code-Review+2
--
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Gerrit-Change-Id: I0f134a96c596d69e10dd441b96184b119e9f1908
Gerrit-Change-Number: 84013
Gerrit-PatchSet: 2
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83962?usp=email )
Change subject: soc/intel/pantherlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
......................................................................
soc/intel/pantherlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
This patch replaces the SoC-specific config option
`SOC_INTEL_PANTHERLAKE_DEBUG_CONSENT` with the generic
`SOC_INTEL_COMMON_DEBUG_CONSENT`.
TEST=Able to build and boot google/fatcat without any functional impact
while debugging.
Change-Id: I36bbe14d02654ed9dbda21df0d9a6a6769b87754
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83962
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
Reviewed-by: Dinesh Gehlot <digehlot(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/soc/intel/pantherlake/Kconfig
1 file changed, 9 insertions(+), 18 deletions(-)
Approvals:
build bot (Jenkins): Verified
Felix Held: Looks good to me, approved
Dinesh Gehlot: Looks good to me, approved
diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig
index 5e5516a..83d6292 100644
--- a/src/soc/intel/pantherlake/Kconfig
+++ b/src/soc/intel/pantherlake/Kconfig
@@ -218,25 +218,16 @@
string "Location of FSP headers"
default "src/vendorcode/intel/fsp/fsp2_0/pantherlake/"
-config SOC_INTEL_PANTHERLAKE_DEBUG_CONSENT
- int "Debug Consent"
- # USB DBC is more common for developers so make this default to 4 if
- # SOC_INTEL_DEBUG_CONSENT=y
+# Override platform debug consent value:
+# 0: Disabled,
+# 2: Enabled Trace active: TraceHub is enabled and trace is active, blocks s0ix,
+# 4: Enabled Trace ready: TraceHub is enabled and allowed S0ix,
+# 6: Enabled Trace power off: TraceHub is powergated, provide setting close to functional
+# low power state,
+# 7: User needs to configure Advanced Debug Settings manually.
+config SOC_INTEL_COMMON_DEBUG_CONSENT
+ int
default 4 if SOC_INTEL_DEBUG_CONSENT
- default 0
- help
- This is to control debug interface on SOC.
- Setting non-zero value will allow to use DBC or DCI to debug SOC.
- PlatformDebugConsent in FspmUpd.h has the details.
-
- Desired platform debug type are
- 0:Disabled,
- 2:Enabled Trace active: TraceHub is enabled and trace is active,
- blocks s0ix,
- 4:Enabled Trace ready: TraceHub is enabled and allowed S0ix,
- 6:Enabled Trace power off: TraceHub is powergated, provide setting close to
- functional low power state,
- 7:user needs to configure Advanced Debug Settings manually.
config DATA_BUS_WIDTH
int
--
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I36bbe14d02654ed9dbda21df0d9a6a6769b87754
Gerrit-Change-Number: 83962
Gerrit-PatchSet: 5
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com>
Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83961?usp=email )
Change subject: soc/intel/meteorlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
......................................................................
soc/intel/meteorlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
This patch replaces the SoC-specific config option
`SOC_INTEL_METEORLAKE_DEBUG_CONSENT` with the generic
`SOC_INTEL_COMMON_DEBUG_CONSENT`.
Additionally, updates the FSP configuration to use the new generic
config option.
TEST=Able to build and boot google/rex0 without any functional impact
while debugging.
Change-Id: I657d20a38e15eee333a4e45c0c600736148173d4
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83961
Reviewed-by: Dinesh Gehlot <digehlot(a)google.com>
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/soc/intel/meteorlake/Kconfig
M src/soc/intel/meteorlake/romstage/fsp_params.c
2 files changed, 6 insertions(+), 14 deletions(-)
Approvals:
build bot (Jenkins): Verified
Dinesh Gehlot: Looks good to me, approved
Felix Held: Looks good to me, approved
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 327b3a2..3b31e53 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -357,21 +357,13 @@
depends on FSP_USE_REPO
default "3rdparty/fsp/MeteorLakeFspBinPkg/Fsp.fd"
-config SOC_INTEL_METEORLAKE_DEBUG_CONSENT
- int "Debug Consent for MTL"
- # USB DBC is more common for developers so make this default to 6 if
- # SOC_INTEL_DEBUG_CONSENT=y
+# Override platform debug consent value:
+# 0:Disabled, 2:Enabled Trace Active, 4:Enabled Trace Ready,
+# 6:Enable Trace Power-Off, 7:Manual
+config SOC_INTEL_COMMON_DEBUG_CONSENT
+ int
default 6 if SOC_INTEL_DEBUG_CONSENT
default 2 if SOC_INTEL_COMMON_BLOCK_TRACEHUB
- default 0
- help
- This is to control debug interface on SOC.
- Setting non-zero value will allow to use DBC or DCI to debug SOC.
- PlatformDebugConsent in FspmUpd.h has the details.
-
- Desired platform debug type are
- 0:Disabled, 2:Enabled Trace Active, 4:Enabled Trace Ready,
- 6:Enable Trace Power-Off, 7:Manual
config DATA_BUS_WIDTH
int
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index 055fec7..84e665d 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -364,7 +364,7 @@
const struct soc_intel_meteorlake_config *config)
{
/* Set debug probe type */
- m_cfg->PlatformDebugOption = CONFIG_SOC_INTEL_METEORLAKE_DEBUG_CONSENT;
+ m_cfg->PlatformDebugOption = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
/* CrashLog config */
if (CONFIG(SOC_INTEL_CRASHLOG)) {
--
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I657d20a38e15eee333a4e45c0c600736148173d4
Gerrit-Change-Number: 83961
Gerrit-PatchSet: 4
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com>
Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Tarun <tstuli(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83957?usp=email )
Change subject: soc/intel/alderlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
......................................................................
soc/intel/alderlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
This patch replaces the SoC-specific config option
`SOC_INTEL_ALDERLAKE_DEBUG_CONSENT` with the generic
`SOC_INTEL_COMMON_DEBUG_CONSENT`.
Additionally, updates the FSP configuration to use the new generic
config option.
TEST=Able to build and boot google/redrix without any functional impact
while debugging.
Change-Id: I9a9c81b72d707f5ed2e1a53c139ee22be0e30068
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83957
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Dinesh Gehlot <digehlot(a)google.com>
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/alderlake/romstage/fsp_params.c
2 files changed, 6 insertions(+), 14 deletions(-)
Approvals:
build bot (Jenkins): Verified
Dinesh Gehlot: Looks good to me, approved
Felix Held: Looks good to me, approved
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 632798e..598c028 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -426,20 +426,12 @@
default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_N && FSP_TYPE_IOT
-config SOC_INTEL_ALDERLAKE_DEBUG_CONSENT
- int "Debug Consent for ADL"
- # USB DBC is more common for developers so make this default to 2 if
- # SOC_INTEL_DEBUG_CONSENT=y
+# Override platform debug consent value:
+# 0:Disabled, 2:Enabled (All Probes+TraceHub), 6:Enable (Low Power),
+# 7:Manual
+config SOC_INTEL_COMMON_DEBUG_CONSENT
+ int
default 2 if SOC_INTEL_DEBUG_CONSENT
- default 0
- help
- This is to control debug interface on SOC.
- Setting non-zero value will allow to use DBC or DCI to debug SOC.
- PlatformDebugConsent in FspmUpd.h has the details.
-
- Desired platform debug type are
- 0:Disabled, 2:Enabled (All Probes+TraceHub), 6:Enable (Low Power),
- 7:Manual
config DATA_BUS_WIDTH
int
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index a63b64c..b5e54f8 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -354,7 +354,7 @@
const struct soc_intel_alderlake_config *config)
{
/* Set debug probe type */
- m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT;
+ m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
/* CrashLog config */
m_cfg->CpuCrashLogDevice = CONFIG(SOC_INTEL_CRASHLOG) && is_devfn_enabled(SA_DEVFN_TMT);
--
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I9a9c81b72d707f5ed2e1a53c139ee22be0e30068
Gerrit-Change-Number: 83957
Gerrit-PatchSet: 4
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83963?usp=email )
(
3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: soc/intel/tigerlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
......................................................................
soc/intel/tigerlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
This patch drops the SoC-specific config option
`SOC_INTEL_TIGERLAKE_DEBUG_CONSENT`.
Additionally, updates the FSP configuration to use the new generic
config option.
TEST=Able to build and boot google/volteer without any functional
impact while debugging.
Change-Id: I3e96b20e7e8b3ce3c2e4884abd315a5cc55fe71d
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83963
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
---
M src/soc/intel/tigerlake/Kconfig
M src/soc/intel/tigerlake/romstage/fsp_params.c
2 files changed, 1 insertion(+), 17 deletions(-)
Approvals:
build bot (Jenkins): Verified
Felix Held: Looks good to me, approved
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 59f54aa..77e53ad 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -253,22 +253,6 @@
default "3rdparty/fsp/TigerLakeFspBinPkg/TGL_IOT/Fsp.fd" if FSP_TYPE_IOT
default "3rdparty/fsp/TigerLakeFspBinPkg/Client/Fsp.fd" if FSP_TYPE_CLIENT
-config SOC_INTEL_TIGERLAKE_DEBUG_CONSENT
- int "Debug Consent for TGL"
- # USB DBC is more common for developers so make this default to 3 if
- # SOC_INTEL_DEBUG_CONSENT=y
- default 3 if SOC_INTEL_DEBUG_CONSENT
- default 0
- help
- This is to control debug interface on SOC.
- Setting non-zero value will allow to use DBC or DCI to debug SOC.
- PlatformDebugConsent in FspmUpd.h has the details.
-
- Desired platform debug type are
- 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),
- 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC),
- 6:Enable (2-wire DCI OOB), 7:Manual
-
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0x2000
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c
index f7337f0..00b5315 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params.c
@@ -130,7 +130,7 @@
/* Enable SMBus controller based on config */
m_cfg->SmbusEnable = is_devfn_enabled(PCH_DEVFN_SMBUS);
/* Set debug probe type */
- m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_TIGERLAKE_DEBUG_CONSENT;
+ m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
/* Audio: HDAUDIO_LINK_MODE I2S/SNDW */
m_cfg->PchHdaEnable = is_devfn_enabled(PCH_DEVFN_HDA);
--
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I3e96b20e7e8b3ce3c2e4884abd315a5cc55fe71d
Gerrit-Change-Number: 83963
Gerrit-PatchSet: 5
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83960?usp=email )
(
2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: soc/intel/jasperlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
......................................................................
soc/intel/jasperlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
This patch drops the SoC-specific config option
`SOC_INTEL_JASPERLAKE_DEBUG_CONSENT`.
Additionally, updates the FSP configuration to use the new generic
config option.
TEST=Able to build and boot google/dedede without any functional
impact while debugging.
Change-Id: I3e7abaf5fb3a0d5528041af5ce767a15fc738870
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83960
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/soc/intel/jasperlake/Kconfig
M src/soc/intel/jasperlake/romstage/fsp_params.c
2 files changed, 1 insertion(+), 17 deletions(-)
Approvals:
Felix Held: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index 2871508..1502c75 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -192,22 +192,6 @@
config FSP_FD_PATH
default "3rdparty/fsp/JasperLakeFspBinPkg/Fsp.fd"
-config SOC_INTEL_JASPERLAKE_DEBUG_CONSENT
- int "Debug Consent for JSL"
- # USB DBC is more common for developers so make this default to 3 if
- # SOC_INTEL_DEBUG_CONSENT=y
- default 3 if SOC_INTEL_DEBUG_CONSENT
- default 0
- help
- This is to control debug interface on SOC.
- Setting non-zero value will allow to use DBC or DCI to debug SOC.
- PlatformDebugConsent in FspmUpd.h has the details.
-
- Desired platform debug type are
- 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),
- 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC),
- 6:Enable (2-wire DCI OOB), 7:Manual
-
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0x1400
diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c
index 0132906..0299860 100644
--- a/src/soc/intel/jasperlake/romstage/fsp_params.c
+++ b/src/soc/intel/jasperlake/romstage/fsp_params.c
@@ -96,7 +96,7 @@
m_cfg->SmbusEnable = config->SmbusEnable;
/* Set debug probe type */
- m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_JASPERLAKE_DEBUG_CONSENT;
+ m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
/* VT-d config */
m_cfg->VtdDisable = 0;
--
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I3e7abaf5fb3a0d5528041af5ce767a15fc738870
Gerrit-Change-Number: 83960
Gerrit-PatchSet: 4
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83959?usp=email )
(
2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: soc/intel/elkhartlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
......................................................................
soc/intel/elkhartlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
This patch drops the SoC-specific config option
`SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT`.
Additionally, updates the FSP configuration to use the new generic
config option.
TEST=Able to build and boot intel/elkhartlake_crb without any
functional impact while debugging.
Change-Id: Idb8db7230c432792e742218d41d891c529b2114f
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83959
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/soc/intel/elkhartlake/Kconfig
M src/soc/intel/elkhartlake/romstage/fsp_params.c
2 files changed, 1 insertion(+), 17 deletions(-)
Approvals:
Felix Held: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 42edbc6..815a7a1 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -240,22 +240,6 @@
Enable TSN GbE driver to provide board specific settings in the GBE MAC.
As an example of a possible change, the MAC address could be adjusted.
-config SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT
- int "Debug Consent for EHL"
- # USB DBC is more common for developers so make this default to 3 if
- # SOC_INTEL_DEBUG_CONSENT=y
- default 3 if SOC_INTEL_DEBUG_CONSENT
- default 0
- help
- This is to control debug interface on SOC.
- Setting non-zero value will allow to use DBC or DCI to debug SOC.
- PlatformDebugConsent in FspmUpd.h has the details.
-
- Desired platform debug type are
- 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),
- 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC),
- 6:Enable (2-wire DCI OOB), 7:Manual
-
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0x1400
diff --git a/src/soc/intel/elkhartlake/romstage/fsp_params.c b/src/soc/intel/elkhartlake/romstage/fsp_params.c
index d85f291..cebc48d 100644
--- a/src/soc/intel/elkhartlake/romstage/fsp_params.c
+++ b/src/soc/intel/elkhartlake/romstage/fsp_params.c
@@ -132,7 +132,7 @@
m_cfg->SerialIoUartDebugControllerNumber = CONFIG_UART_FOR_CONSOLE;
/* Set debug probe type */
- m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT;
+ m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
/* TraceHub configuration */
if (is_devfn_enabled(PCH_DEVFN_TRACEHUB) && config->TraceHubMode) {
--
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Idb8db7230c432792e742218d41d891c529b2114f
Gerrit-Change-Number: 83959
Gerrit-PatchSet: 4
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com>
Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83958?usp=email )
(
2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: soc/intel/cannonlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
......................................................................
soc/intel/cannonlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT
This patch drops the SoC-specific config option
`SOC_INTEL_CANNONLAKE_DEBUG_CONSENT`.
Additionally, updates the FSP configuration to use the new generic
config option.
TEST=Able to build and boot google/hatch without any functional impact
while debugging.
Change-Id: Ifad11652b5fa6ff14f713f55a721cdbbfbfde471
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83958
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/romstage/fsp_params.c
2 files changed, 1 insertion(+), 13 deletions(-)
Approvals:
build bot (Jenkins): Verified
Felix Held: Looks good to me, approved
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 3aa06f4..d012dad 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -321,17 +321,6 @@
config FSP_FD_PATH_2
default "3rdparty/fsp/CometLakeFspBinPkg/CometLake2/Fsp.fd" if SOC_INTEL_COMETLAKE_1_2
-config SOC_INTEL_CANNONLAKE_DEBUG_CONSENT
- int "Debug Consent for CNL"
- # USB DBC is more common for developers so make this default to 3 if
- # SOC_INTEL_DEBUG_CONSENT=y
- default 3 if SOC_INTEL_DEBUG_CONSENT
- default 0
- help
- This is to control debug interface on SOC.
- Setting non-zero value will allow to use DBC or DCI to debug SOC.
- PlatformDebugConsent in FspmUpd.h has the details.
-
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0xe00
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c
index 2b25285..f0dd1c3 100644
--- a/src/soc/intel/cannonlake/romstage/fsp_params.c
+++ b/src/soc/intel/cannonlake/romstage/fsp_params.c
@@ -124,8 +124,7 @@
m_cfg->SmbusEnable = is_devfn_enabled(PCH_DEVFN_SMBUS);
/* Set debug probe type */
- m_cfg->PlatformDebugConsent =
- CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT;
+ m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
/* Configure VT-d */
tconfig->VtdDisable = 0;
--
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ifad11652b5fa6ff14f713f55a721cdbbfbfde471
Gerrit-Change-Number: 83958
Gerrit-PatchSet: 4
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>