Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84018?usp=email )
Change subject: drivers/spi: add Numonyx and Micron names to STMicro case
......................................................................
drivers/spi: add Numonyx and Micron names to STMicro case
STMicro first moved their SPI NOR flash business to Numonyx which was a
joint venture with Intel which later got sold to Micron, so add a
comment to the VENDOR_ID_STMICRO JEDEC manufacturer ID define and
mention all 3 companies that have sold SPI NOR flash chips using this
manufacturer ID to the Kconfig help text of SPI_FLASH_STMICRO.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I7886396d8f0a9766f568a221c0b5ade02489060b
---
M src/drivers/spi/Kconfig
M src/include/spi-generic.h
2 files changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/84018/1
diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig
index 6d161f4..86e609c 100644
--- a/src/drivers/spi/Kconfig
+++ b/src/drivers/spi/Kconfig
@@ -146,7 +146,8 @@
default y if SPI_FLASH_INCLUDE_ALL_DRIVERS
help
Select this option if your chipset driver needs to store certain
- data in the SPI flash and your SPI flash is made by ST MICRO.
+ data in the SPI flash and your SPI flash is made by ST Micro,
+ Numonyx or Micron.
config SPI_FLASH_WINBOND
bool
diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h
index aa28232..e02da7d 100644
--- a/src/include/spi-generic.h
+++ b/src/include/spi-generic.h
@@ -23,7 +23,7 @@
#define VENDOR_ID_MACRONIX 0xc2
#define VENDOR_ID_SPANSION 0x01
#define VENDOR_ID_SST 0xbf
-#define VENDOR_ID_STMICRO 0x20
+#define VENDOR_ID_STMICRO 0x20 /* also Numonyx and Micron */
#define VENDOR_ID_WINBOND 0xef
#define VENDOR_ID_ISSI 0x9d
--
To view, visit https://review.coreboot.org/c/coreboot/+/84018?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: newchange
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I7886396d8f0a9766f568a221c0b5ade02489060b
Gerrit-Change-Number: 84018
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de>
Attention is currently required from: Jakub Czapiga, Julius Werner, Philipp Hug, ron minnich.
Nico Huber has posted comments on this change by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/79907?usp=email )
Change subject: [RFC] region: Hide struct region members
......................................................................
Patch Set 8:
(1 comment)
This change is ready for review.
File src/arch/arm/fit_payload.c:
https://review.coreboot.org/c/coreboot/+/79907/comment/cf98a684_26183517?us… :
PS8, Line 3: /* FIXME: should use the high-level region api */
> From the group review meeting: This probably won't lead to actually getting fixed. :-/ […]
Hmmm, the comments were probably a bit premature. The code seems to
use the struct only. So that's probably a case of mixing internal and
imported code too much. I guess a maintainer of this FIT support
should decide if the code should use the region API or not. If not,
we could untangle this and declare another struct.
--
To view, visit https://review.coreboot.org/c/coreboot/+/79907?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I713be9cf0bab4c2e21113b55e7229ab50f06c6cf
Gerrit-Change-Number: 79907
Gerrit-PatchSet: 8
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com>
Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-CC: coreboot org <coreboot.org(a)gmail.com>
Gerrit-Attention: Philipp Hug <philipp(a)hug.cx>
Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com>
Gerrit-Attention: Julius Werner <jwerner(a)chromium.org>
Gerrit-Attention: ron minnich <rminnich(a)gmail.com>
Gerrit-Comment-Date: Wed, 21 Aug 2024 15:02:48 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: coreboot org <coreboot.org(a)gmail.com>
Attention is currently required from: Arthur Heymans.
Raul Rangel has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84009?usp=email )
Change subject: libpayload/x86: Fix assembly for clang
......................................................................
Patch Set 1: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/84009?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I81252dc2f89b3b3da0bb9a2388a041b600920b3f
Gerrit-Change-Number: 84009
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Comment-Date: Wed, 21 Aug 2024 14:35:58 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83951?usp=email )
Change subject: mb/goog/brox: unlock gpio wake sources
......................................................................
mb/goog/brox: unlock gpio wake sources
The power off code in depthcharge disables all GPEs prior to power off.
The problem is that for gpio wake sources that are locked, this power
off code cannot successfully clear any pending interrupt from that
source. This can result in the device incorrectly waking back up after
it's been powered off from the firmware dev screen.
BUG=b:360380950, b:359692570
BRANCH=None
TEST=verify brox DUT is able to power down and stay powered down when
selecting the "Power off" button in the firmware dev screen.
Change-Id: I5cd36640677996209beb8fe29f522ff8e07ebf00
Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83951
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Eric Lai <ericllai(a)google.com>
---
M src/mainboard/google/brox/variants/jubilant/gpio.c
M src/mainboard/google/brox/variants/lotso/gpio.c
2 files changed, 2 insertions(+), 2 deletions(-)
Approvals:
Eric Lai: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/google/brox/variants/jubilant/gpio.c b/src/mainboard/google/brox/variants/jubilant/gpio.c
index 0540cd1..a8e652c 100644
--- a/src/mainboard/google/brox/variants/jubilant/gpio.c
+++ b/src/mainboard/google/brox/variants/jubilant/gpio.c
@@ -41,7 +41,7 @@
/* GPP_D15 : ISH_UART0_RTS_L/I2C7B_SDA ==> FPMCU_RST_J_SUB_L (active low) */
PAD_CFG_GPO_LOCK(GPP_D15, 0, LOCK_CONFIG),
/* GPP_F15 : [NF1: GSXSRESET# NF3: THC1_SPI2_IO3 NF6: USB_C_GPP_F15] ==> FP GSPI INT */
- PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F15, NONE, LEVEL, INVERT, LOCK_CONFIG),
+ PAD_CFG_GPI_IRQ_WAKE(GPP_F15, NONE, PWROK, LEVEL, INVERT),
/* GPP_F11 : [NF3: THC1_SPI2_CLK NF4: GSPI1_CLK NF6: USB_C_GPP_F11] ==> FP GSPI CLK */
PAD_CFG_NF_LOCK(GPP_F11, NONE, NF4, LOCK_CONFIG),
/* GPP_F12 : [NF1: GSXDOUT NF3: THC1_SPI2_IO0 NF4: GSPI1_MOSI NF5: I2C1A_SCL
diff --git a/src/mainboard/google/brox/variants/lotso/gpio.c b/src/mainboard/google/brox/variants/lotso/gpio.c
index c85363d..0b98286 100644
--- a/src/mainboard/google/brox/variants/lotso/gpio.c
+++ b/src/mainboard/google/brox/variants/lotso/gpio.c
@@ -34,7 +34,7 @@
PAD_NC(GPP_E15, NONE),
/* GPP_E18 : [NF1: DDP1_CTRLCLK NF4: TBT_LSX0_TXD NF5: BSSB_LS0_RX
* NF6: USB_C_GPP_E18] ==> SOC_FPMCU_INT_L */
- PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_E18, NONE, LEVEL, INVERT, LOCK_CONFIG),
+ PAD_CFG_GPI_IRQ_WAKE(GPP_E18, NONE, PWROK, LEVEL, INVERT),
/* GPP_E20 : [NF1: DDP2_CTRLCLK NF4: TBT_LSX1_TXD NF5: BSSB_LS1_RX
* NF6: USB_C_GPP_E20] ==> EN_FP_PWR */
PAD_CFG_GPO_LOCK(GPP_E20, 0, LOCK_CONFIG),
--
To view, visit https://review.coreboot.org/c/coreboot/+/83951?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I5cd36640677996209beb8fe29f522ff8e07ebf00
Gerrit-Change-Number: 83951
Gerrit-PatchSet: 2
Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com>
Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com>
Gerrit-Reviewer: Eric Lai <ericllai(a)google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>