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Change subject: mb/google/trulo/var/orisa: Add fw_config field for PDC control
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Patch Set 5:
(1 comment)
Patchset:
PS5:
where and when will this be used?
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Change subject: mb/google/brox/var/lotso: Update DTT settings for thermal control
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Patch Set 3:
(2 comments)
File src/mainboard/google/brox/variants/lotso/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/83304/comment/9a80f9e8_22700c6a?us… :
PS3, Line 126: 12000
> Please share the reason for changing this to lower value, ie. from 15W to 12W.
The project requirement is 12W, we don't need to set pl1 to 15w,which will cause the skin temperature to be worse
https://review.coreboot.org/c/coreboot/+/83304/comment/85d7162b_4c688bea?us… :
PS3, Line 134: 25000
> Share details on lowering the PL2 Max and Min values from 55W to 25W. […]
When the CPU is working, there will be a turbo time. The higher the PL2 setting, the shorter the turbo time. Both the PL2 value and the turbo time will affect the benchmark score. I have done some verification, PL2 set at 25 is the highest run score
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Change subject: mb/google/brask/var/bujia: Hook up two missing sensors for wireless and memory
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Patch Set 8:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83302/comment/d0dbf9e4_abbd9f06?us… :
PS8, Line 13: TEST= USE="-project_all project_bujia" emerge-brask coreboot
> If you have the device already, what command did you run or what logs did you look at?
We check form ACPI SSDT table on DUT.
and intel dynamic tuning tool can see new TSR
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Change subject: brox/var/lotso: Select USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
Hi Karthik && Subrate,
Sorry to bother you, please see if you can review +2 for me in your free time.
We may need to import it as soon as possible because it seems to affect the normal testing progress
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Change subject: mb: source site-local mainboard Kconfig.name and Kconfig files
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> Why is symlinking a problem now? Or in other words, why doesn't that work anymore?
I don't think we allow symlinks to be checked into the coreboot repo, though I do see some in submodule repos. It's probably also good to have the repo clone-able in environments such as Windows where symlinks don't work at all (AFAIK).
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Change subject: mb: source site-local mainboard Kconfig.name and Kconfig files
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> Why is symlinking a problem now? Or in other words, why doesn't that work anymore?
it's not a problem, but this works without symlinking.
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Change subject: mb: source site-local mainboard Kconfig.name and Kconfig files
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Patch Set 2:
(1 comment)
Patchset:
PS2:
> David, obviously we could do it for just AMD, but I'd rather keep it uniform unless there's a good r […]
Why is symlinking a problem now? Or in other words, why doesn't that work anymore?
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Change subject: mb: source site-local mainboard Kconfig.name and Kconfig files
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Patch Set 2: Code-Review+2
(1 comment)
Patchset:
PS2:
I don't see a reason to block this. If anyone comes up with a better proposal then we can undo these changes.
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83343?usp=email )
Change subject: soc/amd/common/acpi/ivrs: use PCI_DEVFN macro
......................................................................
soc/amd/common/acpi/ivrs: use PCI_DEVFN macro
Use the PCI_DEVFN macro to make the calculation of the ivhd->device_id
value a bit clearer.
TEST=Timeless build results in identical binary for Mandolin
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I7b7949ad3524790e7d7d527c488a32e785f55bc0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83343
Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/soc/amd/common/block/acpi/ivrs.c
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Matt DeVillier: Looks good to me, approved
diff --git a/src/soc/amd/common/block/acpi/ivrs.c b/src/soc/amd/common/block/acpi/ivrs.c
index a2f7715..451a6c0 100644
--- a/src/soc/amd/common/block/acpi/ivrs.c
+++ b/src/soc/amd/common/block/acpi/ivrs.c
@@ -332,7 +332,7 @@
ivhd->length = sizeof(struct acpi_ivrs_ivhd);
/* BDF <bus>:00.2 */
- ivhd->device_id = 0x02 | (nb_dev->upstream->secondary << 8);
+ ivhd->device_id = PCI_DEVFN(0, 2) | (nb_dev->upstream->secondary << 8);
ivhd->capability_offset = pci_find_capability(iommu_dev, IOMMU_CAP_ID);
ivhd->iommu_base_low = pci_read_config32(iommu_dev, IOMMU_CAP_BASE_LO) & 0xffffc000;
ivhd->iommu_base_high = pci_read_config32(iommu_dev, IOMMU_CAP_BASE_HI);
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Attention is currently required from: Nicholas Chin.
Angel Pons has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/83344?usp=email )
Change subject: autoport: Print location of generated sources
......................................................................
Patch Set 1: Code-Review+2
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