Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83455?usp=email )
Change subject: mb/protectli/vault_cml: Drop superfluous devices from devicetree
......................................................................
mb/protectli/vault_cml: Drop superfluous devices from devicetree
In order to clean up a bit, drop devices which are equivalent to the
ones from chipset devicetree.
Change-Id: Ie485684747efccb8fb0ab87f10694c52a98f3c88
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/protectli/vault_cml/devicetree.cb
1 file changed, 0 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/83455/1
diff --git a/src/mainboard/protectli/vault_cml/devicetree.cb b/src/mainboard/protectli/vault_cml/devicetree.cb
index ccfe118..14e6048 100644
--- a/src/mainboard/protectli/vault_cml/devicetree.cb
+++ b/src/mainboard/protectli/vault_cml/devicetree.cb
@@ -140,42 +140,18 @@
}"
device domain 0 on
- device ref system_agent on end
device ref igpu on end
device ref dptf on end
- device ref gna off end
device ref thermal on end
- device ref ufs off end
- device ref gspi2 off end
device ref xhci on end
- device ref xdci off end
- device ref sdxc off end
- device ref i2c0 off end
- device ref i2c1 off end
- device ref i2c2 off end
- device ref i2c3 off end
- device ref heci1 on end
- device ref heci2 off end
- device ref csme_ider off end
- device ref csme_ktr off end
- device ref heci3 off end
- device ref heci4 off end
device ref sata on end
- device ref i2c4 off end
- device ref i2c5 off end
- device ref uart2 off end
device ref emmc on end
- device ref pcie_rp1 off end
- device ref pcie_rp2 off end
- device ref pcie_rp3 off end
- device ref pcie_rp4 off end
device ref pcie_rp5 on end # LAN1
device ref pcie_rp6 on end # LAN2
device ref pcie_rp7 on end # LAN3
device ref pcie_rp8 on end # LAN4
device ref pcie_rp9 on end # LAN5
device ref pcie_rp10 on end # LAN6
- device ref pcie_rp11 off end
device ref pcie_rp12 on end
smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther"
"M.2/E 2230 (M2_WIFI2)" "SlotDataBusWidth1X"
@@ -183,13 +159,6 @@
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther"
"M.2/M 2280 (J1)" "SlotDataBusWidth4X"
end
- device ref pcie_rp14 off end
- device ref pcie_rp15 off end
- device ref pcie_rp16 off end
- device ref uart0 off end
- device ref uart1 off end
- device ref gspi0 off end
- device ref gspi1 off end
device ref lpc_espi on
chip superio/ite/it8784e
register "TMPIN1.mode" = "THERMAL_RESISTOR"
@@ -231,11 +200,7 @@
device pnp 0c31.0 on end
end
end
- device ref p2sb hidden end
- device ref pmc hidden end
device ref hda on end
device ref smbus on end
- device ref fast_spi on end
- device ref gbe off end
end
end
--
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Gerrit-MessageType: newchange
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ie485684747efccb8fb0ab87f10694c52a98f3c88
Gerrit-Change-Number: 83455
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83454?usp=email )
Change subject: mb/google/poppy: Drop superfluous devices from devicetree
......................................................................
mb/google/poppy: Drop superfluous devices from devicetree
In order to clean up a bit, drop devices which are equivalent to the
ones from chipset devicetree.
Change-Id: Ief199db47fc529c510709ac37be6014b63244e84
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/google/poppy/variants/atlas/devicetree.cb
M src/mainboard/google/poppy/variants/baseboard/devicetree.cb
M src/mainboard/google/poppy/variants/nami/devicetree.cb
M src/mainboard/google/poppy/variants/nautilus/devicetree.cb
M src/mainboard/google/poppy/variants/nocturne/devicetree.cb
M src/mainboard/google/poppy/variants/rammus/devicetree.cb
M src/mainboard/google/poppy/variants/soraka/devicetree.cb
7 files changed, 0 insertions(+), 177 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/83454/1
diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
index 48b9a920..04df902 100644
--- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
@@ -202,11 +202,9 @@
}"
device domain 0 on
- device ref system_agent on end
device ref igpu on end
device ref sa_thermal on end
device ref imgu on end
- device ref ish off end
device ref south_xhci on
register "usb2_ports" = "{
[0] = USB2_PORT_LONG(OC0), // Type-C Port 1
@@ -262,7 +260,6 @@
device i2c 0x49 on end
end
end
- device ref i2c1 off end
device ref i2c2 on
chip drivers/i2c/hid
register "generic.hid" = ""ACPI0C50""
@@ -275,13 +272,7 @@
end
device ref i2c3 on end # Camera
device ref heci1 on end
- device ref heci2 off end
- device ref csme_ider off end
- device ref csme_ktr off end
- device ref heci3 off end
- device ref sata off end
device ref uart2 on end
- device ref i2c5 off end
device ref i2c4 on
chip drivers/i2c/max98373
register "vmon_slot_no" = "4"
@@ -330,19 +321,7 @@
device pci 00.0 on end
end
end
- device ref pcie_rp2 off end
- device ref pcie_rp3 off end
- device ref pcie_rp4 off end
- device ref pcie_rp5 off end
- device ref pcie_rp6 off end
- device ref pcie_rp7 off end
- device ref pcie_rp8 off end
- device ref pcie_rp9 off end
- device ref pcie_rp10 off end
- device ref pcie_rp11 off end
- device ref pcie_rp12 off end
device ref uart0 on end
- device ref uart1 off end
device ref gspi0 on
chip drivers/spi/acpi
register "hid" = "ACPI_DT_NAMESPACE_HID"
@@ -351,10 +330,7 @@
device spi 0 on end
end
end
- device ref gspi1 off end
device ref emmc on end
- device ref sdio off end
- device ref sdxc off end
device ref lpc_espi on
# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
register "gen1_dec" = "0x00fc0801"
@@ -366,11 +342,8 @@
device pnp 0c09.0 on end
end
end
- device ref p2sb on end
- device ref pmc on end
device ref hda on end
device ref smbus on end
device ref fast_spi on end
- device ref gbe off end
end
end
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
index 17eee30..feea932 100644
--- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
@@ -217,7 +217,6 @@
register "sdcard_cd_gpio" = "GPP_E15"
device domain 0 on
- device ref system_agent on end
device ref igpu on end
device ref sa_thermal on end
device ref imgu on end
@@ -293,11 +292,6 @@
end
end
device ref heci1 on end
- device ref heci2 off end
- device ref csme_ider off end
- device ref csme_ktr off end
- device ref heci3 off end
- device ref sata off end
device ref uart2 on end
device ref i2c5 on
chip drivers/i2c/max98927
@@ -340,23 +334,8 @@
device pci 00.0 on end
end
end
- device ref pcie_rp2 off end
- device ref pcie_rp3 off end
- device ref pcie_rp4 off end
- device ref pcie_rp5 off end
- device ref pcie_rp6 off end
- device ref pcie_rp7 off end
- device ref pcie_rp8 off end
- device ref pcie_rp9 off end
- device ref pcie_rp10 off end
- device ref pcie_rp11 off end
- device ref pcie_rp12 off end
device ref uart0 on end
- device ref uart1 off end
- device ref gspi0 off end
- device ref gspi1 off end
device ref emmc on end
- device ref sdio off end
device ref sdxc on end
device ref lpc_espi on
# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
@@ -369,11 +348,8 @@
device pnp 0c09.0 on end
end
end
- device ref p2sb on end
- device ref pmc on end
device ref hda on end
device ref smbus on end
device ref fast_spi on end
- device ref gbe off end
end
end
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb
index b970077..139a3c8 100644
--- a/src/mainboard/google/poppy/variants/nami/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb
@@ -211,10 +211,8 @@
}"
device domain 0 on
- device ref system_agent on end
device ref igpu on end
device ref sa_thermal on end
- device ref imgu off end
device ref south_xhci on
register "usb2_ports" = "{
[0] = USB2_PORT_LONG(OC0), // Type-C Port 0
@@ -235,7 +233,6 @@
end
device ref south_xdci on end
device ref thermal on end
- device ref cio off end
device ref i2c0 on
chip drivers/i2c/generic
register "hid" = ""ELAN0001""
@@ -365,17 +362,8 @@
end
end
device ref heci1 on end
- device ref heci2 off end
- device ref csme_ider off end
- device ref csme_ktr off end
- device ref heci3 off end
- device ref sata off end
device ref uart2 on end
- device ref i2c5 off end
- device ref i2c4 off end
device ref pcie_rp1 on end
- device ref pcie_rp2 off end
- device ref pcie_rp3 off end
device ref pcie_rp4 on
# x1
register "PcieRpEnable[3]" = "1"
@@ -398,9 +386,6 @@
register "PcieRpAdvancedErrorReporting[4]" = "1"
register "PcieRpLtrEnable[4]" = "1"
end
- device ref pcie_rp6 off end
- device ref pcie_rp7 off end
- device ref pcie_rp8 off end
device ref pcie_rp9 on
# x2
register "PcieRpEnable[8]" = "1"
@@ -410,11 +395,7 @@
register "PcieRpAdvancedErrorReporting[8]" = "1"
register "PcieRpLtrEnable[8]" = "1"
end
- device ref pcie_rp10 off end
- device ref pcie_rp11 off end
- device ref pcie_rp12 off end
device ref uart0 on end
- device ref uart1 off end
device ref gspi0 on
chip drivers/spi/acpi
register "hid" = "ACPI_DT_NAMESPACE_HID"
@@ -435,8 +416,6 @@
end # FPMCU
end
device ref emmc on end
- device ref sdio off end
- device ref sdxc off end
device ref lpc_espi on
# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
register "gen1_dec" = "0x00fc0801"
@@ -448,11 +427,8 @@
device pnp 0c09.0 on end
end
end
- device ref p2sb on end
- device ref pmc on end
device ref hda on end
device ref smbus on end
device ref fast_spi on end
- device ref gbe off end
end
end
diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
index 92d72f8..363b614 100644
--- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
@@ -247,7 +247,6 @@
register "sdcard_cd_gpio" = "GPP_E15"
device domain 0 on
- device ref system_agent on end
device ref igpu on end
device ref sa_thermal on end
device ref imgu on end
@@ -326,11 +325,6 @@
end
end
device ref heci1 on end
- device ref heci2 off end
- device ref csme_ider off end
- device ref csme_ktr off end
- device ref heci3 off end
- device ref sata off end
device ref uart2 on end
device ref i2c5 on
chip drivers/generic/max98357a
@@ -378,23 +372,8 @@
device pci 00.0 on end
end
end
- device ref pcie_rp2 off end
- device ref pcie_rp3 off end
- device ref pcie_rp4 off end
- device ref pcie_rp5 off end
- device ref pcie_rp6 off end
- device ref pcie_rp7 off end
- device ref pcie_rp8 off end
- device ref pcie_rp9 off end
- device ref pcie_rp10 off end
- device ref pcie_rp11 off end
- device ref pcie_rp12 off end
device ref uart0 on end
- device ref uart1 off end
- device ref gspi0 off end
- device ref gspi1 off end
device ref emmc on end
- device ref sdio off end
device ref sdxc on end
device ref lpc_espi on
# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
@@ -407,11 +386,8 @@
device pnp 0c09.0 on end
end
end
- device ref p2sb on end
- device ref pmc on end
device ref hda on end
device ref smbus on end
device ref fast_spi on end
- device ref gbe off end
end
end
diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
index 27b2f0b..5f94e93 100644
--- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
@@ -204,7 +204,6 @@
}"
device domain 0 on
- device ref system_agent on end
device ref igpu on end
device ref sa_thermal on end
device ref imgu on end
@@ -286,14 +285,8 @@
register "proxraw_strength" = "0"
end
end
- device ref i2c2 off end
device ref i2c3 on end
device ref heci1 on end
- device ref heci2 off end
- device ref csme_ider off end
- device ref csme_ktr off end
- device ref heci3 off end
- device ref sata off end
device ref uart2 on end
device ref i2c5 on
chip drivers/i2c/sx9310
@@ -343,13 +336,6 @@
device pci 00.0 on end
end
end
- device ref pcie_rp2 off end
- device ref pcie_rp3 off end
- device ref pcie_rp4 off end
- device ref pcie_rp5 off end
- device ref pcie_rp6 off end
- device ref pcie_rp7 off end
- device ref pcie_rp8 off end
device ref pcie_rp9 on
# x2
register "PcieRpEnable[8]" = "1"
@@ -359,11 +345,6 @@
register "PcieRpAdvancedErrorReporting[8]" = "1"
register "PcieRpLtrEnable[8]" = "1"
end
- device ref pcie_rp10 off end
- device ref pcie_rp11 off end
- device ref pcie_rp12 off end
- device ref uart0 off end
- device ref uart1 off end
device ref gspi0 on
chip drivers/spi/acpi
register "hid" = "ACPI_DT_NAMESPACE_HID"
@@ -384,8 +365,6 @@
end # FPMCU
end
device ref emmc on end
- device ref sdio off end
- device ref sdxc off end
device ref lpc_espi on
# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
register "gen1_dec" = "0x00fc0801"
@@ -397,11 +376,8 @@
device pnp 0c09.0 on end
end
end
- device ref p2sb on end
- device ref pmc on end
device ref hda on end
device ref smbus on end
device ref fast_spi on end
- device ref gbe off end
end
end
diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb
index 8c8eb7f..3743385 100644
--- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb
@@ -198,10 +198,8 @@
register "sdcard_cd_gpio" = "GPP_E15"
device domain 0 on
- device ref system_agent on end
device ref igpu on end
device ref sa_thermal on end
- device ref imgu off end
device ref south_xhci on
register "usb2_ports" = "{
[0] = USB2_PORT_SHORT(OC0), // Type-C Port 1
@@ -250,9 +248,7 @@
end
end
end
- device ref south_xdci off end
device ref thermal on end
- device ref cio off end
device ref i2c0 on
chip drivers/i2c/hid
register "generic.hid" = ""PNP0C50""
@@ -278,14 +274,7 @@
device i2c 15 on end
end
end
- device ref i2c2 off end
- device ref i2c3 off end
device ref heci1 on end
- device ref heci2 off end
- device ref csme_ider off end
- device ref csme_ktr off end
- device ref heci3 off end
- device ref sata off end
device ref uart2 on end
device ref i2c5 on
chip drivers/i2c/max98927
@@ -324,7 +313,6 @@
device i2c 1A on end
end
end
- device ref i2c4 off end
device ref pcie_rp1 on
register "PcieRpEnable[0]" = "1"
register "PcieRpClkReqSupport[0]" = "1"
@@ -337,19 +325,7 @@
device pci 00.0 on end
end
end
- device ref pcie_rp2 off end
- device ref pcie_rp3 off end
- device ref pcie_rp4 off end
- device ref pcie_rp5 off end
- device ref pcie_rp6 off end
- device ref pcie_rp7 off end
- device ref pcie_rp8 off end
- device ref pcie_rp9 off end
- device ref pcie_rp10 off end
- device ref pcie_rp11 off end
- device ref pcie_rp12 off end
device ref uart0 on end
- device ref uart1 off end
device ref gspi0 on
chip drivers/spi/acpi
register "hid" = "ACPI_DT_NAMESPACE_HID"
@@ -358,9 +334,7 @@
device spi 0 on end
end
end
- device ref gspi1 off end
device ref emmc on end
- device ref sdio off end
device ref sdxc on end
device ref lpc_espi on
# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
@@ -373,11 +347,8 @@
device pnp 0c09.0 on end
end
end
- device ref p2sb on end
- device ref pmc on end
device ref hda on end
device ref smbus on end
device ref fast_spi on end
- device ref gbe off end
end
end
diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
index 5cb0f7d..2d1a509 100644
--- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
@@ -227,7 +227,6 @@
register "sdcard_cd_gpio" = "GPP_E15"
device domain 0 on
- device ref system_agent on end
device ref igpu on end
device ref sa_thermal on end
device ref imgu on end
@@ -274,13 +273,7 @@
end
end
device ref i2c2 on end
- device ref i2c3 off end
device ref heci1 on end
- device ref heci2 off end
- device ref csme_ider off end
- device ref csme_ktr off end
- device ref heci3 off end
- device ref sata off end
device ref uart2 on end
device ref i2c5 on
chip drivers/i2c/max98927
@@ -323,23 +316,8 @@
device pci 00.0 on end
end
end
- device ref pcie_rp2 off end
- device ref pcie_rp3 off end
- device ref pcie_rp4 off end
- device ref pcie_rp5 off end
- device ref pcie_rp6 off end
- device ref pcie_rp7 off end
- device ref pcie_rp8 off end
- device ref pcie_rp9 off end
- device ref pcie_rp10 off end
- device ref pcie_rp11 off end
- device ref pcie_rp12 off end
device ref uart0 on end
- device ref uart1 off end
- device ref gspi0 off end
- device ref gspi1 off end
device ref emmc on end
- device ref sdio off end
device ref sdxc on end
device ref lpc_espi on
# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
@@ -352,11 +330,8 @@
device pnp 0c09.0 on end
end
end
- device ref p2sb on end
- device ref pmc on end
device ref hda on end
device ref smbus on end
device ref fast_spi on end
- device ref gbe off end
end
end
--
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Gerrit-MessageType: newchange
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ief199db47fc529c510709ac37be6014b63244e84
Gerrit-Change-Number: 83454
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83409?usp=email )
(
2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: mb/google/hatch/var/jinlon: Replace hardcoded address with device type
......................................................................
mb/google/hatch/var/jinlon: Replace hardcoded address with device type
Eliminates the use of a magic number, and the resulting DID entry in
the _DOD method is the same. The first entry was already changed in
commit 1810a1841528 ("mb/google/*: Replace use of gfx/generic addr
field with display type"), this one was missed.
TEST=build/boot google/jinlon w/o privacy screen, dump SSDT and verify
DID entry is unchanged but _ADR is now correct (since the DID flags are
not part of the address field).
Change-Id: Ief22928ea831d4cb5b483406ac388218a97ad98b
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83409
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
---
M src/mainboard/google/hatch/variants/jinlon/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
Felix Singer: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
index 81e7883..88753de 100644
--- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
@@ -85,7 +85,7 @@
register "device_count" = "1"
register "device[0].name" = ""LCD0""
# Internal panel on the first port of the graphics chip
- register "device[0].addr" = "0x80010400"
+ register "device[0].type" = "panel"
device generic 1 alias no_eps on end
end
end
--
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ief22928ea831d4cb5b483406ac388218a97ad98b
Gerrit-Change-Number: 83409
Gerrit-PatchSet: 4
Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com>
Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78840?usp=email )
(
5 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: mb/system76/whl-u/dt: Make use of chipset devicetree
......................................................................
mb/system76/whl-u/dt: Make use of chipset devicetree
Make use of the alias names defined in the chipset devicetree and remove
devices which are equal to the ones from the chipset devicetree.
Change-Id: Iebe5f8729d463767f5a1b52c375d11bb9d413144
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78840
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Tim Crawford <tcrawford(a)system76.com>
---
M src/mainboard/system76/whl-u/devicetree.cb
M src/mainboard/system76/whl-u/variants/darp5/overridetree.cb
M src/mainboard/system76/whl-u/variants/galp3-c/overridetree.cb
3 files changed, 20 insertions(+), 57 deletions(-)
Approvals:
build bot (Jenkins): Verified
Tim Crawford: Looks good to me, approved
diff --git a/src/mainboard/system76/whl-u/devicetree.cb b/src/mainboard/system76/whl-u/devicetree.cb
index 6607f45..24ea49f 100644
--- a/src/mainboard/system76/whl-u/devicetree.cb
+++ b/src/mainboard/system76/whl-u/devicetree.cb
@@ -59,18 +59,14 @@
device cpu_cluster 0 on end
device domain 0 on
- device pci 00.0 on end # Host Bridge
- device pci 02.0 on # Integrated Graphics Device
+ device ref igpu on
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
end
- device pci 04.0 on # SA Thermal device
+ device ref dptf on
register "Device4Enable" = "1"
end
- device pci 12.0 on end # Thermal Subsystem
- device pci 12.5 off end # UFS SCS
- device pci 12.6 off end # GSPI #2
- device pci 13.0 off end # Integrated Sensor Hub
- device pci 14.0 on # USB xHCI
+ device ref thermal on end
+ device ref xhci on
register "usb2_ports" = "{
[0] = USB2_PORT_MID(OC_SKIP), /* USB-A */
[1] = USB2_PORT_MID(OC_SKIP), /* 3G / LTE */
@@ -88,39 +84,22 @@
[5] = USB3_PORT_EMPTY, /* Used by TBT */
}"
end
- device pci 14.1 off end # USB xDCI (OTG)
- device pci 14.3 on # CNVi wifi
+ device ref cnvi_wifi on
chip drivers/wifi/generic
register "wake" = "PME_B0_EN_BIT"
device generic 0 on end
end
end
- device pci 14.5 off end # SDCard
- device pci 15.0 on end # I2C #0
- device pci 15.1 off end # I2C #1
- device pci 15.2 off end # I2C #2
- device pci 15.3 off end # I2C #3
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 off end # Management Engine KT Redirection
- device pci 16.4 off end # Management Engine Interface 3
- device pci 16.5 off end # Management Engine Interface 4
- device pci 17.0 on # SATA
+ device ref i2c0 on end
+ device ref sata on
register "SataPortsEnable" = "{
[0] = 1,
[2] = 1,
}"
end
- device pci 19.0 off end # I2C #4
- device pci 19.1 off end # I2C #5
- device pci 19.2 on end # UART #2
- device pci 1a.0 off end # eMMC
- device pci 1c.0 on end # PCI Express Port 1
- device pci 1c.1 off end # PCI Express Port 2
- device pci 1c.2 off end # PCI Express Port 3
- device pci 1c.3 off end # PCI Express Port 4
- device pci 1c.4 on # PCI Express Port 5
+ device ref uart2 on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp5 on
# PCI Express Root port #5 x4, Clock 4 (TBT)
register "PcieRpEnable[4]" = "1"
register "PcieRpLtrEnable[4]" = "1"
@@ -128,40 +107,28 @@
register "PcieClkSrcUsage[4]" = "4"
register "PcieClkSrcClkReq[4]" = "4"
end
- device pci 1c.5 off end # PCI Express Port 6
- device pci 1c.6 off end # PCI Express Port 7
- device pci 1c.7 off end # PCI Express Port 8
- device pci 1d.0 on # PCI Express Port 9
+ device ref pcie_rp9 on
# PCI Express Root port #9 x1, Clock 3 (LAN)
register "PcieRpEnable[8]" = "1"
register "PcieRpLtrEnable[8]" = "1"
register "PcieClkSrcUsage[3]" = "8"
register "PcieClkSrcClkReq[3]" = "3"
end
- device pci 1d.1 on # PCI Express Port 10
+ device ref pcie_rp10 on
# PCI Express Root port #10 x1, Clock 2 (WLAN)
register "PcieRpEnable[9]" = "1"
register "PcieRpLtrEnable[9]" = "0"
register "PcieClkSrcUsage[2]" = "9"
register "PcieClkSrcClkReq[2]" = "2"
end
- device pci 1d.2 off end # PCI Express Port 11
- device pci 1d.3 off end # PCI Express Port 12
- device pci 1d.4 on # PCI Express Port 13
+ device ref pcie_rp13 on
# PCI Express Root port #13 x4, Clock 5 (NVMe)
register "PcieRpEnable[12]" = "1"
register "PcieRpLtrEnable[12]" = "1"
register "PcieClkSrcUsage[5]" = "12"
register "PcieClkSrcClkReq[5]" = "5"
end
- device pci 1d.5 off end # PCI Express Port 14
- device pci 1d.6 off end # PCI Express Port 15
- device pci 1d.7 off end # PCI Express Port 16
- device pci 1e.0 off end # UART #0
- device pci 1e.1 off end # UART #1
- device pci 1e.2 off end # GSPI #0
- device pci 1e.3 off end # GSPI #1
- device pci 1f.0 on # LPC Interface
+ device ref lpc_espi on
register "gen1_dec" = "0x000c0081"
register "gen2_dec" = "0x00040069"
register "gen3_dec" = "0x00fc0e01"
@@ -170,15 +137,11 @@
device pnp 0c31.0 on end
end
end
- device pci 1f.1 off end # P2SB
- device pci 1f.2 hidden end # Power Management Controller
- device pci 1f.3 on # Intel HDA
+ device ref hda on
register "PchHdaAudioLinkHda" = "1"
register "PchHdaAudioLinkDmic0" = "1"
register "PchHdaAudioLinkDmic1" = "1"
end
- device pci 1f.4 on end # SMBus
- device pci 1f.5 on end # PCH SPI
- device pci 1f.6 off end # GbE
+ device ref smbus on end
end
end
diff --git a/src/mainboard/system76/whl-u/variants/darp5/overridetree.cb b/src/mainboard/system76/whl-u/variants/darp5/overridetree.cb
index c72111a..9470474 100644
--- a/src/mainboard/system76/whl-u/variants/darp5/overridetree.cb
+++ b/src/mainboard/system76/whl-u/variants/darp5/overridetree.cb
@@ -3,7 +3,7 @@
chip soc/intel/cannonlake
device domain 0 on
subsystemid 0x1558 0x1325 inherit
- device pci 15.0 on
+ device ref i2c0 on
chip drivers/i2c/hid
register "generic.hid" = ""SYNA1202""
register "generic.desc" = ""Synaptics Touchpad""
@@ -12,6 +12,6 @@
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end
- end # I2C #0
+ end
end
end
diff --git a/src/mainboard/system76/whl-u/variants/galp3-c/overridetree.cb b/src/mainboard/system76/whl-u/variants/galp3-c/overridetree.cb
index 4556940..455aafd 100644
--- a/src/mainboard/system76/whl-u/variants/galp3-c/overridetree.cb
+++ b/src/mainboard/system76/whl-u/variants/galp3-c/overridetree.cb
@@ -3,8 +3,8 @@
chip soc/intel/cannonlake
device domain 0 on
subsystemid 0x1558 0x1323 inherit
- device pci 15.0 on
+ device ref i2c0 on
# I2C HID not supported on galp3-c
- end # I2C #0
+ end
end
end
--
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Iebe5f8729d463767f5a1b52c375d11bb9d413144
Gerrit-Change-Number: 78840
Gerrit-PatchSet: 8
Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com>
Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78839?usp=email )
(
5 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: mb/system76/oryp5/dt: Make use of chipset devicetree
......................................................................
mb/system76/oryp5/dt: Make use of chipset devicetree
Make use of the alias names defined in the chipset devicetree and remove
devices which are equal to the ones from the chipset devicetree.
Change-Id: I4769f255ce5652a9969ad6535c997ec1ad0be8d2
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78839
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Tim Crawford <tcrawford(a)system76.com>
---
M src/mainboard/system76/oryp5/devicetree.cb
1 file changed, 19 insertions(+), 63 deletions(-)
Approvals:
Tim Crawford: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/system76/oryp5/devicetree.cb b/src/mainboard/system76/oryp5/devicetree.cb
index ae52165..13da8f1 100644
--- a/src/mainboard/system76/oryp5/devicetree.cb
+++ b/src/mainboard/system76/oryp5/devicetree.cb
@@ -60,23 +60,19 @@
device domain 0 on
subsystemid 0x1558 0x95e6 inherit
- device pci 00.0 on end # Host Bridge
- device pci 01.0 on # GPU Port
+ device ref peg0 on
# PCI Express Graphics #0 x16, Clock 8 (NVIDIA GPU)
register "PcieClkSrcUsage[8]" = "0x40"
register "PcieClkSrcClkReq[8]" = "8"
end
- device pci 02.0 on # Integrated Graphics Device
+ device ref igpu on
register "gfx" = "GMA_DEFAULT_PANEL(0)"
end
- device pci 04.0 on # SA Thermal device
+ device ref dptf on
register "Device4Enable" = "1"
end
- device pci 12.0 on end # Thermal Subsystem
- device pci 12.5 off end # UFS SCS
- device pci 12.6 off end # GSPI #2
- device pci 13.0 off end # Integrated Sensor Hub
- device pci 14.0 on # USB xHCI
+ device ref thermal on end
+ device ref xhci on
register "usb2_ports" = "{
[0] = USB2_PORT_TYPE_C(OC_SKIP), /* Type-C */
[1] = USB2_PORT_TYPE_C(OC_SKIP), /* Type-C/DP */
@@ -96,95 +92,59 @@
[6] = USB3_PORT_DEFAULT(OC_SKIP), /* 3G/LTE */
}"
end
- device pci 14.1 off end # USB xDCI (OTG)
- device pci 14.2 on end # Shared SRAM
- device pci 14.3 on # CNVi wifi
+ device ref shared_sram on end
+ device ref cnvi_wifi on
#chip drivers/intel/wifi
# register "wake" = "PME_B0_EN_BIT"
#end
end
- device pci 14.5 off end # SDCard
- device pci 15.0 on # I2C #0
+ device ref i2c0 on
# I2C HID not supported on PNP0f13
end
- device pci 15.1 on end # I2C #1
- device pci 15.2 off end # I2C #2
- device pci 15.3 off end # I2C #3
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 off end # Management Engine KT Redirection
- device pci 16.4 off end # Management Engine Interface 3
- device pci 16.5 off end # Management Engine Interface 4
- device pci 17.0 on # SATA
+ device ref i2c1 on end
+ device ref sata on
register "SataPortsEnable" = "{
[1] = 1, /* SSD (SATA1A) */
[4] = 1, /* HDD (SATA4) */
}"
end
- device pci 19.0 off end # I2C #4
- device pci 19.1 off end # I2C #5
- device pci 19.2 on end # UART #2
- device pci 1a.0 off end # eMMC
- device pci 1b.0 off end # PCI Express Port 17
- device pci 1b.1 off end # PCI Express Port 18
- device pci 1b.2 off end # PCI Express Port 19
- device pci 1b.3 off end # PCI Express Port 20
- device pci 1b.4 on # PCI Express Port 21
+ device ref uart2 on end
+ device ref pcie_rp21 on
# PCI Express root port #21 x4, Clock 11 (SSD2)
register "PcieRpEnable[20]" = "1"
register "PcieRpLtrEnable[20]" = "1"
register "PcieClkSrcUsage[11]" = "20"
register "PcieClkSrcClkReq[11]" = "11"
end
- device pci 1b.5 off end # PCI Express Port 22
- device pci 1b.6 off end # PCI Express Port 23
- device pci 1b.7 off end # PCI Express Port 24
- device pci 1c.0 off end # PCI Express Port 1
- device pci 1c.1 off end # PCI Express Port 2
- device pci 1c.2 off end # PCI Express Port 3
- device pci 1c.3 off end # PCI Express Port 4
- device pci 1c.4 off end # PCI Express Port 5
- device pci 1c.5 off end # PCI Express Port 6
- device pci 1c.6 off end # PCI Express Port 7
- device pci 1c.7 off end # PCI Express Port 8
- device pci 1d.0 on # PCI Express Port 9
+ device ref pcie_rp9 on
# PCI Express root port #9 x4, Clock 12 (SSD)
register "PcieRpEnable[8]" = "1"
register "PcieRpLtrEnable[8]" = "1"
register "PcieClkSrcUsage[12]" = "8"
register "PcieClkSrcClkReq[12]" = "12"
end
- device pci 1d.1 off end # PCI Express Port 10
- device pci 1d.2 off end # PCI Express Port 11
- device pci 1d.3 off end # PCI Express Port 12
- device pci 1d.4 off end # PCI Express Port 13
- device pci 1d.5 on # PCI Express Port 14
+ device ref pcie_rp14 on
# PCI Express root port #14 x1, Clock 13 (WLAN)
register "PcieRpEnable[13]" = "1"
register "PcieRpLtrEnable[13]" = "1"
register "PcieClkSrcUsage[13]" = "13"
register "PcieClkSrcClkReq[13]" = "13"
end
- device pci 1d.6 on # PCI Express Port 15
+ device ref pcie_rp15 on
# PCI Express root port #15 x1, Clock 14 (GLAN)
register "PcieRpEnable[14]" = "1"
register "PcieRpLtrEnable[14]" = "1"
register "PcieClkSrcUsage[14]" = "14"
register "PcieClkSrcClkReq[14]" = "14"
end
- device pci 1d.7 on # PCI Express Port 16
+ device ref pcie_rp16 on
# PCI Express root port #16 x1, Clock 15 (Card Reader)
register "PcieRpEnable[15]" = "1"
register "PcieRpLtrEnable[15]" = "1"
register "PcieClkSrcUsage[15]" = "15"
register "PcieClkSrcClkReq[15]" = "15"
end
- device pci 1e.0 off end # UART #0
- device pci 1e.1 off end # UART #1
- device pci 1e.2 off end # GSPI #0
- device pci 1e.3 off end # GSPI #1
- device pci 1f.0 on # LPC Interface
+ device ref lpc_espi on
register "gen1_dec" = "0x00040069"
register "gen2_dec" = "0x00fc0e01"
register "gen3_dec" = "0x00fc0f01"
@@ -192,19 +152,15 @@
device pnp 0c31.0 on end
end
end
- device pci 1f.1 off end # P2SB
- device pci 1f.2 hidden end # Power Management Controller
- device pci 1f.3 on # Intel HDA
+ device ref hda on
subsystemid 0x1558 0x96e1
register "PchHdaAudioLinkHda" = "1"
end
- device pci 1f.4 on # SMBus
+ device ref smbus on
chip drivers/i2c/tas5825m
register "id" = "0"
device i2c 4e on end # (8bit address: 0x9c)
end # tas5825m
end
- device pci 1f.5 on end # PCH SPI
- device pci 1f.6 off end # GbE
end
end
--
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I4769f255ce5652a9969ad6535c997ec1ad0be8d2
Gerrit-Change-Number: 78839
Gerrit-PatchSet: 8
Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com>
Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78837?usp=email )
(
5 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: mb/system76/addw1/dt: Make use of chipset devicetree
......................................................................
mb/system76/addw1/dt: Make use of chipset devicetree
Make use of the alias names defined in the chipset devicetree and remove
devices which are equal to the ones from the chipset devicetree.
Change-Id: Ide536c74683416b34b0984fe1bddb250e72b045b
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78837
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Tim Crawford <tcrawford(a)system76.com>
---
M src/mainboard/system76/addw1/devicetree.cb
M src/mainboard/system76/addw1/variants/addw1/overridetree.cb
M src/mainboard/system76/addw1/variants/addw2/overridetree.cb
3 files changed, 20 insertions(+), 62 deletions(-)
Approvals:
Tim Crawford: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/system76/addw1/devicetree.cb b/src/mainboard/system76/addw1/devicetree.cb
index 16827ddb..1f45452 100644
--- a/src/mainboard/system76/addw1/devicetree.cb
+++ b/src/mainboard/system76/addw1/devicetree.cb
@@ -53,21 +53,17 @@
device domain 0 on
subsystemid 0x1558 0x65d1 inherit
- device pci 00.0 on end # Host Bridge
- device pci 01.0 on # GPU Port
+ device ref peg0 on
# PCI Express Graphics #0 x16, Clock 8 (NVIDIA GPU)
register "PcieClkSrcUsage[8]" = "0x40"
register "PcieClkSrcClkReq[8]" = "8"
end
- device pci 02.0 on end # Integrated Graphics Device
- device pci 04.0 on # SA Thermal device
+ device ref igpu on end
+ device ref dptf on
register "Device4Enable" = "1"
end
- device pci 12.0 on end # Thermal Subsystem
- device pci 12.5 off end # UFS SCS
- device pci 12.6 off end # GSPI #2
- device pci 13.0 off end # Integrated Sensor Hub
- device pci 14.0 on # USB xHCI
+ device ref thermal on end
+ device ref xhci on
register "usb2_ports" = "{
[0] = USB2_PORT_TYPE_C(OC_SKIP), /* USB 3.1 Gen 2 TYPE-C and DisplayPort */
[1] = USB2_PORT_TYPE_C(OC_SKIP), /* USB 3.1 Gen 2 TYPE-C */
@@ -88,33 +84,21 @@
[5] = USB3_PORT_DEFAULT(OC_SKIP), /* USB 3.1 Gen 1 back */
}"
end
- device pci 14.2 on end # Shared SRAM
- device pci 14.3 on # CNVi wifi
+ device ref shared_sram on end
+ device ref cnvi_wifi on
chip drivers/wifi/generic
register "wake" = "PME_B0_EN_BIT"
device generic 0 on end
end
end
- device pci 14.5 off end # SDCard
- device pci 15.0 on end # I2C #0
- device pci 15.1 off end # I2C #1
- device pci 15.2 off end # I2C #2
- device pci 15.3 off end # I2C #3
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 off end # Management Engine KT Redirection
- device pci 16.4 off end # Management Engine Interface 3
- device pci 16.5 off end # Management Engine Interface 4
- device pci 17.0 on # SATA
+ device ref i2c0 on end
+ device ref sata on
register "SataPortsEnable" = "{
[0] = 1, /* HDD (SATA0B) */
[1] = 1, /* SSD1 (SATA1A) */
}"
end
- device pci 19.2 off end # UART #2
- device pci 1a.0 off end # eMMC
- device pci 1b.0 on # PCI Express Port 17
+ device ref pcie_rp17 on
# PCI Express root port #17 x4, Clock 0 (Thunderbolt)
register "PcieRpEnable[16]" = "1"
register "PcieRpLtrEnable[16]" = "1"
@@ -122,10 +106,7 @@
register "PcieClkSrcUsage[0]" = "16"
register "PcieClkSrcClkReq[0]" = "0"
end
- device pci 1b.1 off end # PCI Express Port 18
- device pci 1b.2 off end # PCI Express Port 19
- device pci 1b.3 off end # PCI Express Port 20
- device pci 1b.4 on # PCI Express Port 21
+ device ref pcie_rp21 on
# PCI Express root port #21 x4, Clock 10 (SSD2)
register "PcieRpEnable[20]" = "1"
register "PcieRpLtrEnable[20]" = "1"
@@ -133,18 +114,7 @@
register "PcieClkSrcClkReq[10]" = "10"
register "PcieRpSlotImplemented[20]" = "1"
end
- device pci 1b.5 off end # PCI Express Port 22
- device pci 1b.6 off end # PCI Express Port 23
- device pci 1b.7 off end # PCI Express Port 24
- device pci 1c.0 off end # PCI Express Port 1
- device pci 1c.1 off end # PCI Express Port 2
- device pci 1c.2 off end # PCI Express Port 3
- device pci 1c.3 off end # PCI Express Port 4
- device pci 1c.4 off end # PCI Express Port 5
- device pci 1c.5 off end # PCI Express Port 6
- device pci 1c.6 off end # PCI Express Port 7
- device pci 1c.7 off end # PCI Express Port 8
- device pci 1d.0 on # PCI Express Port 9
+ device ref pcie_rp9 on
# PCI Express root port #9 x4, Clock 9 (SSD1)
register "PcieRpEnable[8]" = "1"
register "PcieRpLtrEnable[8]" = "1"
@@ -152,11 +122,7 @@
register "PcieClkSrcClkReq[9]" = "9"
register "PcieRpSlotImplemented[8]" = "1"
end
- device pci 1d.1 off end # PCI Express Port 10
- device pci 1d.2 off end # PCI Express Port 11
- device pci 1d.3 off end # PCI Express Port 12
- device pci 1d.4 off end # PCI Express Port 13
- device pci 1d.5 on # PCI Express Port 14
+ device ref pcie_rp14 on
# PCI Express root port #14 x1, Clock 5 (GLAN)
register "PcieRpEnable[13]" = "1"
register "PcieRpLtrEnable[13]" = "1"
@@ -164,7 +130,7 @@
register "PcieClkSrcClkReq[5]" = "5"
register "PcieRpSlotImplemented[13]" = "1"
end
- device pci 1d.6 on # PCI Express Port 15
+ device ref pcie_rp15 on
# PCI Express root port #15 x1, Clock 7 (Card Reader)
register "PcieRpEnable[14]" = "1"
register "PcieRpLtrEnable[14]" = "1"
@@ -172,7 +138,7 @@
register "PcieClkSrcClkReq[7]" = "7"
register "PcieRpSlotImplemented[14]" = "1"
end
- device pci 1d.7 on # PCI Express Port 16
+ device ref pcie_rp16 on
# PCI Express root port #16 x1, Clock 6 (WLAN)
register "PcieRpEnable[15]" = "1"
register "PcieRpLtrEnable[15]" = "1"
@@ -180,11 +146,7 @@
register "PcieClkSrcClkReq[6]" = "6"
register "PcieRpSlotImplemented[15]" = "1"
end
- device pci 1e.0 off end # UART #0
- device pci 1e.1 off end # UART #1
- device pci 1e.2 off end # GSPI #0
- device pci 1e.3 off end # GSPI #1
- device pci 1f.0 on # LPC Interface
+ device ref lpc_espi on
register "gen1_dec" = "0x00040069"
register "gen2_dec" = "0x00fc0e01"
register "gen3_dec" = "0x00fc0f01"
@@ -192,18 +154,14 @@
device pnp 0c31.0 on end
end
end
- device pci 1f.1 off end # P2SB
- device pci 1f.2 hidden end # Power Management Controller
- device pci 1f.3 on # Intel HDA
+ device ref hda on
register "PchHdaAudioLinkHda" = "1"
end
- device pci 1f.4 on # SMBus
+ device ref smbus on
chip drivers/i2c/tas5825m
register "id" = "0"
device i2c 4e on end # (8bit address: 0x9c)
end
end
- device pci 1f.5 on end # PCH SPI
- device pci 1f.6 off end # GbE
end
end
diff --git a/src/mainboard/system76/addw1/variants/addw1/overridetree.cb b/src/mainboard/system76/addw1/variants/addw1/overridetree.cb
index b1fab29..7906848 100644
--- a/src/mainboard/system76/addw1/variants/addw1/overridetree.cb
+++ b/src/mainboard/system76/addw1/variants/addw1/overridetree.cb
@@ -9,7 +9,7 @@
device domain 0 on
subsystemid 0x1558 0x65d1 inherit
- device pci 15.0 on # I2C #0
+ device ref i2c0 on
chip drivers/i2c/hid
register "generic.hid" = ""SYNA1202""
register "generic.desc" = ""Synaptics Touchpad""
diff --git a/src/mainboard/system76/addw1/variants/addw2/overridetree.cb b/src/mainboard/system76/addw1/variants/addw2/overridetree.cb
index 3b9c562..a8e3c62 100644
--- a/src/mainboard/system76/addw1/variants/addw2/overridetree.cb
+++ b/src/mainboard/system76/addw1/variants/addw2/overridetree.cb
@@ -10,7 +10,7 @@
device domain 0 on
subsystemid 0x1558 0x65e1 inherit
- device pci 15.0 on # I2C #0
+ device ref i2c0 on
chip drivers/i2c/hid
register "generic.hid" = ""SYNA1202""
register "generic.desc" = ""Synaptics Touchpad""
--
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ide536c74683416b34b0984fe1bddb250e72b045b
Gerrit-Change-Number: 78837
Gerrit-PatchSet: 8
Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com>
Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>