Anastasios Koutian has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83270?usp=email )
Change subject: cpu/intel/model_206ax: Allow package power limit clamping
......................................................................
Patch Set 8:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83270/comment/4669022e_02a607d6?us… :
PS8, Line 12: Tested on ThinkPad T420 with the i7-3940XM.
> How can this be tested?
Please refer to this comment: https://review.coreboot.org/c/coreboot/+/83270/comment/c41532aa_f71a7182/
I tested this with the i7-3940XM, by running a combined stress test for CPU cores and integrated graphics:
`$ stress-ng -c 8 --cpu-method matrixprod`
`$ furmark --fullscreen --p1080 --demo furmark-gl`
With the PL1 clamp disabled, after several minutes of running the two commands simultaneously, the core frequency is 3.0 GHz, graphics frequency is 650 MHz, and package power consumption levels out at ~42 W.
When the PL1 clamp is enabled, for the same stress test, core frequency is 2.7 GHz, graphics are at 540 MHz, and package power stabilises at 35 W.
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Change subject: mb/google/rauru: Add MediaTek MT8196 reference board
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Patch Set 9: Code-Review+2
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Change subject: soc/mediatek/mt8196: Add a stub implementation of the MT8196 SoC
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Patch Set 7: Code-Review+2
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Change subject: mb/google/brya/var/xol: Limit power limits for low/no battery case
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Patch Set 7:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83479/comment/d7b6f863_dbddc2f2?us… :
PS7, Line 17: BUG=b:353395811
> Can we get this change merged if we don't have more comment?
Done
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Change subject: mb/google/brya/var/xol: Limit power limits for low/no battery case
......................................................................
Patch Set 7: Code-Review+2
(1 comment)
Patchset:
PS7:
I've checked bug and other comment details.
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Change subject: soc/mediatek/mt8196: Add a stub implementation of the MT8196 SoC
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Hello Shelley Chen, Vamshi Krishna Gopal, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/82794?usp=email
to look at the new patch set (#6).
Change subject: mb/google/brox/var/brox: Enable Class-D calibration
......................................................................
mb/google/brox/var/brox: Enable Class-D calibration
DC offset of class-D amplifier is 7mV in Brox which is larger than expectation.
Add a section in the verb table to enable class-D calibration based
on the updated verb table provided by Realtek in b:342506575 comment#6.
This improves the offset to be less than 1mV.
BUG=b:342506575
BRANCH=main
TEST=Verify DC offset of speaker amplier output is less than 1mV with a multimeter when \
playing -100dB sine waves.
Change-Id: I776f5c24ce3c829cbd64840957c1431608cf2b85
Signed-off-by: Terry Cheong <htcheong(a)chromium.org>
---
M src/mainboard/google/brox/variants/brox/include/variant/hda_verb.h
1 file changed, 6 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/82794/6
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