coreboot-gerrit June 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: src/lib: Add Kconfig variable for fw_config default value
by Julius Werner (Code Review) 25 Jun '24

25 Jun '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Subrata Banik, Wonkyu Kim. Julius Werner has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/83153?usp=email ) Change subject: src/lib: Add Kconfig variable for fw_config default value ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: I may be forgetting some details here, but wasn't returning UNDEFINED_FW_CONFIG (i.e. 0xffffffffffffffff) when the config has not been set an intentional feature of the FW_CONFIG design? It sets every bit to 1 so that every device will try to probe. I think(?) that was intended for the first factory boot, so that the machine is bootable before the point where it has time to program the right FW_CONFIG value into CBI. -- To view, visit https://review.coreboot.org/c/coreboot/+/83153?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9694433e01bdcd9ff1e550585c14ea7ccee020a3 Gerrit-Change-Number: 83153 Gerrit-PatchSet: 2 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 21:44:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: mb/google/fatcat: Add minimal code support for fatcat
by Nick Vaccaro (Code Review) 25 Jun '24

25 Jun '24

Attention is currently required from: Subrata Banik, YH Lin. Nick Vaccaro has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/83197?usp=email ) Change subject: mb/google/fatcat: Add minimal code support for fatcat ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83197?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iad78aec51b2f0f240991c9c35842764a60be988e Gerrit-Change-Number: 83197 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 21:16:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: device/azalia: Separate codec checking and initialization
by Nico Huber (Code Review) 25 Jun '24

25 Jun '24

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80332?usp=email ) Change subject: device/azalia: Separate codec checking and initialization ...................................................................... device/azalia: Separate codec checking and initialization This also changes how debug messages will be printed. I focused on reducing clutter on the screen and made the style of the messages consistent. Before: azalia_audio: Initializing codec #5 codec not ready. azalia_audio: Initializing codec #4 codec not valid. azalia_audio: Initializing codec #3 azalia_audio: viddid: ffffffff azalia_audio: verb_size: 4 azalia_audio: verb loaded. After: azalia_audio: codec #5 not ready azalia_audio: codec #4 not valid azalia_audio: initializing codec #3... azalia_audio: - vendor/device id: 0xffffffff azalia_audio: - verb size: 4 azalia_audio: - verb loaded Change-Id: I92b6d184abccdbe0e1bfce98a2c959a97a618a29 Signed-off-by: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80332 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/device/azalia_device.c M src/include/device/azalia_device.h 2 files changed, 40 insertions(+), 35 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Felix Singer: Looks good to me, approved diff --git a/src/device/azalia_device.c b/src/device/azalia_device.c index 4ac585d..8051f2e 100644 --- a/src/device/azalia_device.c +++ b/src/device/azalia_device.c @@ -7,6 +7,7 @@ #include <device/mmio.h> #include <delay.h> #include <timer.h> +#include <types.h> int azalia_set_bits(void *port, u32 mask, u32 val) { @@ -97,7 +98,7 @@ /* Codec Not found */ /* Put HDA back in reset (BAR + 0x8) [0] */ azalia_set_bits(base + HDA_GCTL_REG, 1, 0); - printk(BIOS_DEBUG, "azalia_audio: No codec!\n"); + printk(BIOS_DEBUG, "azalia_audio: no codec!\n"); return 0; } @@ -226,55 +227,57 @@ { } -void azalia_codec_init(u8 *base, int addr, const u32 *verb_table, u32 verb_table_bytes) +static bool codec_is_operative(u8 *base, const int addr) { - u32 reg32; - const u32 *verb; - u32 verb_size; - - printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr); - - /* 1 */ if (wait_for_ready(base) < 0) { - printk(BIOS_DEBUG, " codec not ready.\n"); - return; + printk(BIOS_DEBUG, "azalia_audio: codec #%d not ready\n", addr); + return false; } - reg32 = (addr << 28) | 0x000f0000; + const u32 reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32); if (wait_for_valid(base) < 0) { - printk(BIOS_DEBUG, " codec not valid.\n"); + printk(BIOS_DEBUG, "azalia_audio: codec #%d not valid\n", addr); + return false; + } + return true; +} + +void azalia_codec_init(u8 *base, int addr, const u32 *verb_table, u32 verb_table_bytes) +{ + const u32 viddid = read32(base + HDA_IR_REG); + const u32 *verb; + u32 verb_size; + + printk(BIOS_DEBUG, "azalia_audio: initializing codec #%d...\n", addr); + printk(BIOS_DEBUG, "azalia_audio: - vendor/device id: 0x%08x\n", viddid); + + verb_size = azalia_find_verb(verb_table, verb_table_bytes, viddid, &verb); + + if (verb_size == 0) { + printk(BIOS_DEBUG, "azalia_audio: - no verb!\n"); return; } + printk(BIOS_DEBUG, "azalia_audio: - verb size: %u\n", verb_size); - /* 2 */ - reg32 = read32(base + HDA_IR_REG); - printk(BIOS_DEBUG, "azalia_audio: codec viddid: %08x\n", reg32); - verb_size = azalia_find_verb(verb_table, verb_table_bytes, reg32, &verb); - - if (!verb_size) { - printk(BIOS_DEBUG, "azalia_audio: No verb!\n"); - return; - } - printk(BIOS_DEBUG, "azalia_audio: verb_size: %u\n", verb_size); - - /* 3 */ - const int rc = azalia_program_verb_table(base, verb, verb_size); - if (rc < 0) - printk(BIOS_DEBUG, "azalia_audio: verb not loaded.\n"); + if (azalia_program_verb_table(base, verb, verb_size) < 0) + printk(BIOS_DEBUG, "azalia_audio: - verb not loaded\n"); else - printk(BIOS_DEBUG, "azalia_audio: verb loaded.\n"); + printk(BIOS_DEBUG, "azalia_audio: - verb loaded\n"); - mainboard_azalia_program_runtime_verbs(base, reg32); + mainboard_azalia_program_runtime_verbs(base, viddid); +} + +static bool codec_can_init(const u16 codec_mask, u8 *base, const int addr) +{ + return codec_mask & (1 << addr) && codec_is_operative(base, addr); } void azalia_codecs_init(u8 *base, u16 codec_mask) { - int i; - - for (i = 14; i >= 0; i--) { - if (codec_mask & (1 << i)) + for (int i = AZALIA_MAX_CODECS - 1; i >= 0; i--) { + if (codec_can_init(codec_mask, base, i)) azalia_codec_init(base, i, cim_verb_data, cim_verb_data_size); } @@ -298,7 +301,7 @@ codec_mask = codec_detect(base); if (codec_mask) { - printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n", codec_mask); + printk(BIOS_DEBUG, "azalia_audio: codec_mask = 0x%02x\n", codec_mask); azalia_codecs_init(base, codec_mask); } } diff --git a/src/include/device/azalia_device.h b/src/include/device/azalia_device.h index 1fc0baf..59e7ea2 100644 --- a/src/include/device/azalia_device.h +++ b/src/include/device/azalia_device.h @@ -18,6 +18,8 @@ #define HDA_ICII_BUSY (1 << 0) #define HDA_ICII_VALID (1 << 1) +#define AZALIA_MAX_CODECS 15 + int azalia_set_bits(void *port, u32 mask, u32 val); int azalia_enter_reset(u8 *base); int azalia_exit_reset(u8 *base); -- To view, visit https://review.coreboot.org/c/coreboot/+/80332?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I92b6d184abccdbe0e1bfce98a2c959a97a618a29 Gerrit-Change-Number: 80332 Gerrit-PatchSet: 13 Gerrit-Owner: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: device/azalia: Separate codec checking and initialization
by Nico Huber (Code Review) 25 Jun '24

25 Jun '24

Attention is currently required from: Felix Held, Nicholas Sudsgaard, Paul Menzel. Nico Huber has posted comments on this change by Nicholas Sudsgaard. ( https://review.coreboot.org/c/coreboot/+/80332?usp=email ) Change subject: device/azalia: Separate codec checking and initialization ...................................................................... Patch Set 12: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80332?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I92b6d184abccdbe0e1bfce98a2c959a97a618a29 Gerrit-Change-Number: 80332 Gerrit-PatchSet: 12 Gerrit-Owner: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 25 Jun 2024 20:58:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: commonlib/device_tree: Improve node and property allocation speed
by Julius Werner (Code Review) 25 Jun '24

25 Jun '24

Attention is currently required from: Maximilian Brune, Patrick Rudolph, Reka Norman. Hello Maximilian Brune, Patrick Rudolph, Reka Norman, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83208?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: commonlib/device_tree: Improve node and property allocation speed ...................................................................... commonlib/device_tree: Improve node and property allocation speed Now that the device tree code has been made available in libpayload, we should reintroduce the node and property allocation optimization for libpayload's memory allocator that was originally dropped when porting this code from depthcharge to coreboot. On a Qualcomm SC7180 unflattening a normal ChromeOS kernel device tree, this saves roughly ~145ms. The total scratch space used is about ~1350 nodes and ~5200 properties, so we leave a little room to grow with the constants hardcoded here. Change-Id: I0f4d80a8b750febfb069b32ef47304ccecdc35af Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/commonlib/device_tree.c 1 file changed, 37 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/83208/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83208?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0f4d80a8b750febfb069b32ef47304ccecdc35af Gerrit-Change-Number: 83208 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com>

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[S] Change in coreboot[main]: commonlib/device_tree: Improve node and property allocation speed
by Julius Werner (Code Review) 25 Jun '24

25 Jun '24

Julius Werner has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83208?usp=email ) Change subject: commonlib/device_tree: Improve node and property allocation speed ...................................................................... commonlib/device_tree: Improve node and property allocation speed Now that the device tree code has been made available in libpayload, we should reintroduce the node and property allocation optimization for libpayload's memory allocator that was originally dropped when porting this code from depthcharge to coreboot. Without this, unflattening an FDT in a payload tends to waste dozens of milliseconds on malloc() churn. Change-Id: I0f4d80a8b750febfb069b32ef47304ccecdc35af Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/commonlib/device_tree.c 1 file changed, 37 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/83208/1 diff --git a/src/commonlib/device_tree.c b/src/commonlib/device_tree.c index f70aaf7..fae0ad9 100644 --- a/src/commonlib/device_tree.c +++ b/src/commonlib/device_tree.c @@ -25,6 +25,37 @@ #define FDT_MAX_MEMORY_REGIONS 16 // should be a good enough upper bound /* + * libpayload's malloc() has a linear allocation complexity, which means that it + * degrades massively if we make a few thousand small allocations. Preventing + * that problem with a custom scratchpad is well-worth a small increase in BSS + * size. + */ + +static struct device_tree_node *alloc_node(void) +{ +#ifndef __COREBOOT__ + static struct device_tree_node cache[1000]; + static int counter = 0; + + if (counter < ARRAY_SIZE(cache)) + return &cache[counter++]; +#endif + return xzalloc(sizeof(struct device_tree_node)); +} + +static struct device_tree_property *alloc_prop(void) +{ +#ifndef __COREBOOT__ + static struct device_tree_property cache[5000]; + static int counter = 0; + + if (counter < ARRAY_SIZE(cache)) + return &cache[counter++]; +#endif + return xzalloc(sizeof(struct device_tree_property)); +} + +/* * Functions for picking apart flattened trees. */ @@ -625,14 +656,14 @@ return 0; offset += size; - struct device_tree_node *node = xzalloc(sizeof(*node)); + struct device_tree_node *node = alloc_node(); *new_node = node; node->name = name; struct fdt_property fprop; last = &node->properties; while ((size = fdt_next_property(blob, offset, &fprop))) { - struct device_tree_property *prop = xzalloc(sizeof(*prop)); + struct device_tree_property *prop = alloc_prop(); prop->prop = fprop; if (dt_prop_is_phandle(prop)) { @@ -1003,9 +1034,7 @@ if (!create) return NULL; - found = calloc(1, sizeof(*found)); - if (!found) - return NULL; + found = alloc_node(); found->name = strdup(*path); if (!found->name) return NULL; @@ -1333,7 +1362,7 @@ } } - prop = xzalloc(sizeof(*prop)); + prop = alloc_prop(); list_insert_after(&prop->list_node, &node->properties); prop->prop.name = name; prop->prop.data = data; @@ -1847,7 +1876,7 @@ continue; } } else { - dst_prop = xzalloc(sizeof(*dst_prop)); + dst_prop = alloc_prop(); list_insert_after(&dst_prop->list_node, &dst->properties); } @@ -1866,7 +1895,7 @@ } if (!dst_node) { - dst_node = xzalloc(sizeof(*dst_node)); + dst_node = alloc_node(); *dst_node = *src_node; list_insert_after(&dst_node->list_node, &dst->children); } else { -- To view, visit https://review.coreboot.org/c/coreboot/+/83208?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0f4d80a8b750febfb069b32ef47304ccecdc35af Gerrit-Change-Number: 83208 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org>

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[S] Change in coreboot[main]: skl mainboards/dt: Drop SataSalpSupport setting if disabled
by 9elements QA (Code Review) 25 Jun '24

25 Jun '24

9elements QA has posted comments on this change by Felix Singer. ( https://review.coreboot.org/c/coreboot/+/83175?usp=email ) Change subject: skl mainboards/dt: Drop SataSalpSupport setting if disabled ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 11 / 1 / 12 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/211550 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/211548 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/211547 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/211546 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/211545 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/211544 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/211543 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/211542 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/211541 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/211540 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/211539 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/211538 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/83175?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb41f0a9baded01267410bd4c9458ab4bfb82b70 Gerrit-Change-Number: 83175 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Marvin Evers <marvin.n.evers(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 20:04:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: util/autoport: Remove extra blank lines from generated files
by 9elements QA (Code Review) 25 Jun '24

25 Jun '24

9elements QA has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/83186?usp=email ) Change subject: util/autoport: Remove extra blank lines from generated files ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 11 / 1 / 12 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/211667 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/211665 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/211664 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/211663 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/211662 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/211661 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/211660 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/211659 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/211658 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/211657 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/211656 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/211655 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/83186?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iad74098518320c5389cb86badb8737e81dd656ae Gerrit-Change-Number: 83186 Gerrit-PatchSet: 3 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 19:50:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: src/lib: Add Kconfig variable for fw_config default value
by Cliff Huang (Code Review) 25 Jun '24

25 Jun '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Subrata Banik, Wonkyu Kim. Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/83153?usp=email ) Change subject: src/lib: Add Kconfig variable for fw_config default value ...................................................................... Patch Set 2: (1 comment) File src/Kconfig: https://review.coreboot.org/c/coreboot/+/83153/comment/34df8c9b_d20df773?us… : PS2, Line 548: 0x00000 > unable to follow the motivation. […] Good point! This is used in make build environment where no CBI value is synced from config.star. Also, with this flag been overridden in config.<board>, the different fw_config value can be tested while it is not provided from Chrome EC and VPD. For instance, in simulation environment, the targeted overridden value can be used with the need of updating the value in the storage model prior to boot. -- To view, visit https://review.coreboot.org/c/coreboot/+/83153?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9694433e01bdcd9ff1e550585c14ea7ccee020a3 Gerrit-Change-Number: 83153 Gerrit-PatchSet: 2 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 19:46:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[L] Change in coreboot[main]: mb/google/fatcat: Add minimal code support for fatcat
by Subrata Banik (Code Review) 25 Jun '24

25 Jun '24

Attention is currently required from: Nick Vaccaro, YH Lin. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/83197?usp=email ) Change subject: mb/google/fatcat: Add minimal code support for fatcat ...................................................................... Patch Set 6: (1 comment) File src/mainboard/google/fatcat/variants/fatcat/gpio.c: https://review.coreboot.org/c/coreboot/+/83197/comment/5e08bee3_d7a8fbba?us… : PS5, Line 10: #include <boardid.h> > NIT - This should be between line 12 and 13 (i.e. above <soc/gpio. […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/83197?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iad78aec51b2f0f240991c9c35842764a60be988e Gerrit-Change-Number: 83197 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 17:54:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com>

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