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Change subject: util/xcompile: Use new GCC's commande options only if supported
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Thx
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Change subject: util/xcompile: Use new GCC's commande options only if supported
......................................................................
util/xcompile: Use new GCC's commande options only if supported
Wflex-array-member-not-at-end & Wcalloc-transposed-args are
not supported when using GCC older than GCC-14.
Use them only when supported.
Change-Id: I11c1e729569c8130bd254a10454c5066a72974d6
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M util/xcompile/xcompile
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/82785/1
diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile
index ad4361d..ff067d2 100755
--- a/util/xcompile/xcompile
+++ b/util/xcompile/xcompile
@@ -201,6 +201,13 @@
CFLAGS_GCC="$CFLAGS_GCC -Wno-address-of-packed-member"
testcc "$GCC" "$CFLAGS_GCC --param=min-pagesize=1024 $FLAGS_GCC" &&
CFLAGS_GCC="$CFLAGS_GCC --param=min-pagesize=1024"
+
+ testcc "$GCC" "$CFLAGS_GCC -Wflex-array-member-not-at-end" &&
+ CFLAGS_GCC="$CFLAGS_GCC -Wflex-array-member-not-at-end"
+
+ testcc "$GCC" "$CFLAGS_GCC -Wcalloc-transposed-args" &&
+ CFLAGS_GCC="$CFLAGS_GCC -Wcalloc-transposed-args"
+
case "$architecture" in
x86)
;;
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Change subject: mb/google/brox/var/lotso: Update gpio setting
......................................................................
Patch Set 16: Code-Review+2
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Change subject: mb/google/brox/var/lotso: Update gpio setting
......................................................................
mb/google/brox/var/lotso: Update gpio setting
Based on lotso EVT schematics update gpio settings.
BUG=b:333494257
TEST=emerge-brox coreboot chromeos-bootimage and boot on
Change-Id: I13485cc7ccd8b15352f5e21ad9336aa2b3d35749
Signed-off-by: Jian Tong <tongjian(a)huaqin.corp-partner.google.com>
---
A src/mainboard/google/brox/variants/lotso/Makefile.mk
A src/mainboard/google/brox/variants/lotso/gpio.c
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Change subject: mb/google/brox/var/lotso: Update gpio setting
......................................................................
mb/google/brox/var/lotso: Update gpio setting
Based on lotso EVT schematics update gpio settings.
BUG=b:333494257
TEST=emerge-brox coreboot chromeos-bootimage and boot on
Change-Id: I13485cc7ccd8b15352f5e21ad9336aa2b3d35749
Signed-off-by: Jian Tong <tongjian(a)huaqin.corp-partner.google.com>
---
A src/mainboard/google/brox/variants/lotso/Makefile.mk
A src/mainboard/google/brox/variants/lotso/gpio.c
2 files changed, 156 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/82573/15
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Change subject: mb/google/brox/var/lotso: Update gpio setting
......................................................................
mb/google/brox/var/lotso: Update gpio setting
Based on lotso EVT schematics update gpio settings.
BUG=b:333494257
TEST=emerge-brox coreboot chromeos-bootimage and boot on
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---
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A src/mainboard/google/brox/variants/lotso/gpio.c
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Change subject: soc/intel/mtl: Set HDA subsystem ID during FSP-M
......................................................................
Patch Set 2:
(2 comments)
Patchset:
PS2:
@kapilporwal@google.com can you please take a look?
Commit Message:
https://review.coreboot.org/c/coreboot/+/82731/comment/5e7cc160_4e2c90af?us… :
PS2, Line 7: Set HDA subsystem ID during FSP-M
> We are using FSP d.0.97.10.
This is what we validated SiC_Version_0D.00.A8.20
>
> Here is cbmem from CB:82609:
>
> - https://gist.github.com/crawfxrd/ac68a26cd6e8392ea4ab7b1f20966919
>
> It does try to set the override SSID for HDA:
Are you saying FSP-S tries to override the HDA SSID ?
>
> ```
> [DEBUG] PCI: 00:00:1f.3 subsystem <- 1558/a763
> [DEBUG] PCI: 00:00:1f.3 cmd <- 02
> ```
>
> But there is no subsystem detected in Linux:
>
> ```
> $ lspci -s 1f.3 -vnn
> 00:1f.3 Audio device [0403]: Intel Corporation Device [8086:7e28] (rev 20)
> Flags: bus master, fast devsel, latency 64, IRQ 215, IOMMU group 11
> Memory at b2830000 (64-bit, non-prefetchable) [size=16K]
> Memory at bee00000 (64-bit, non-prefetchable) [size=2M]
> Capabilities: <access denied>
> Kernel driver in use: snd_hda_intel
> Kernel modules: snd_hda_intel, snd_sof_pci_intel_mtl
> ```
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Change subject: soc/intel/mtl: Set HDA subsystem ID during FSP-M
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82731/comment/e4aad3a4_45600696?us… :
PS2, Line 7: Set HDA subsystem ID during FSP-M
> > We see no SSID reported in `lspci -s 0:1f. […]
We are using FSP d.0.97.10.
Here is cbmem from CB:82609:
- https://gist.github.com/crawfxrd/ac68a26cd6e8392ea4ab7b1f20966919
It does try to set the override SSID for HDA:
```
[DEBUG] PCI: 00:00:1f.3 subsystem <- 1558/a763
[DEBUG] PCI: 00:00:1f.3 cmd <- 02
```
But there is no subsystem detected in Linux:
```
$ lspci -s 1f.3 -vnn
00:1f.3 Audio device [0403]: Intel Corporation Device [8086:7e28] (rev 20)
Flags: bus master, fast devsel, latency 64, IRQ 215, IOMMU group 11
Memory at b2830000 (64-bit, non-prefetchable) [size=16K]
Memory at bee00000 (64-bit, non-prefetchable) [size=2M]
Capabilities: <access denied>
Kernel driver in use: snd_hda_intel
Kernel modules: snd_hda_intel, snd_sof_pci_intel_mtl
```
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Change subject: mb/google/brox: Fix CPU crashlog device MMIO memory access
......................................................................
Patch Set 10:
(1 comment)
File src/soc/intel/alderlake/crashlog.c:
https://review.coreboot.org/c/coreboot/+/82136/comment/165f5a0b_89326805?us… :
PS10, Line 205: &
> What if the address is below 4G (the high dword is zero, but the low dword is non-zero)? Is this a valid value?
do you mean above 4G? where MSB is non-zero and LSB is zero ?
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