coreboot-gerrit May 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: [UNTESTED, WIP] device/pci_rom: handle non-remapped VGA_BIOS_ID
by Felix Held (Code Review) 21 May '24

21 May '24

Felix Held has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/82592?usp=email ) Change subject: [UNTESTED, WIP] device/pci_rom: handle non-remapped VGA_BIOS_ID ...................................................................... [UNTESTED, WIP] device/pci_rom: handle non-remapped VGA_BIOS_ID While the SoC-level defaults for VGA_BIOS_ID are the expected correctly remapped PCI ID of the GPU, some mainboards override the VGA_BIOS_ID setting to the non-remapped PCI ID. This resulted in coreboot not finding the VBIOS file. The proper solution would be to not override this SoC-level config in neither the mainboard code nor some external config file. This however requires adding some mechanism to be able to tell SeaBIOS which VBIOS image to use for the GPU device. This sort-of reverts parts of commit 42f0396a1028 ("device/pci_rom: rework PCI ID remapping in pci_rom_probe"), but it still tries to find the VBIOS image with the expected remapped PCI ID and only adds trying the non-remapped PCI ID as a fallback when the file with the remapped PCI ID doesn't exist and prints a warning in that case. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I7cd8e2036250f4ca2239b04cd070bbf0778b13aa --- M src/device/pci_rom.c 1 file changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/82592/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82592?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7cd8e2036250f4ca2239b04cd070bbf0778b13aa Gerrit-Change-Number: 82592 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in coreboot[main]: [UNTESTED, WIP] device/pci_rom: handle non-remapped VGA_BIOS_ID
by Felix Held (Code Review) 21 May '24

21 May '24

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82592?usp=email ) Change subject: [UNTESTED, WIP] device/pci_rom: handle non-remapped VGA_BIOS_ID ...................................................................... [UNTESTED, WIP] device/pci_rom: handle non-remapped VGA_BIOS_ID While the SoC-level defaults for VGA_BIOS_ID are the expected correctly remapped PCI ID of the GPU, some mainboards override the VGA_BIOS_ID setting to the non-remapped PCI ID. This resulted in coreboot not finding the VBIOS file. The proper solution would be to not override this SoC-level config in neither the mainboard code nor some external config file. This however requires adding some mechanism to be able to tell SeaBIOS which VBIOS image to use for the GPU device. This sort-of reverts parts of commit 42f0396a1028 ("device/pci_rom: rework PCI ID remapping in pci_rom_probe"), but it still tries to find the VBIOS image with the expected remapped PCI ID and only adds trying the non-remapped PCI ID as a fallback when the file with the remapped PCI ID doesn't exist and prints a warning in that case. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I7cd8e2036250f4ca2239b04cd070bbf0778b13aa --- M src/device/pci_rom.c 1 file changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/82592/1 diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index aca55d6..ef41a0b 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -69,6 +69,22 @@ mapped_vendev & 0xffff); } + /* Handle the case of VGA_BIOS_ID not being set to the remapped PCI ID. This is a + workaround that should be removed once the underlying issue is fixed. */ + if (!rom_header && (vendev != mapped_vendev || rev != mapped_rev)) { + if (CONFIG(CHECK_REV_IN_OPROM_NAME)) { + rom_header = cbfs_boot_map_optionrom_revision(vendev >> 16, + vendev & 0xffff, + rev); + } else { + rom_header = cbfs_boot_map_optionrom(vendev >> 16, + vendev & 0xffff); + } + if (rom_header) { + printk(BIOS_WARNING, "VGA_BIOS_ID should be the remapped PCI ID\n"); + } + } + if (rom_header) { printk(BIOS_DEBUG, "In CBFS, ROM address for %s = %p\n", dev_path(dev), rom_header); -- To view, visit https://review.coreboot.org/c/coreboot/+/82592?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7cd8e2036250f4ca2239b04cd070bbf0778b13aa Gerrit-Change-Number: 82592 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de>

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[L] Change in coreboot[main]: libpayload: Add x86_64 (64-bit) support
by Subrata Banik (Code Review) 21 May '24

21 May '24

Attention is currently required from: Arthur Heymans, Julius Werner, Kapil Porwal. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81968?usp=email to look at the new patch set (#67). Change subject: libpayload: Add x86_64 (64-bit) support ...................................................................... libpayload: Add x86_64 (64-bit) support This patch introduces x86_64 (64-bit) support to the payload, building upon the existing x86 (32-bit) architecture. Files necessary for 64-bit compilation are now guarded by the `CONFIG_LP_ARCH_X86_64` Kconfig option. BUG=b:242829490 TEST=Able to verify all valid combinations between coreboot and payload with this patch. Payload Entry Point Behavior with below code. +----------------+--------------------+----------------------------+ | LP_ARCH_X86_64 | Payload Entry Mode | Description | +----------------+--------------------+----------------------------+ | No | 32-bit | Direct protected mode init | +----------------+--------------------+----------------------------+ | Yes | 32-bit | Protected to long mode | +----------------+--------------------+----------------------------+ | Yes | 64-bit | Long mode initialization | +----------------+--------------------+----------------------------+ Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M payloads/libpayload/Kconfig M payloads/libpayload/Makefile M payloads/libpayload/Makefile.mk M payloads/libpayload/arch/x86/Makefile.mk M payloads/libpayload/arch/x86/exception.c A payloads/libpayload/arch/x86/exception_asm_64.S R payloads/libpayload/arch/x86/exec.c M payloads/libpayload/arch/x86/gdb.c A payloads/libpayload/arch/x86/head_64.S M payloads/libpayload/arch/x86/libpayload.ldscript A payloads/libpayload/arch/x86/pt.S M payloads/libpayload/arch/x86/string.c M payloads/libpayload/bin/lpgcc M payloads/libpayload/drivers/storage/ahci_common.c M payloads/libpayload/drivers/usb/uhci.c M payloads/libpayload/include/x86/arch/exception.h M payloads/libpayload/libc/Makefile.mk M payloads/libpayload/vboot/Makefile.mk 18 files changed, 680 insertions(+), 58 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/81968/67 -- To view, visit https://review.coreboot.org/c/coreboot/+/81968?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585 Gerrit-Change-Number: 81968 Gerrit-PatchSet: 67 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Kapil Porwal <kapilporwal(a)google.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>

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[L] Change in coreboot[main]: libpayload: Add x86_64 (64-bit) support
by Subrata Banik (Code Review) 21 May '24

21 May '24

Attention is currently required from: Arthur Heymans, Julius Werner, Kapil Porwal. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/81968?usp=email ) Change subject: libpayload: Add x86_64 (64-bit) support ...................................................................... Patch Set 66: (1 comment) File payloads/libpayload/arch/x86/pt.S: https://review.coreboot.org/c/coreboot/+/81968/comment/de3b263e_89d3052c?us… : PS64, Line 57: .text > This should be `.section .text. […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/81968?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585 Gerrit-Change-Number: 81968 Gerrit-PatchSet: 66 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Kapil Porwal <kapilporwal(a)google.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 21 May 2024 16:59:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[S] Change in coreboot[master]: device/pci_rom: rework PCI ID remapping in pci_rom_probe
by Felix Held (Code Review) 21 May '24

21 May '24

Felix Held has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/73612?usp=email ) Change subject: device/pci_rom: rework PCI ID remapping in pci_rom_probe ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > a temporary workaround on the coreboot side to deal with unexpected/broken external configs that ove […] ouch, the x230 mainboard Kconfig is overriding the SoC default to a non-working value. i guess i only tested libgfxinit on the x230 then and only made sure that the SoC defaults are correct -- To view, visit https://review.coreboot.org/c/coreboot/+/73612?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If7da78c69dd702280a78996a5823972516e0319b Gerrit-Change-Number: 73612 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Tue, 21 May 2024 16:55:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in coreboot[main]: mb/google/nissa/var/orisa: Generate RAM ID for Micron MT62F512M32D2DR...
by Amanda Hwang (Code Review) 21 May '24

21 May '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik. Amanda Hwang has posted comments on this change by Amanda Hwang. ( https://review.coreboot.org/c/coreboot/+/82586?usp=email ) Change subject: mb/google/nissa/var/orisa: Generate RAM ID for Micron MT62F512M32D2DR-031 WT:B ...................................................................... Patch Set 3: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/82586/comment/37d8e6be_c9b12e43?us… : PS2, Line 7: for Orisa > Redundant, as part of the prefix. Maybe: […] Done https://review.coreboot.org/c/coreboot/+/82586/comment/bbbaaf47_c2b177da?us… : PS2, Line 9: Micorn > Micron Done https://review.coreboot.org/c/coreboot/+/82586/comment/8c6afac6_3c5b7848?us… : PS2, Line 16: TEST=emerge-nissa coreboot > Boot tested? Verified pass on Orisa proto build. -- To view, visit https://review.coreboot.org/c/coreboot/+/82586?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I559ed817250c40795e6c613794d4f65c636f5fc5 Gerrit-Change-Number: 82586 Gerrit-PatchSet: 3 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 21 May 2024 16:32:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: mb/google/nissa/var/orisa: Generate RAM ID for Micron MT62F512M32D2DR...
by Amanda Hwang (Code Review) 21 May '24

21 May '24

Attention is currently required from: Amanda Hwang, Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Hello Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82586?usp=email to look at the new patch set (#3). Change subject: mb/google/nissa/var/orisa: Generate RAM ID for Micron MT62F512M32D2DR-031 WT:B ...................................................................... mb/google/nissa/var/orisa: Generate RAM ID for Micron MT62F512M32D2DR-031 WT:B Add Micron part MT62F512M32D2DR-031 WT:B only for Orisa. DRAM Part Name ID to assign MT62F512M32D2DR-031 WT:B 0 (0000) BUG=b:337178014 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot Change-Id: I559ed817250c40795e6c613794d4f65c636f5fc5 Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/variants/orisa/memory/Makefile.mk M src/mainboard/google/brya/variants/orisa/memory/dram_id.generated.txt M src/mainboard/google/brya/variants/orisa/memory/mem_parts_used.txt 3 files changed, 11 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/82586/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/82586?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I559ed817250c40795e6c613794d4f65c636f5fc5 Gerrit-Change-Number: 82586 Gerrit-PatchSet: 3 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com>

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[L] Change in coreboot[main]: libpayload: Add x86_64 (64-bit) support
by Subrata Banik (Code Review) 21 May '24

21 May '24

Attention is currently required from: Arthur Heymans, Julius Werner, Kapil Porwal. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/81968?usp=email ) Change subject: libpayload: Add x86_64 (64-bit) support ...................................................................... Patch Set 65: (1 comment) File payloads/libpayload/arch/x86/head_32.S: https://review.coreboot.org/c/coreboot/+/81968/comment/eaab6a6e_757e31a5?us… : PS54, Line 40: #endif > Yes, but that comment was made when the plan was still to have (only) a 64-bit entry point. Multiboot is (as far as I understand) a 32-bit only hand-off API so it wouldn't have made sense for that case. But now that we've decided to have a 32-bit entry point and switch modes within the payload, I don't see why it couldn't support multiboot. > > I'm not asking you to do any major work or test this or anything. Just keep including the same multiboot header from `head_64.S` (after the EFER check in the 32-bit path). for sure, I had an impression, you are asking to add it for 64-bit. -- To view, visit https://review.coreboot.org/c/coreboot/+/81968?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585 Gerrit-Change-Number: 81968 Gerrit-PatchSet: 65 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Kapil Porwal <kapilporwal(a)google.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 21 May 2024 15:49:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[L] Change in coreboot[main]: libpayload: Add x86_64 (64-bit) support
by Subrata Banik (Code Review) 21 May '24

21 May '24

Attention is currently required from: Arthur Heymans, Julius Werner, Kapil Porwal. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81968?usp=email to look at the new patch set (#66). Change subject: libpayload: Add x86_64 (64-bit) support ...................................................................... libpayload: Add x86_64 (64-bit) support This patch introduces x86_64 (64-bit) support to the payload, building upon the existing x86 (32-bit) architecture. Files necessary for 64-bit compilation are now guarded by the `CONFIG_LP_ARCH_X86_64` Kconfig option. BUG=b:242829490 TEST=Able to verify all valid combinations between coreboot and payload with this patch. Payload Entry Point Behavior with below code. +----------------+--------------------+----------------------------+ | LP_ARCH_X86_64 | Payload Entry Mode | Description | +----------------+--------------------+----------------------------+ | No | 32-bit | Direct protected mode init | +----------------+--------------------+----------------------------+ | Yes | 32-bit | Protected to long mode | +----------------+--------------------+----------------------------+ | Yes | 64-bit | Long mode initialization | +----------------+--------------------+----------------------------+ Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M payloads/libpayload/Kconfig M payloads/libpayload/Makefile M payloads/libpayload/Makefile.mk M payloads/libpayload/arch/x86/Makefile.mk M payloads/libpayload/arch/x86/exception.c A payloads/libpayload/arch/x86/exception_asm_64.S R payloads/libpayload/arch/x86/exec.c M payloads/libpayload/arch/x86/gdb.c A payloads/libpayload/arch/x86/head_64.S M payloads/libpayload/arch/x86/libpayload.ldscript A payloads/libpayload/arch/x86/pt.S M payloads/libpayload/arch/x86/string.c M payloads/libpayload/bin/lpgcc M payloads/libpayload/drivers/storage/ahci_common.c M payloads/libpayload/drivers/usb/uhci.c M payloads/libpayload/include/x86/arch/exception.h M payloads/libpayload/libc/Makefile.mk M payloads/libpayload/vboot/Makefile.mk 18 files changed, 680 insertions(+), 58 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/81968/66 -- To view, visit https://review.coreboot.org/c/coreboot/+/81968?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585 Gerrit-Change-Number: 81968 Gerrit-PatchSet: 66 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Kapil Porwal <kapilporwal(a)google.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>

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[S] Change in coreboot[main]: mb/amd/birman/devicetree_phoenix_opensil: add static DDI configuration
by Varshit Pandya (Code Review) 21 May '24

21 May '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk. Varshit Pandya has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/82581?usp=email ) Change subject: mb/amd/birman/devicetree_phoenix_opensil: add static DDI configuration ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82581?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7b85b04114591f3e9da183019c98ca2cb08e59da Gerrit-Change-Number: 82581 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 21 May 2024 15:42:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit May 2024