coreboot-gerrit April 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: mb/google/brya: Make get_soc_power_limit_config() a public function
by SH Kim (Code Review) 01 Apr '24

01 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Hello Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81616?usp=email to look at the new patch set (#2). Change subject: mb/google/brya: Make get_soc_power_limit_config() a public function ...................................................................... mb/google/brya: Make get_soc_power_limit_config() a public function Make get_soc_power_limit_config() a public function to use on brya variants. Add prefix 'variant_' for it. BUG=None BRANCH=brya TEST=emerge-brya coreboot Change-Id: I31f938938e7c9da49c2aa7b52dd4b5f46f793495 Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> --- M src/mainboard/google/brya/variants/baseboard/brya/ramstage.c M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h 2 files changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/81616/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81616?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I31f938938e7c9da49c2aa7b52dd4b5f46f793495 Gerrit-Change-Number: 81616 Gerrit-PatchSet: 2 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: mb/google/brya/var/xol: Configure power limits by battery status
by SH Kim (Code Review) 01 Apr '24

01 Apr '24

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[XS] Change in coreboot[main]: mb/google/brya: Make get_soc_power_limit_config() to public function
by SH Kim (Code Review) 01 Apr '24

01 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik. SH Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81616?usp=email ) Change subject: mb/google/brya: Make get_soc_power_limit_config() to public function ...................................................................... mb/google/brya: Make get_soc_power_limit_config() to public function Make get_soc_power_limit_config() function as a public function to use on brya variants. Add prefix 'varant_' for it. BUG=None BRANCH=brya TEST=emerge-brya coreboot Change-Id: I31f938938e7c9da49c2aa7b52dd4b5f46f793495 Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> --- M src/mainboard/google/brya/variants/baseboard/brya/ramstage.c M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h 2 files changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/81616/1 diff --git a/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c b/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c index a7e5e8a..9ebe0d7 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c +++ b/src/mainboard/google/brya/variants/baseboard/brya/ramstage.c @@ -11,7 +11,7 @@ WEAK_DEV_PTR(dptf_policy); -static struct soc_power_limits_config *get_soc_power_limit_config(void) +struct soc_power_limits_config *variant_get_soc_power_limit_config(void) { config_t *config = config_of_soc(); size_t i; @@ -44,7 +44,7 @@ if (!num_entries) return; - struct soc_power_limits_config *soc_config = get_soc_power_limit_config(); + struct soc_power_limits_config *soc_config = variant_get_soc_power_limit_config(); if (!soc_config) return; diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h index ad8eb05..583af59 100644 --- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h @@ -4,6 +4,7 @@ #define __BASEBOARD_VARIANTS_H__ #include <chip.h> +#include <intelblocks/power_limit.h> #include <soc/gpio.h> #include <soc/meminit.h> #include <stdint.h> @@ -70,6 +71,9 @@ unsigned int bj_volts_mv; }; +/* Get soc power limit config struct for current CPU sku */ +struct soc_power_limits_config *variant_get_soc_power_limit_config(void); + /* Modify Power Limit devictree settings during ramstage */ void variant_update_power_limits(const struct cpu_power_limits *limits, size_t num_entries); -- To view, visit https://review.coreboot.org/c/coreboot/+/81616?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I31f938938e7c9da49c2aa7b52dd4b5f46f793495 Gerrit-Change-Number: 81616 Gerrit-PatchSet: 1 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: mb/google/brya/var/xol: Configure power limits by battery status
by SH Kim (Code Review) 01 Apr '24

01 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jamie Chen, Kapil Porwal, Nick Vaccaro, Paul Menzel, SH Kim, Sumeet R Pawnikar. Hello Dinesh Gehlot, Eric Lai, Jamie Chen, Kapil Porwal, Nick Vaccaro, Subrata Banik, Sumeet R Pawnikar, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81614?usp=email to look at the new patch set (#4). Change subject: mb/google/brya/var/xol: Configure power limits by battery status ...................................................................... mb/google/brya/var/xol: Configure power limits by battery status When battery level is below critical level or battery is not present, cpus need to run with a power optimized configuration to avoid platform instabilities such as system power down. This will check the current battery status and configure cpu power limits using current PD power value. BUG=b:328729536 BRANCH=brya TEST=built and veified MSR PL2/PL4 values using PTAT. Original power limit configuration for Xol: MSR PL2: 55W, MSR PL4: 114W. [When connected 60W adaptor without battery] Before: MSR PL2: 55W, MSR PL4: 114W After: MSR PL2: 55W, MSR PL4: 60W [When connected 45W adaptor without battery] Before: MSR PL2: 55W, MSR PL4: 114W After: MSR PL2: 45W, MSR PL4: 45W Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77d Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> --- M src/mainboard/google/brya/variants/xol/Makefile.mk A src/mainboard/google/brya/variants/xol/ramstage.c 2 files changed, 59 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/81614/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/81614?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77d Gerrit-Change-Number: 81614 Gerrit-PatchSet: 4 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: mb/google/brya/var/xol: Configure power limits by battery status
by Subrata Banik (Code Review) 01 Apr '24

01 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jamie Chen, Kapil Porwal, Nick Vaccaro, Paul Menzel, SH Kim, Sumeet R Pawnikar. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81614?usp=email ) Change subject: mb/google/brya/var/xol: Configure power limits by battery status ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: split this patch into two cls 1. baseboard cl <-- to make the function public 2. variant cl that uses #1. -- To view, visit https://review.coreboot.org/c/coreboot/+/81614?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77d Gerrit-Change-Number: 81614 Gerrit-PatchSet: 3 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 01 Apr 2024 07:22:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: device/device_util: Add and use is_pci_bridge()
by Shuo Liu (Code Review) 01 Apr '24

01 Apr '24

Attention is currently required from: Arthur Heymans, Christian Walter, Felix Singer, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Paul Menzel, Tim Chu. Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81566?usp=email ) Change subject: device/device_util: Add and use is_pci_bridge() ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/81566/comment/160e38d2_8ba7eaf3 : PS1, Line 7: Add > Add and use is_pci_bridge() Done File src/device/device_util.c: https://review.coreboot.org/c/coreboot/+/81566/comment/150e62b4_60300453 : PS1, Line 939: ( > The outer parentheses are not needed, please remove Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81566?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ied4921f7dc7e144e580d05d4f2262777aa59d895 Gerrit-Change-Number: 81566 Gerrit-PatchSet: 2 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 01 Apr 2024 07:18:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: device/device_util: Add and use is_pci_bridge()
by Shuo Liu (Code Review) 01 Apr '24

01 Apr '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Hello Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81566?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+2 by Patrick Rudolph, Verified+1 by build bot (Jenkins) Change subject: device/device_util: Add and use is_pci_bridge() ...................................................................... device/device_util: Add and use is_pci_bridge() Change-Id: Ied4921f7dc7e144e580d05d4f2262777aa59d895 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> --- M src/device/device_util.c M src/include/device/device.h M src/soc/intel/xeon_sp/uncore_acpi.c 3 files changed, 8 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/81566/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81566?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ied4921f7dc7e144e580d05d4f2262777aa59d895 Gerrit-Change-Number: 81566 Gerrit-PatchSet: 2 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: mb/google/brya/var/xol: Configure power limits by battery status
by SH Kim (Code Review) 01 Apr '24

01 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jamie Chen, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik, Sumeet R Pawnikar. SH Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81614?usp=email ) Change subject: mb/google/brya/var/xol: Configure power limits by battery status ...................................................................... Patch Set 3: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/81614/comment/8b8fc9fd_25725058 : PS2, Line 10: platform : instabilities > What instabilities occur? Please elaborate? Doesn’t the battery just drain faster? Done https://review.coreboot.org/c/coreboot/+/81614/comment/54574e55_50adca65 : PS2, Line 18: MSR PL2: 55W, MSR PL4: 114W > Please document the command you used to get these. I mentioned I used PTAT. File src/mainboard/google/brya/variants/xol/ramstage.c: https://review.coreboot.org/c/coreboot/+/81614/comment/dfb9ff84_ca71fa31 : PS2, Line 24: > Log the non-zero return value? Done https://review.coreboot.org/c/coreboot/+/81614/comment/92086335_f751206a : PS2, Line 28: get_soc_power_limit_config > this is already present inside baseboard/brya. why not leveraging the same ? […] Done https://review.coreboot.org/c/coreboot/+/81614/comment/fa41df4c_d1f30ae3 : PS2, Line 64: performance > The commit message says *power*? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81614?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77d Gerrit-Change-Number: 81614 Gerrit-PatchSet: 3 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 01 Apr 2024 07:17:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/brya/var/xol: Configure power limits by battery status
by SH Kim (Code Review) 01 Apr '24

01 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jamie Chen, Kapil Porwal, Nick Vaccaro, SH Kim, Sumeet R Pawnikar. Hello Dinesh Gehlot, Eric Lai, Jamie Chen, Kapil Porwal, Nick Vaccaro, Subrata Banik, Sumeet R Pawnikar, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81614?usp=email to look at the new patch set (#3). Change subject: mb/google/brya/var/xol: Configure power limits by battery status ...................................................................... mb/google/brya/var/xol: Configure power limits by battery status When battery level is below critical level or battery is not present, cpus need to run with a power optimized configuration to avoid platform instabilities such as system power down. This will check the current battery status and configure cpu power limits using current PD power value. BUG=b:328729536 TEST=built and veified MSR PL2/PL4 values using PTAT. Original power limit configuration for Xol: MSR PL2: 55W, MSR PL4: 114W. [When connected 60W adaptor without battery] Before: MSR PL2: 55W, MSR PL4: 114W After: MSR PL2: 55W, MSR PL4: 60W [When connected 45W adaptor without battery] Before: MSR PL2: 55W, MSR PL4: 114W After: MSR PL2: 45W, MSR PL4: 45W Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77d Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> --- M src/mainboard/google/brya/variants/baseboard/brya/ramstage.c M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/brya/variants/xol/Makefile.mk A src/mainboard/google/brya/variants/xol/ramstage.c 4 files changed, 65 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/81614/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/81614?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77d Gerrit-Change-Number: 81614 Gerrit-PatchSet: 3 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Enhance portability with uintptr_t/size_t
by Subrata Banik (Code Review) 01 Apr '24

01 Apr '24

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81615?usp=email ) Change subject: drivers/intel/fsp2_0: Enhance portability with uintptr_t/size_t ...................................................................... drivers/intel/fsp2_0: Enhance portability with uintptr_t/size_t Replaces fixed-width integers for pointers and sizes with uintptr_t and size_t, promoting portability across 32-bit and 64-bit architectures. For FSP-API specific UPD assignments, relying on `efi_uintn_t` rather fixed size datatype uint32_t/uint64_t. BUG=b:242829490 TEST=Firmware splash screen visible on google/rex0 w/ both 32-bit and 64-bit compilation. Change-Id: Iab5c612e0640441a2a10e77949416de2afdb8985 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/drivers/intel/fsp2_0/fsp_gop_blt.c M src/drivers/intel/fsp2_0/include/fsp/fsp_gop_blt.h M src/include/bootsplash.h M src/lib/bmp_logo.c 4 files changed, 10 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/81615/1 diff --git a/src/drivers/intel/fsp2_0/fsp_gop_blt.c b/src/drivers/intel/fsp2_0/fsp_gop_blt.c index 8b64502..52e4595 100644 --- a/src/drivers/intel/fsp2_0/fsp_gop_blt.c +++ b/src/drivers/intel/fsp2_0/fsp_gop_blt.c @@ -133,7 +133,7 @@ /* Fill BMP image into BLT buffer format */ static void *fill_blt_buffer(efi_bmp_image_header *header, - uint32_t logo_ptr, uint32_t blt_buffer_size) + uintptr_t logo_ptr, size_t blt_buffer_size) { efi_graphics_output_blt_pixel *gop_blt_buffer; efi_graphics_output_blt_pixel *gop_blt_ptr; @@ -233,11 +233,12 @@ } /* Convert a *.BMP graphics image to a GOP blt buffer */ -void fsp_convert_bmp_to_gop_blt(uint32_t *logo, uint32_t *logo_size, - uint32_t *blt_ptr, uint32_t *blt_size, +void fsp_convert_bmp_to_gop_blt(efi_uintn_t *logo, uint32_t *logo_size, + efi_uintn_t *blt_ptr, efi_uintn_t *blt_size, uint32_t *pixel_height, uint32_t *pixel_width) { - uint32_t logo_ptr, logo_ptr_size, blt_buffer_size; + uintptr_t logo_ptr; + size_t logo_ptr_size, blt_buffer_size; efi_bmp_image_header *bmp_header; if (!logo || !logo_size || !blt_ptr || !blt_size || !pixel_height || !pixel_width) @@ -265,5 +266,5 @@ *blt_size = blt_buffer_size; *pixel_height = bmp_header->PixelHeight; *pixel_width = bmp_header->PixelWidth; - *blt_ptr = (uint32_t)fill_blt_buffer(bmp_header, logo_ptr, blt_buffer_size); + *blt_ptr = (uintptr_t)fill_blt_buffer(bmp_header, logo_ptr, blt_buffer_size); } diff --git a/src/drivers/intel/fsp2_0/include/fsp/fsp_gop_blt.h b/src/drivers/intel/fsp2_0/include/fsp/fsp_gop_blt.h index 7ffb54c..ff15483 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/fsp_gop_blt.h +++ b/src/drivers/intel/fsp2_0/include/fsp/fsp_gop_blt.h @@ -7,8 +7,8 @@ #include <types.h> /* Convert a *.BMP graphics image to a GOP blt buffer */ -void fsp_convert_bmp_to_gop_blt(uint32_t *logo, uint32_t *logo_size, - uint32_t *blt_ptr, uint32_t *blt_size, +void fsp_convert_bmp_to_gop_blt(efi_uintn_t *logo, uint32_t *logo_size, + efi_uintn_t *blt_ptr, efi_uintn_t *blt_size, uint32_t *pixel_height, uint32_t *pixel_width); #endif /* FSP_GOP_BLT_H */ diff --git a/src/include/bootsplash.h b/src/include/bootsplash.h index 86048a4..0c9b032 100644 --- a/src/include/bootsplash.h +++ b/src/include/bootsplash.h @@ -20,7 +20,7 @@ * For example: Introduce configurable BMP logo for customization on platforms like ChromeOS */ const char *bmp_logo_filename(void); -void bmp_load_logo(uint32_t *logo_ptr, uint32_t *logo_size); +void bmp_load_logo(uintptr_t *logo_ptr, size_t *logo_size); void bmp_release_logo(void); #endif diff --git a/src/lib/bmp_logo.c b/src/lib/bmp_logo.c index 2888777..ee0626a 100644 --- a/src/lib/bmp_logo.c +++ b/src/lib/bmp_logo.c @@ -16,7 +16,7 @@ } #endif -void bmp_load_logo(uint32_t *logo_ptr, uint32_t *logo_size) +void bmp_load_logo(uintptr_t *logo_ptr, size_t *logo_size) { void *logo_buffer; -- To view, visit https://review.coreboot.org/c/coreboot/+/81615?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iab5c612e0640441a2a10e77949416de2afdb8985 Gerrit-Change-Number: 81615 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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