coreboot-gerrit April 2024

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[XL] Change in coreboot[main]: soc/intel/xeon_sp: Add Granite Rapids initial codes
by Shuo Liu (Code Review) 02 Apr '24

02 Apr '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Shuo Liu, TangYiwei, Tim Chu. Hello Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, TangYiwei, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81316?usp=email to look at the new patch set (#33). The following approvals got outdated and were removed: Code-Review+1 by Lean Sheng Tan, Verified+1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp: Add Granite Rapids initial codes ...................................................................... soc/intel/xeon_sp: Add Granite Rapids initial codes coreboot GNR (Granite Rapids) is a FSP 2.4 based, no-PCH, single IO-APIC Xeon-SP platform. The same set of codes is also used for SRF (Sierra Forest) SoC. This patch initially sets the code set up. 1. All register definitions are forked from SPR (Sapphire Rapids) and EBG (Emmisburg PCH)'s codes are reused. 2. src/soc/intel/xeon_sp/chip_gen6.c is newly added as chip common codes for 6th Gen Xeon-SP SoC (Granite Rapids) and later. TEST=intel/archercity CRB Change-Id: I3084e1b5abf25d8d9504bebeaed2a15b916ed56b Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Signed-off-by: Gang Chen <gang.c.chen(a)intel.com> Signed-off-by: Jincheng Li <jincheng.li(a)intel.com> --- M MAINTAINERS M src/soc/intel/xeon_sp/Makefile.mk M src/soc/intel/xeon_sp/chip_gen1.c A src/soc/intel/xeon_sp/chip_gen6.c A src/soc/intel/xeon_sp/gnr/Kconfig A src/soc/intel/xeon_sp/gnr/Makefile.inc A src/soc/intel/xeon_sp/gnr/acpi/gpe.asl A src/soc/intel/xeon_sp/gnr/acpi/platform.asl A src/soc/intel/xeon_sp/gnr/chip.c A src/soc/intel/xeon_sp/gnr/chip.h A src/soc/intel/xeon_sp/gnr/cpu.c A src/soc/intel/xeon_sp/gnr/include/soc/cpu.h A src/soc/intel/xeon_sp/gnr/include/soc/pci_devs.h A src/soc/intel/xeon_sp/gnr/include/soc/soc_msr.h A src/soc/intel/xeon_sp/gnr/include/soc/soc_util.h A src/soc/intel/xeon_sp/gnr/include/soc/vpd.h A src/soc/intel/xeon_sp/gnr/ramstage.c A src/soc/intel/xeon_sp/gnr/romstage.c A src/soc/intel/xeon_sp/gnr/soc_acpi.c A src/soc/intel/xeon_sp/gnr/soc_util.c M src/soc/intel/xeon_sp/include/soc/chip_common.h M src/soc/intel/xeon_sp/include/soc/fsp_upd.h M src/soc/intel/xeon_sp/lockdown.c M src/soc/intel/xeon_sp/uncore.c 24 files changed, 1,320 insertions(+), 62 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/81316/33 -- To view, visit https://review.coreboot.org/c/coreboot/+/81316?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3084e1b5abf25d8d9504bebeaed2a15b916ed56b Gerrit-Change-Number: 81316 Gerrit-PatchSet: 33 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: TangYiwei Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: include/device/pci_ids.h: Add DIDs for MTL Touch controller
by Cliff Huang (Code Review) 02 Apr '24

02 Apr '24

Attention is currently required from: Cliff Huang, Eran Mitrani, Jingyuan Liang. Hello Eran Mitrani, Eric Lai, Jingyuan Liang, Kyoung Il Kim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81330?usp=email to look at the new patch set (#2). Change subject: include/device/pci_ids.h: Add DIDs for MTL Touch controller ...................................................................... include/device/pci_ids.h: Add DIDs for MTL Touch controller When touch controller is configured as THC-SPI mode, DID is 0x7e49 for THC0, and 0x7e4b for THC1. 0x7e48 and 0x7ea4 are the DIDs when ThcMode is 0 (default) for THC0 and THC1 respectively. BUG=b:307775082 Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I1b98fdbd8d8588492bcafa0f3998818dc83ff1d9 --- M src/include/device/pci_ids.h 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/81330/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81330?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1b98fdbd8d8588492bcafa0f3998818dc83ff1d9 Gerrit-Change-Number: 81330 Gerrit-PatchSet: 2 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Reviewer: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Henry Barnor <hbarnor(a)chromium.org> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-CC: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: mb/google/nissa/var/gothrax: Add touchscreen driver for ILI2901A-A210
by Eric Lai (Code Review) 02 Apr '24

02 Apr '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Subrata Banik, Yunlong Jia. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81610?usp=email ) Change subject: mb/google/nissa/var/gothrax: Add touchscreen driver for ILI2901A-A210 ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/brya/variants/gothrax/overridetree.cb: https://review.coreboot.org/c/coreboot/+/81610/comment/b3459009_35bfffbf : PS2, Line 244: "300" please check the power sequence in SPEC. -- To view, visit https://review.coreboot.org/c/coreboot/+/81610?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2d26bfd4f415aa128b6256f83bc58987b15a557a Gerrit-Change-Number: 81610 Gerrit-PatchSet: 2 Gerrit-Owner: Yunlong Jia <yunlong.jia(a)ecs.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyle Lin <kylelinck(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Yunlong Jia <yunlong.jia(a)ecs.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 02 Apr 2024 07:15:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/nissa/var/gothrax: Add touchscreen driver for ILI2901A-A210
by Yunlong Jia (Code Review) 02 Apr '24

02 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik, Yunlong Jia. Hello Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81610?usp=email to look at the new patch set (#2). Change subject: mb/google/nissa/var/gothrax: Add touchscreen driver for ILI2901A-A210 ...................................................................... mb/google/nissa/var/gothrax: Add touchscreen driver for ILI2901A-A210 I2C slave addresses 0x41. BUG=b:332458912 BRANCH=None TEST=emerge-nissa coreboot Change-Id: I2d26bfd4f415aa128b6256f83bc58987b15a557a Signed-off-by: Yunlong Jia <yunlong.jia(a)ecs.corp-partner.google.com> --- M src/mainboard/google/brya/variants/gothrax/overridetree.cb 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/81610/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81610?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2d26bfd4f415aa128b6256f83bc58987b15a557a Gerrit-Change-Number: 81610 Gerrit-PatchSet: 2 Gerrit-Owner: Yunlong Jia <yunlong.jia(a)ecs.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyle Lin <kylelinck(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Yunlong Jia <yunlong.jia(a)ecs.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: mb/google/nissa/var/gothrax: Add touchscreen driver for ILI2901A-A210
by Yunlong Jia (Code Review) 02 Apr '24

02 Apr '24

Yunlong Jia has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81610?usp=email ) Change subject: mb/google/nissa/var/gothrax: Add touchscreen driver for ILI2901A-A210 ...................................................................... mb/google/nissa/var/gothrax: Add touchscreen driver for ILI2901A-A210 I2C slave addresses 0x41. BUG=b:332458912 BRANCH=None TEST=emerge-nissa coreboot Change-Id: I2d26bfd4f415aa128b6256f83bc58987b15a557a --- M src/mainboard/google/brya/variants/gothrax/overridetree.cb 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/81610/1 diff --git a/src/mainboard/google/brya/variants/gothrax/overridetree.cb b/src/mainboard/google/brya/variants/gothrax/overridetree.cb index 77be31c..f534851 100644 --- a/src/mainboard/google/brya/variants/gothrax/overridetree.cb +++ b/src/mainboard/google/brya/variants/gothrax/overridetree.cb @@ -234,6 +234,24 @@ probe TOUCH_PANEL TOUCH_PANEL_ENABLE end end + chip drivers/i2c/hid + register "generic.hid" = ""ILI2901"" + register "generic.desc" = ""ILI Touchscreen"" + register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)" + register "generic.detect" = "1" + register "generic.reset_gpio" = + "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)" + register "generic.reset_delay_ms" = "300" + register "generic.reset_off_delay_ms" = "2" + register "generic.enable_gpio" = + "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" + register "generic.enable_delay_ms" = "6" + register "generic.has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 0x41 on + probe TOUCH_PANEL TOUCH_PANEL_ENABLE + end + end end device ref i2c2 on chip drivers/i2c/sx9324 -- To view, visit https://review.coreboot.org/c/coreboot/+/81610?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2d26bfd4f415aa128b6256f83bc58987b15a557a Gerrit-Change-Number: 81610 Gerrit-PatchSet: 1 Gerrit-Owner: Yunlong Jia <yunlong.jia(a)ecs.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: mb/google/brya: Create trulo variant
by Dinesh Gehlot (Code Review) 02 Apr '24

02 Apr '24

Dinesh Gehlot has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81627?usp=email ) Change subject: mb/google/brya: Create trulo variant ...................................................................... mb/google/brya: Create trulo variant This patch adds a new variant trulo for the baseboard trulo. Change-Id: I91157d252ef56c8938bfc08ed0f734c5dc7e614d Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/variants/trulo/include/variant/ec.h A src/mainboard/google/brya/variants/trulo/include/variant/gpio.h A src/mainboard/google/brya/variants/trulo/overridetree.cb 5 files changed, 27 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/81627/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index b40f025..d7b216f 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -597,6 +597,7 @@ default 0x1 if BOARD_GOOGLE_VELL default 0x1 if BOARD_GOOGLE_TANIKS default 0x0 if BOARD_GOOGLE_NIVVIKS + default 0x0 if BOARD_GOOGLE_TRULO default 0x0 if BOARD_GOOGLE_NEREID default 0x3 if BOARD_GOOGLE_AGAH default 0x1 if BOARD_GOOGLE_VOLMAR @@ -684,6 +685,7 @@ default "Vell" if BOARD_GOOGLE_VELL default "Taniks" if BOARD_GOOGLE_TANIKS default "Nivviks" if BOARD_GOOGLE_NIVVIKS + default "Trulo" if BOARD_GOOGLE_TRULO default "Nereid" if BOARD_GOOGLE_NEREID default "Agah" if BOARD_GOOGLE_AGAH default "Volmar" if BOARD_GOOGLE_VOLMAR @@ -744,6 +746,7 @@ default "vell" if BOARD_GOOGLE_VELL default "taniks" if BOARD_GOOGLE_TANIKS default "nivviks" if BOARD_GOOGLE_NIVVIKS + default "trulo" if BOARD_GOOGLE_TRULO default "nereid" if BOARD_GOOGLE_NEREID default "agah" if BOARD_GOOGLE_AGAH default "volmar" if BOARD_GOOGLE_VOLMAR diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index a8d111a..9925df0 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -140,6 +140,10 @@ config BOARD_GOOGLE_TIVVIKS bool "-> Tivviks" +config BOARD_GOOGLE_TRULO + bool "-> Trulo" + select BOARD_GOOGLE_BASEBOARD_TRULO + config BOARD_GOOGLE_ULDREN bool "-> Uldren" diff --git a/src/mainboard/google/brya/variants/trulo/include/variant/ec.h b/src/mainboard/google/brya/variants/trulo/include/variant/ec.h new file mode 100644 index 0000000..7a2a6ff --- /dev/null +++ b/src/mainboard/google/brya/variants/trulo/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __VARIANT_EC_H__ +#define __VARIANT_EC_H__ + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/brya/variants/trulo/include/variant/gpio.h b/src/mainboard/google/brya/variants/trulo/include/variant/gpio.h new file mode 100644 index 0000000..c4fe342 --- /dev/null +++ b/src/mainboard/google/brya/variants/trulo/include/variant/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef VARIANT_GPIO_H +#define VARIANT_GPIO_H + +#include <baseboard/gpio.h> + +#endif diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb new file mode 100644 index 0000000..ee86142 --- /dev/null +++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb @@ -0,0 +1,4 @@ +chip soc/intel/alderlake + device domain 0 on + end +end -- To view, visit https://review.coreboot.org/c/coreboot/+/81627?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I91157d252ef56c8938bfc08ed0f734c5dc7e614d Gerrit-Change-Number: 81627 Gerrit-PatchSet: 1 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: mb/google/brya: Add new baseboard trulo
by Dinesh Gehlot (Code Review) 02 Apr '24

02 Apr '24

Dinesh Gehlot has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81626?usp=email ) Change subject: mb/google/brya: Add new baseboard trulo ...................................................................... mb/google/brya: Add new baseboard trulo This patch adds a new baseboard trulo. This commit is a stub which only adds the minimum code needed for a successful buil. Change-Id: Iad6230064c6b8359698d37c3e0440614cc7b073d Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> --- M src/mainboard/google/brya/Kconfig A src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk A src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb A src/mainboard/google/brya/variants/baseboard/trulo/gpio.c A src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h A src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h A src/mainboard/google/brya/variants/baseboard/trulo/memory.c 7 files changed, 117 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/81626/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 160d12a..b40f025 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -125,6 +125,13 @@ select HAVE_PCIE_WWAN select HAVE_WWAN_POWER_SEQUENCE +config BOARD_GOOGLE_BASEBOARD_TRULO + def_bool n + select BOARD_GOOGLE_BRYA_COMMON + select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS + select SOC_INTEL_ALDERLAKE_PCH_N + select SYSTEM_TYPE_LAPTOP + config BOARD_GOOGLE_ANRAGGAR select BOARD_GOOGLE_BASEBOARD_NISSA select BOARD_ROMSIZE_KB_16384 @@ -555,6 +562,7 @@ default "brask" if BOARD_GOOGLE_BASEBOARD_BRASK default "hades" if BOARD_GOOGLE_BASEBOARD_HADES default "nissa" if BOARD_GOOGLE_BASEBOARD_NISSA + default "trulo" if BOARD_GOOGLE_BASEBOARD_TRULO config CHROMEOS select EC_GOOGLE_CHROMEEC_SWITCHES @@ -657,6 +665,7 @@ default "Google_Brask" if BOARD_GOOGLE_BASEBOARD_BRASK default "Google_Hades" if BOARD_GOOGLE_BASEBOARD_HADES default "Google_Nissa" if BOARD_GOOGLE_BASEBOARD_NISSA + default "Google_Trulo" if BOARD_GOOGLE_BASEBOARD_Trulo config MAINBOARD_PART_NUMBER default "Brya" if BOARD_GOOGLE_BRYA0 diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk b/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk new file mode 100644 index 0000000..a9bdad3 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk @@ -0,0 +1,6 @@ +bootblock-y += gpio.c + +romstage-y += memory.c +romstage-y += gpio.c + +ramstage-y += gpio.c \ No newline at end of file diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb new file mode 100644 index 0000000..a5e2217 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb @@ -0,0 +1,4 @@ +chip soc/intel/alderlake + device domain 0 on + end +end diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/gpio.c b/src/mainboard/google/brya/variants/baseboard/trulo/gpio.c new file mode 100644 index 0000000..4138762 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/gpio.c @@ -0,0 +1,43 @@ + +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <types.h> +#include <soc/gpio.h> +#include <vendorcode/google/chromeos/chromeos.h> +/* Pad configuration in ramstage */ +static const struct pad_config gpio_table[] = { + /* TODO */ +}; +/* Early pad configuration in bootblock */ +static const struct pad_config early_gpio_table[] = { + /* TODO */ +}; +const struct pad_config *__weak variant_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(gpio_table); + return gpio_table; +} +const struct pad_config *__weak variant_gpio_override_table(size_t *num) +{ + *num = 0; + return NULL; +} +const struct pad_config *__weak variant_early_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(early_gpio_table); + return early_gpio_table; +} +static const struct cros_gpio cros_gpios[] = { + /* TODO */ +}; +const struct cros_gpio *__weak variant_cros_gpios(size_t *num) +{ + *num = ARRAY_SIZE(cros_gpios); + return cros_gpios; +} +const struct pad_config *__weak variant_romstage_gpio_table(size_t *num) +{ + *num = 0; + return NULL; +} diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h new file mode 100644 index 0000000..a2210c6 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __BASEBOARD_EC_H__ +#define __BASEBOARD_EC_H__ + +#include <ec/ec.h> +#include <ec/google/chromeec/ec_commands.h> +#include <baseboard/gpio.h> + +/* TODO: Set the correct values */ +#define MAINBOARD_EC_SCI_EVENTS 0 +#define MAINBOARD_EC_SMI_EVENTS 0 +#define MAINBOARD_EC_S5_WAKE_EVENTS 0 +#define MAINBOARD_EC_S3_WAKE_EVENTS 0 +#define MAINBOARD_EC_S0IX_WAKE_EVENTS 0 +#define MAINBOARD_EC_LOG_EVENTS 0 + +#endif /* __BASEBOARD_EC_H__ */ diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h new file mode 100644 index 0000000..9ca9ee7 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __BASEBOARD_GPIO_H__ +#define __BASEBOARD_GPIO_H__ + +#include <soc/gpe.h> +#include <soc/gpio.h> + +/* TODO: Set the correct values */ +#define EC_SCI_GPI 0 +#define GPIO_PCH_WP 0 +#define GPIO_EC_IN_RW 0 +#define GPIO_SLP_S0_GATE 0 + +#endif /* __BASEBOARD_GPIO_H__ */ diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/memory.c b/src/mainboard/google/brya/variants/baseboard/trulo/memory.c new file mode 100644 index 0000000..420b366 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/memory.c @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <gpio.h> + +const struct mb_cfg *__weak variant_memory_params(void) +{ + /* TODO */ + return NULL; +} + +bool __weak variant_is_half_populated(void) +{ + /* TODO */ + return false; +} + +void __weak variant_get_spd_info(struct mem_spd *spd_info) +{ + /* TODO */ +} -- To view, visit https://review.coreboot.org/c/coreboot/+/81626?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iad6230064c6b8359698d37c3e0440614cc7b073d Gerrit-Change-Number: 81626 Gerrit-PatchSet: 1 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Share unlock_pam_regions()
by Arthur Heymans (Code Review) 02 Apr '24

02 Apr '24

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81619?usp=email ) Change subject: soc/intel/xeon_sp: Share unlock_pam_regions() ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/xeon_sp/romstage.c: https://review.coreboot.org/c/coreboot/+/81619/comment/118af41a_4807bf74 : PS2, Line 27: unlock_pam_regions(); Oh sorry for my suggestion to move it back to romstage. I see that it happens after FSP-M. I'm pretty sure it's ok to just do in ramstage. I suppose you can just remove this line and also the weak implementation? -- To view, visit https://review.coreboot.org/c/coreboot/+/81619?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idbc7dc6dd22a1747a65543666fc714a0872e6b37 Gerrit-Change-Number: 81619 Gerrit-PatchSet: 2 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 02 Apr 2024 06:33:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/corsola: Add new board variant Wugtrio
by Yu-Ping Wu (Code Review) 02 Apr '24

02 Apr '24

Attention is currently required from: Eric Lai, Hung-Te Lin, Paul Menzel, Ruihai Zhou, Xuxin Xiong, Yang Wu, Yidi Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81585?usp=email ) Change subject: mb/google/corsola: Add new board variant Wugtrio ...................................................................... Patch Set 10: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81585?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I586de68da4d0ee2dd5b7baea92ebb06db9fcfe8b Gerrit-Change-Number: 81585 Gerrit-PatchSet: 10 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 02 Apr 2024 06:31:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/corsola: Move MIPI panel selection to BOARD_SPECIFIC_OPTION...
by Yu-Ping Wu (Code Review) 02 Apr '24

02 Apr '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Ruihai Zhou, Xuxin Xiong, Yang Wu. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81602?usp=email ) Change subject: mb/google/corsola: Move MIPI panel selection to BOARD_SPECIFIC_OPTIONS section ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81602?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib5792542f55a78c0840b6169b5ecf092e7cefe98 Gerrit-Change-Number: 81602 Gerrit-PatchSet: 6 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Tue, 02 Apr 2024 06:30:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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