coreboot-gerrit April 2024

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[S] Change in coreboot[main]: vc/intel/fsp: Refactor FSP header inclusion for EDK2 compatibility
by Subrata Banik (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Appukuttan V K, Arthur Heymans, Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Ronak Kanabar. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81623?usp=email ) Change subject: vc/intel/fsp: Refactor FSP header inclusion for EDK2 compatibility ...................................................................... Patch Set 5: (1 comment) File src/vendorcode/intel/fsp/fsp2_0/IntelFspPkg/Include/FspInfoHeader.h: https://review.coreboot.org/c/coreboot/+/81623/comment/ada74e93_b781bace : PS5, Line 7: vendorcode/intel/edk2/UDK2017/ > This prefix is used in other places in the tree. Can we use a Kconfig param for it that depends on the UDK kconfig? That would make this file trivial and same with vendorcode/intel/Makefile.mk can you please help to share a little more details which I can take as an incremental change. I'm sensing that you are asking to introduce a kconfig for each `UDK version` to mask the `vendorcode/intel/edk2/UDK2017` path ? Then, this file only includes only one header like ```#include <CONFIG(UDK_PATH)/Include/Guid/FspHeaderFile.h>``` UDK_PATH would depend on UDK configs like UDK_2017_VERSION etc.? -- To view, visit https://review.coreboot.org/c/coreboot/+/81623?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I29e5002821843c9cffbc8f6317d1062175f014ff Gerrit-Change-Number: 81623 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Wed, 03 Apr 2024 08:52:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: include/efi: Change efi_return_status_t type to UINTN
by Appukuttan V K (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Ronak Kanabar, Subrata Banik. Appukuttan V K has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81630?usp=email ) Change subject: include/efi: Change efi_return_status_t type to UINTN ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/81630?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If6342c4d40c76b702351070e424797c21138a4a9 Gerrit-Change-Number: 81630 Gerrit-PatchSet: 3 Gerrit-Owner: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Wed, 03 Apr 2024 08:43:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/google/nissa/variant/sundance: Update devicetree settings
by Eric Lai (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Derek Huang, Dinesh Gehlot, Kapil Porwal, Leo Chou, Nick Vaccaro, Shou-Chieh Hsu, Subrata Banik. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81653?usp=email ) Change subject: mb/google/nissa/variant/sundance: Update devicetree settings ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81653?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I857be7bc7f98281cac57fef85bf9f3cef2ec14e9 Gerrit-Change-Number: 81653 Gerrit-PatchSet: 2 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Wed, 03 Apr 2024 08:10:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Enhance portability with uintptr_t/size_t
by Ronak Kanabar (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Andrey Petrov, Elyes Haouas, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Paul Menzel, Subrata Banik. Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81615?usp=email ) Change subject: drivers/intel/fsp2_0: Enhance portability with uintptr_t/size_t ...................................................................... Patch Set 8: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81615?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iab5c612e0640441a2a10e77949416de2afdb8985 Gerrit-Change-Number: 81615 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 03 Apr 2024 08:07:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: drivers/pc80/tpm: Disable device if TPM not present
by Patrick Rudolph (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Christian Walter, Michał Żygowski. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80455?usp=email ) Change subject: drivers/pc80/tpm: Disable device if TPM not present ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80455?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I05972ad74a36abaafa2f17a16f09710550a3a3f3 Gerrit-Change-Number: 80455 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Comment-Date: Wed, 03 Apr 2024 07:59:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: security/tpm: make tis_probe() return tpm_family
by Uwe Poeche (Code Review) 03 Apr '24

03 Apr '24

Uwe Poeche has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69159?usp=email ) Change subject: security/tpm: make tis_probe() return tpm_family ...................................................................... Patch Set 27: (1 comment) Patchset: PS27: With this patch we get problems on timeless build with mainboard siemens/mc_ehl1. Normal build without timeless works. With timeless it results in overlap section errors on bootblock. I found out by analyzing bootblock elf files that e.g. size of .text section increased by the patch and that normally on timeless build the .text section start address is shifted by 0x1000 bytes higher. So the place on timeless build seems too less. -- To view, visit https://review.coreboot.org/c/coreboot/+/69159?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5006e0cdfef76ff79ce9e1cf280fcd5515ae01b0 Gerrit-Change-Number: 69159 Gerrit-PatchSet: 27 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Comment-Date: Wed, 03 Apr 2024 07:53:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: vc/intel/edk2: Define FSP_SIG macro for FSP 2.x compatibility
by Varshit Pandya (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Subrata Banik. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81622?usp=email ) Change subject: vc/intel/edk2: Define FSP_SIG macro for FSP 2.x compatibility ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81622?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4f97fc303ca2881ccd17b4d149d01c3b671dbbde Gerrit-Change-Number: 81622 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Wed, 03 Apr 2024 07:37:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: cpu/x86/topology: Add node ID parser
by Patrick Rudolph (Code Review) 03 Apr '24

03 Apr '24

Patrick Rudolph has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81515?usp=email ) Change subject: cpu/x86/topology: Add node ID parser ...................................................................... cpu/x86/topology: Add node ID parser Currently the SRAT table only exposes one proximity group as it uses the LAPIC node_id, which is always initialized to 0. Use CPUID leaf 0x1f or 0xb to gather the node ID and fill it to make sure that at least one proximity group for every socket is advertised. For now the SNC config isn't taken into account. Change-Id: Ia3ed1e5923aa18ca7619b32cde491fdb4da0fa0d Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81515 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Shuo Liu <shuo.liu(a)intel.com> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/topology.c M src/include/cpu/x86/topology.h M src/soc/intel/xeon_sp/spr/cpu.c 3 files changed, 70 insertions(+), 0 deletions(-) Approvals: Arthur Heymans: Looks good to me, approved Shuo Liu: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/cpu/x86/topology.c b/src/cpu/x86/topology.c index 6c8d7fd..baa4a7a 100644 --- a/src/cpu/x86/topology.c +++ b/src/cpu/x86/topology.c @@ -4,6 +4,8 @@ #include <device/device.h> #include <cpu/x86/topology.h> +#define CPUID_EXTENDED_CPU_TOPOLOGY2 0x1f + #define CPUID_EXTENDED_CPU_TOPOLOGY 0x0b #define LEVEL_TYPE_CORE 2 #define LEVEL_TYPE_SMT 1 @@ -21,6 +23,64 @@ #define CPUID_CPU_TOPOLOGY_CORE_BITS(res, threadbits) \ ((CPUID_CPU_TOPOLOGY(LEVEL_BITS, (res).eax)) - threadbits) +/* Return the level shift for the highest supported level (the package) */ +static enum cb_err get_cpu_package_bits(uint32_t *package_bits) +{ + struct cpuid_result cpuid_regs; + int level_num, cpu_id_op = 0; + const uint32_t cpuid_max_func = cpuid_get_max_func(); + + /* + * Not all CPUs support this, those won't get topology filled in here. + * CPU specific code can do this however. + */ + if (cpuid_max_func >= CPUID_EXTENDED_CPU_TOPOLOGY2) + cpu_id_op = CPUID_EXTENDED_CPU_TOPOLOGY2; + else if (cpuid_max_func >= CPUID_EXTENDED_CPU_TOPOLOGY) + cpu_id_op = CPUID_EXTENDED_CPU_TOPOLOGY; + else + return CB_ERR; + + *package_bits = level_num = 0; + cpuid_regs = cpuid_ext(cpu_id_op, level_num); + + /* + * Sub-leaf index 0 enumerates SMT level, some AMD CPUs leave this CPUID leaf + * reserved so bail out. Cpu specific code can fill in the topology later. + */ + if (CPUID_CPU_TOPOLOGY_LEVEL(cpuid_regs) != LEVEL_TYPE_SMT) + return CB_ERR; + + do { + *package_bits = (CPUID_CPU_TOPOLOGY(LEVEL_BITS, (cpuid_regs).eax)); + level_num++; + cpuid_regs = cpuid_ext(cpu_id_op, level_num); + /* Stop when level type is invalid i.e 0. */ + } while (CPUID_CPU_TOPOLOGY_LEVEL(cpuid_regs)); + + return CB_SUCCESS; +} + +void set_cpu_node_id_leaf_1f_b(struct device *cpu) +{ + static uint32_t package_bits; + static enum cb_err package_bits_ret; + static bool done = false; + + if (!done) { + package_bits_ret = get_cpu_package_bits(&package_bits); + done = true; + } + + const uint32_t apicid = cpu->path.apic.initial_lapicid; + + /* + * If leaf_1f or leaf_b does not exist don't update the node_id. + */ + if (package_bits_ret == CB_SUCCESS) + cpu->path.apic.node_id = (apicid >> package_bits); +} + /* Get number of bits for core ID and SMT ID */ static enum cb_err get_cpu_core_thread_bits(uint32_t *core_bits, uint32_t *thread_bits) { diff --git a/src/include/cpu/x86/topology.h b/src/include/cpu/x86/topology.h index db29d09..d66f2eb 100644 --- a/src/include/cpu/x86/topology.h +++ b/src/include/cpu/x86/topology.h @@ -11,4 +11,9 @@ */ void set_cpu_topology_from_leaf_b(struct device *cpu); +/* Fill in the topology node ID in struct path APIC based CPUID EAX=0x1f + * or CPUID EAX=0xb. If those leaves aren't supported then the node ID + * won't be updated. + */ +void set_cpu_node_id_leaf_1f_b(struct device *cpu); #endif diff --git a/src/soc/intel/xeon_sp/spr/cpu.c b/src/soc/intel/xeon_sp/spr/cpu.c index 2ed8e22..f9c8e26 100644 --- a/src/soc/intel/xeon_sp/spr/cpu.c +++ b/src/soc/intel/xeon_sp/spr/cpu.c @@ -14,6 +14,7 @@ #include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/x86/mtrr.h> +#include <cpu/x86/topology.h> #include <device/pci_mmio_cfg.h> #include <intelblocks/cpulib.h> #include <intelblocks/mp_init.h> @@ -82,6 +83,10 @@ __func__, dev_path(cpu), cpu_index(), cpu->path.apic.apic_id, cpu->path.apic.package_id); + /* Populate the node ID. It will be used as proximity ID. */ + set_cpu_node_id_leaf_1f_b(cpu); + assert (cpu->path.apic.node_id < CONFIG_MAX_SOCKET); + /* * Enable PWR_PERF_PLTFRM_OVR and PROCHOT_LOCK. * The value set by FSP is 20_005f, we set it to 1a_00a4_005b. -- To view, visit https://review.coreboot.org/c/coreboot/+/81515?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia3ed1e5923aa18ca7619b32cde491fdb4da0fa0d Gerrit-Change-Number: 81515 Gerrit-PatchSet: 6 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: include/efi: Introduce __efiapi for EFI calling convention flexibility
by Varshit Pandya (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Kapil Porwal, Nick Vaccaro, Ronak Kanabar, Subrata Banik. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81620?usp=email ) Change subject: include/efi: Introduce __efiapi for EFI calling convention flexibility ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81620?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I21660f8ebeed3b9ef060118928a940a470492bb8 Gerrit-Change-Number: 81620 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Wed, 03 Apr 2024 07:34:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brox:Correct verbtable value
by Poornima Tom (Code Review) 03 Apr '24

03 Apr '24

Poornima Tom has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81654?usp=email ) Change subject: mb/google/brox:Correct verbtable value ...................................................................... mb/google/brox:Correct verbtable value Corrected verbtable value for pinwidget 20 based on the updated verbtable received from Realtek. This fixes the headset detection failure, when runtime suspend is enabled BUG=b:330433089 BRANCH=None TEST=verified headset on Brox, under runtime suspend Change-Id: I71b7d59b3ab5310a0b6cdb31fb5033f94263d151 Signed-off-by: poornima tom <poornima.tom(a)intel.com> --- M src/mainboard/google/brox/hda_verb.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/81654/1 diff --git a/src/mainboard/google/brox/hda_verb.c b/src/mainboard/google/brox/hda_verb.c index bf998e1..a012ac4 100644 --- a/src/mainboard/google/brox/hda_verb.c +++ b/src/mainboard/google/brox/hda_verb.c @@ -107,9 +107,9 @@ * To set LDO1/LDO2 as default (used for headset) */ 0x02050008, - 0x02046A0C, + 0x0204EA0C, 0x02050008, - 0x02046A0C, + 0x0204EA0C, }; const u32 pc_beep_verbs[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/81654?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I71b7d59b3ab5310a0b6cdb31fb5033f94263d151 Gerrit-Change-Number: 81654 Gerrit-PatchSet: 1 Gerrit-Owner: Poornima Tom <poornima.tom(a)intel.com> Gerrit-MessageType: newchange

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coreboot-gerrit April 2024