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Change subject: soc/intel/xeon_sp: Compress FSP-S
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81634/comment/2252ddb2_3117ad55 :
PS1, Line 12: Test: Still boots on ibm/sbp1.
Are there boot time differences? (Probably small compared to server boot time.)
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Change subject: mb/google/brya: Add new baseboard trulo
......................................................................
mb/google/brya: Add new baseboard trulo
This patch adds a new baseboard trulo. This commit is a stub which
only adds the minimum code needed for a successful build.
TEST=abuild -a -x -p none -t google/brya
Change-Id: Iad6230064c6b8359698d37c3e0440614cc7b073d
Signed-off-by: Dinesh Gehlot <digehlot(a)google.com>
---
M src/mainboard/google/brya/Kconfig
A src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk
A src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb
A src/mainboard/google/brya/variants/baseboard/trulo/gpio.c
A src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h
A src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h
A src/mainboard/google/brya/variants/baseboard/trulo/memory.c
7 files changed, 131 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/81626/8
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Change subject: soc/intel/xeon_sp/spr: Drop microcode constraints
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Patch Set 2: Code-Review+1
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Change subject: soc/amd/genoa_poc: Fix DEBUG_SMI compilation error
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81072/comment/78bd0b07_43d9eab5 :
PS1, Line 7: Fix DEBUG_SMI compilation error
I’d make it more about the action.
https://review.coreboot.org/c/coreboot/+/81072/comment/f46af00c_cbc81832 :
PS1, Line 10: addressing and initialising the SoC-specific UART.
Therefore, add uart.c to …
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Change subject: mb/google/nissa/var/anraggar: Delay to deassert RST pin for TCHSCR
......................................................................
Patch Set 2:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81636/comment/2393982d_c216fa4e :
PS2, Line 8:
If I understand your change correctly, you are trying to introduce a delay in the rising of GPP_C1 and also configure GPP_C0 (enable pin to 1), if so I would reword the commit message to
====================================================
mb/google/nissa/var/anraggar: Configure touchscreen related GPIOs
GPP_C1 is connected to reset pin of touchscreen module, to comply with
specification of having a delay of at least 10ms for module to reset,
assert GPP_C1 in early_gpio_table and de-assert it in
override_gpio_table.
GPP_C0 is connected to enable pin of touchscreen module, configure it to
1 in override_gpio_table once the module is out of reset.
BUG=b:314744757
TEST=Build, Boot anraggar board and check touchscreen working
======================================================
Please ignore this comment if I have not understood the bug correctly
https://review.coreboot.org/c/coreboot/+/81636/comment/c1e0de02_21739b4b :
PS2, Line 9: touchscree
touchscreen
https://review.coreboot.org/c/coreboot/+/81636/comment/3efd17a9_42dbf13e :
PS2, Line 11: SPEC requirements.
It would be good if you could mention the spec which you are referring to and the version of that spec.
https://review.coreboot.org/c/coreboot/+/81636/comment/f49423db_f0e53379 :
PS2, Line 13: BUG=314744757
"BUG=b:314744757" ?
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Change subject: soc/amd/genoa_poc: Fix DEBUG_SMI compilation error
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Patch Set 1: Code-Review+2
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Hello Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/81626?usp=email
to look at the new patch set (#7).
Change subject: mb/google/brya: Add new baseboard trulo
......................................................................
mb/google/brya: Add new baseboard trulo
This patch adds a new baseboard trulo. This commit is a stub which
only adds the minimum code needed for a successful build.
TEST=abuild -a -x -p none -t google/brya
Change-Id: Iad6230064c6b8359698d37c3e0440614cc7b073d
Signed-off-by: Dinesh Gehlot <digehlot(a)google.com>
---
M src/mainboard/google/brya/Kconfig
A src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk
A src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb
A src/mainboard/google/brya/variants/baseboard/trulo/gpio.c
A src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h
A src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h
A src/mainboard/google/brya/variants/baseboard/trulo/memory.c
7 files changed, 123 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/81626/7
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