coreboot-gerrit April 2024

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[XS] Change in coreboot[main]: mb/google/brox: Enable SAGv
by Krishna P Bhat D (Code Review) 16 Apr '24

16 Apr '24

Attention is currently required from: Ashish Kumar Mishra, Paul Menzel, Shelley Chen. Krishna P Bhat D has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81556?usp=email ) Change subject: mb/google/brox: Enable SAGv ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81556?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I80c44e7df1d75732c6982b27e44ecd6060b1b3f1 Gerrit-Change-Number: 81556 Gerrit-PatchSet: 2 Gerrit-Owner: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 16 Apr 2024 14:59:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: arch/x86: Prevent .text/.init overlap with older linkers
by Subrata Banik (Code Review) 16 Apr '24

16 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Eric Lai, Jon Murphy, Jérémy Compostella, Kapil Porwal, Nick Vaccaro, Subrata Banik, Werner Zeh. Hello Angel Pons, Arthur Heymans, Eric Lai, Jon Murphy, Jérémy Compostella, Kapil Porwal, Nick Vaccaro, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81886?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: arch/x86: Prevent .text/.init overlap with older linkers ...................................................................... arch/x86: Prevent .text/.init overlap with older linkers Add Kconfig option `X86_BOOTBLOCK_EXTRA_PROGRAM_SZ` to reserve extra space, avoiding overlap between .text and .init sections when using older linkers (binutils 2.3x). Default is 1024 bytes (1 KiB) for ChromeOS, 0 otherwise. BUG=b:332445618 TEST=Built and booted google/rex (32-bit/64-bit). Change-Id: I019bf6896d84b2a84dff6f22323f0f446c0740b5 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/arch/x86/Kconfig M src/arch/x86/bootblock.ld 2 files changed, 12 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/81886/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/81886?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I019bf6896d84b2a84dff6f22323f0f446c0740b5 Gerrit-Change-Number: 81886 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: sb/intel/ibexpeak: Drop USB3 settings from devicetree
by Keith Hui (Code Review) 16 Apr '24

16 Apr '24

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81930?usp=email ) Change subject: sb/intel/ibexpeak: Drop USB3 settings from devicetree ...................................................................... sb/intel/ibexpeak: Drop USB3 settings from devicetree ibexpeak has no USB 3 capabilities. They were kept briefly when its devicetree structure was split from bd82x6x in commit ab4de83f4330 (sb/intel/ibexpeak: Sever bd82x6x source dependency) to verify correctness. With that done, they can go. Change-Id: I6b847e1532d2e84a7b408a8858c8613b322d0373 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/southbridge/intel/ibexpeak/chip.h 1 file changed, 0 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/81930/1 diff --git a/src/southbridge/intel/ibexpeak/chip.h b/src/southbridge/intel/ibexpeak/chip.h index aba27cc..dc97da3 100644 --- a/src/southbridge/intel/ibexpeak/chip.h +++ b/src/southbridge/intel/ibexpeak/chip.h @@ -68,12 +68,6 @@ bool pcie_hotplug_map[8]; - /* These USB3 fields, copied from bd82x6x, don't apply here, - * as Ibex Peak doesn't have USB3. */ - uint32_t xhci_switchable_ports; - uint32_t superspeed_capable_ports; - uint32_t xhci_overcurrent_mapping; - uint32_t spi_uvscc; uint32_t spi_lvscc; struct intel_swseq_spi_config spi; -- To view, visit https://review.coreboot.org/c/coreboot/+/81930?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6b847e1532d2e84a7b408a8858c8613b322d0373 Gerrit-Change-Number: 81930 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: arch/x86: Prevent .text/.init overlap with older linkers
by Subrata Banik (Code Review) 16 Apr '24

16 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Eric Lai, Jon Murphy, Jérémy Compostella, Kapil Porwal, Nick Vaccaro, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81886?usp=email ) Change subject: arch/x86: Prevent .text/.init overlap with older linkers ...................................................................... Patch Set 3: (1 comment) File src/arch/x86/Kconfig: https://review.coreboot.org/c/coreboot/+/81886/comment/9f57da6e_0980456a : PS2, Line 415: PROGRAM_SZ_EXTRA_SPACE > maybe a bit more specific: X86_BOOTBLOCK_EXTRA_PROGRAM_SZ ? Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/81886?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I019bf6896d84b2a84dff6f22323f0f446c0740b5 Gerrit-Change-Number: 81886 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Tue, 16 Apr 2024 14:00:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: arch/x86: Prevent .text/.init overlap with older linkers
by Subrata Banik (Code Review) 16 Apr '24

16 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Eric Lai, Jon Murphy, Jérémy Compostella, Kapil Porwal, Nick Vaccaro, Subrata Banik, Werner Zeh. Hello Angel Pons, Arthur Heymans, Eric Lai, Jon Murphy, Jérémy Compostella, Kapil Porwal, Nick Vaccaro, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81886?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Angel Pons, Code-Review+1 by Arthur Heymans, Code-Review+1 by Werner Zeh, Code-Review+2 by Eric Lai, Code-Review+2 by Kapil Porwal, Code-Review+2 by Nick Vaccaro, Verified+1 by build bot (Jenkins) Change subject: arch/x86: Prevent .text/.init overlap with older linkers ...................................................................... arch/x86: Prevent .text/.init overlap with older linkers Add Kconfig option `X86_BOOTBLOCK_EXTRA_PROGRAM_SZ` to reserve extra space, avoiding overlap between .text and .init sections when using older linkers (binutils 2.3x). Default is 1024 bytes (1 KiB) for ChromeOS, 0 otherwise. BUG=b:332445618 TEST=Built and booted google/rex (32-bit/64-bit). Change-Id: I019bf6896d84b2a84dff6f22323f0f446c0740b5 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/arch/x86/Kconfig M src/arch/x86/bootblock.ld 2 files changed, 12 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/81886/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/81886?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I019bf6896d84b2a84dff6f22323f0f446c0740b5 Gerrit-Change-Number: 81886 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: nb/intel/gm45: Fill in memory info
by Angel Pons (Code Review) 16 Apr '24

16 Apr '24

Attention is currently required from: Jean Lucas, Nicholas Chin, Nico Huber. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81861?usp=email ) Change subject: nb/intel/gm45: Fill in memory info ...................................................................... Patch Set 3: (1 comment) File src/northbridge/intel/gm45/raminit_meminfo.c: https://review.coreboot.org/c/coreboot/+/81861/comment/de3f4446_abf3af3d : PS1, Line 61: FOR_EACH_POPULATED_RANK > This is wrong, dual-rank DIMMs end up with two entries Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81861?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I92060ce05bdf0ca617a3383a2db1fdbd43df6fe4 Gerrit-Change-Number: 81861 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jean Lucas Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jean Lucas Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Tue, 16 Apr 2024 13:57:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: buildgcc: Match the string of downloading percentage more precisely
by Felix Singer (Code Review) 16 Apr '24

16 Apr '24

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/66743?usp=email ) Change subject: buildgcc: Match the string of downloading percentage more precisely ...................................................................... buildgcc: Match the string of downloading percentage more precisely The command "wget" prints some hyperlink with "%", which will be filtered in by previous regular expression. So we need to change to match the string with exactly 3 digits and a percent symbol. TEST: echo 45% | grep -o "\<[0-9]\{1,3\}%" 45% echo 1245% | grep -o "\<[0-9]\{1,3\}%" <empty> echo aa% | grep -o "\<[0-9]\{1,3\}%" <empty> Change-Id: I6ef9e7c87fd4ee6cc707346954d91e6e3af3b939 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66743 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> --- M util/crossgcc/buildgcc 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, but someone else must approve Felix Singer: Looks good to me, approved diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 0a0462e..5944b05 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -1076,7 +1076,7 @@ url=$1 printf "... ${red} 0%%" wget --tries=3 "$url" 2>&1 | while read -r line; do - echo "$line" | grep -o "[0-9]\+%" | awk '{printf("\b\b\b\b%4s", $1)}' + echo "$line" | grep -o "\<[0-9]\{1,3\}%" | awk '{printf("\b\b\b\b%4s", $1)}' done printf "${NC}... " } -- To view, visit https://review.coreboot.org/c/coreboot/+/66743?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6ef9e7c87fd4ee6cc707346954d91e6e3af3b939 Gerrit-Change-Number: 66743 Gerrit-PatchSet: 12 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: buildgcc: Match the string of downloading percentage more precisely
by Felix Singer (Code Review) 16 Apr '24

16 Apr '24

Attention is currently required from: Bao Zheng, Martin L Roth, Zheng Bao. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66743?usp=email ) Change subject: buildgcc: Match the string of downloading percentage more precisely ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/66743?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6ef9e7c87fd4ee6cc707346954d91e6e3af3b939 Gerrit-Change-Number: 66743 Gerrit-PatchSet: 11 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Tue, 16 Apr 2024 13:54:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: security/tpm: support compiling in multiple TPM drivers
by Felix Held (Code Review) 16 Apr '24

16 Apr '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69162?usp=email ) Change subject: security/tpm: support compiling in multiple TPM drivers ...................................................................... security/tpm: support compiling in multiple TPM drivers Starting from here CONFIG_TPM1 and CONFIG_TPM2 are no longer mutually exclusive. Change-Id: I44c5a1d825afe414c2f5c2c90f4cfe41ba9bef5f Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69162 Reviewed-by: Julius Werner <jwerner(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/crb/tis.c M src/drivers/crb/tpm.h M src/drivers/i2c/tpm/tis.c M src/drivers/i2c/tpm/tis_atmel.c M src/drivers/i2c/tpm/tpm.h M src/drivers/pc80/tpm/tis.c A src/drivers/pc80/tpm/tpm.h M src/drivers/spi/tpm/tis.c M src/drivers/spi/tpm/tpm.h M src/security/tpm/Kconfig M src/security/tpm/tis.h M src/security/tpm/tss/tss.c 12 files changed, 53 insertions(+), 28 deletions(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved diff --git a/src/drivers/crb/tis.c b/src/drivers/crb/tis.c index 1b398f7..3893917 100644 --- a/src/drivers/crb/tis.c +++ b/src/drivers/crb/tis.c @@ -46,7 +46,7 @@ return TPM_SUCCESS; } -tis_sendrecv_fn tis_probe(enum tpm_family *family) +tis_sendrecv_fn crb_tis_probe(enum tpm_family *family) { struct crb_tpm_info info; diff --git a/src/drivers/crb/tpm.h b/src/drivers/crb/tpm.h index fbe3901..aaf63a4 100644 --- a/src/drivers/crb/tpm.h +++ b/src/drivers/crb/tpm.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause */ /* This is a driver for a Command Response Buffer Interface */ +#include <security/tpm/tis.h> #include <security/tpm/tss_errors.h> /* CRB driver */ @@ -65,3 +66,5 @@ size_t crb_tpm_process_command(const void *tpm2_command, size_t command_size, void *tpm2_response, size_t max_response); bool crb_tpm_is_active(void); + +tis_sendrecv_fn crb_tis_probe(enum tpm_family *family); diff --git a/src/drivers/i2c/tpm/tis.c b/src/drivers/i2c/tpm/tis.c index fd09240..1fba61a 100644 --- a/src/drivers/i2c/tpm/tis.c +++ b/src/drivers/i2c/tpm/tis.c @@ -118,7 +118,7 @@ return TPM_SUCCESS; } -tis_sendrecv_fn tis_probe(enum tpm_family *family) +tis_sendrecv_fn i2c_tis_probe(enum tpm_family *family) { if (tpm_vendor_probe(CONFIG_DRIVER_TPM_I2C_BUS, CONFIG_DRIVER_TPM_I2C_ADDR, family)) return NULL; diff --git a/src/drivers/i2c/tpm/tis_atmel.c b/src/drivers/i2c/tpm/tis_atmel.c index a0bbf33..ad5e7f3 100644 --- a/src/drivers/i2c/tpm/tis_atmel.c +++ b/src/drivers/i2c/tpm/tis_atmel.c @@ -12,6 +12,8 @@ #include <timer.h> #include <types.h> +#include "tpm.h" + #define RECV_TIMEOUT (1 * 1000) /* 1 second */ #define XMIT_TIMEOUT (1 * 1000) /* 1 second */ #define SLEEP_DURATION 1000 /* microseconds */ @@ -107,7 +109,7 @@ return TPM_SUCCESS; } -tis_sendrecv_fn tis_probe(enum tpm_family *family) +tis_sendrecv_fn i2c_tis_probe(enum tpm_family *family) { /* * Can't query version or really anything as the device doesn't support diff --git a/src/drivers/i2c/tpm/tpm.h b/src/drivers/i2c/tpm/tpm.h index 46935e24..ba78a42 100644 --- a/src/drivers/i2c/tpm/tpm.h +++ b/src/drivers/i2c/tpm/tpm.h @@ -56,4 +56,6 @@ tpm_result_t tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr); +tis_sendrecv_fn i2c_tis_probe(enum tpm_family *family); + #endif /* __DRIVERS_TPM_SLB9635_I2C_TPM_H__ */ diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c index 568065c6..f922714 100644 --- a/src/drivers/pc80/tpm/tis.c +++ b/src/drivers/pc80/tpm/tis.c @@ -24,7 +24,9 @@ #include <device/pnp.h> #include <drivers/tpm/tpm_ppi.h> #include <timer.h> + #include "chip.h" +#include "tpm.h" #define PREFIX "lpc_tpm: " @@ -374,7 +376,7 @@ * Returns TPM_SUCCESS on success (the device is found or was found during * an earlier invocation) or TPM_CB_FAIL if the device is not found. */ -static tpm_result_t pc80_tis_probe(enum tpm_family *family) +static tpm_result_t pc80_tpm_probe(enum tpm_family *family) { static enum tpm_family tpm_family; @@ -718,7 +720,7 @@ } /* - * tis_probe() + * pc80_tis_probe() * * Probe for the TPM device and set it up for use within locality 0. * @@ -726,9 +728,9 @@ * * Returns pointer to send-receive function on success or NULL on failure. */ -tis_sendrecv_fn tis_probe(enum tpm_family *family) +tis_sendrecv_fn pc80_tis_probe(enum tpm_family *family) { - if (pc80_tis_probe(family)) + if (pc80_tpm_probe(family)) return NULL; if (pc80_tis_open()) diff --git a/src/drivers/pc80/tpm/tpm.h b/src/drivers/pc80/tpm/tpm.h new file mode 100644 index 0000000..db71e03 --- /dev/null +++ b/src/drivers/pc80/tpm/tpm.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef DRIVERS_PC80_TPM_TPM_H +#define DRIVERS_PC80_TPM_TPM_H + +#include <security/tpm/tis.h> + +tis_sendrecv_fn pc80_tis_probe(enum tpm_family *family); + +#endif /* DRIVERS_PC80_TPM_TPM_H */ diff --git a/src/drivers/spi/tpm/tis.c b/src/drivers/spi/tpm/tis.c index 89ea985..b954a12 100644 --- a/src/drivers/spi/tpm/tis.c +++ b/src/drivers/spi/tpm/tis.c @@ -40,7 +40,7 @@ return TPM_SUCCESS; } -tis_sendrecv_fn tis_probe(enum tpm_family *family) +tis_sendrecv_fn spi_tis_probe(enum tpm_family *family) { struct spi_slave spi; struct tpm2_info info; diff --git a/src/drivers/spi/tpm/tpm.h b/src/drivers/spi/tpm/tpm.h index 0d238e8..d6e0e74 100644 --- a/src/drivers/spi/tpm/tpm.h +++ b/src/drivers/spi/tpm/tpm.h @@ -4,6 +4,7 @@ #define __COREBOOT_SRC_DRIVERS_SPI_TPM_TPM_H #include <drivers/tpm/cr50.h> +#include <security/tpm/tis.h> #include <security/tpm/tss_errors.h> #include <stddef.h> #include <spi-generic.h> @@ -44,4 +45,6 @@ /* Get information about previously initialized TPM device. */ void tpm2_get_info(struct tpm2_info *info); +tis_sendrecv_fn spi_tis_probe(enum tpm_family *family); + #endif /* ! __COREBOOT_SRC_DRIVERS_SPI_TPM_TPM_H */ diff --git a/src/security/tpm/Kconfig b/src/security/tpm/Kconfig index 5eb5837..ea13fa4 100644 --- a/src/security/tpm/Kconfig +++ b/src/security/tpm/Kconfig @@ -4,14 +4,9 @@ menu "Trusted Platform Module" -choice - prompt "Trusted Platform Module" - default TPM2 if MAINBOARD_HAS_TPM2 - default TPM1 if MAINBOARD_HAS_TPM1 - default NO_TPM - config NO_TPM - bool "No TPM" + bool + default y if !TPM1 && !TPM2 help No TPM support. Select this option if your system doesn't have a TPM, or if you don't want coreboot to communicate with your TPM in any way. @@ -21,19 +16,17 @@ config TPM1 bool "TPM 1.2" depends on I2C_TPM || MEMORY_MAPPED_TPM || SPI_TPM || CRB_TPM - depends on !MAINBOARD_HAS_TPM2 + default y if MAINBOARD_HAS_TPM1 help Select this option if your TPM uses the older TPM 1.2 protocol. config TPM2 bool "TPM 2.0" depends on I2C_TPM || MEMORY_MAPPED_TPM || SPI_TPM || CRB_TPM - depends on !MAINBOARD_HAS_TPM1 + default y if MAINBOARD_HAS_TPM2 help Select this option if your TPM uses the newer TPM 2.0 protocol. -endchoice - config TPM bool default y @@ -52,7 +45,7 @@ always uses the 2.0 protocol, and that it should be on by default. config TPM_DEACTIVATE - bool "Deactivate TPM" + bool "Deactivate TPM (for TPM1)" default n depends on !VBOOT depends on TPM1 @@ -106,13 +99,13 @@ Custom coreboot-specific format of the log derived from TPM1 log format. config TPM_LOG_TPM1 bool "TPM 1.2 format" - depends on TPM1 + depends on TPM1 && !TPM2 help Log per TPM 1.2 specification. See "TCG PC Client Specific Implementation Specification for Conventional BIOS". config TPM_LOG_TPM2 bool "TPM 2.0 format" - depends on TPM2 + depends on TPM1 || TPM2 help Log per TPM 2.0 specification. See "TCG PC Client Platform Firmware Profile Specification". diff --git a/src/security/tpm/tis.h b/src/security/tpm/tis.h index 4a8dc14..67ba911 100644 --- a/src/security/tpm/tis.h +++ b/src/security/tpm/tis.h @@ -54,8 +54,6 @@ size_t *recv_len); /* - * tis_probe() - * * Probe for the TPM device and set it up for use within locality 0. * * @family - pointer which is set to TPM family of the device @@ -65,7 +63,7 @@ * Do not call this explicitly, it's meant to be used exclusively by TSS * implementation (tlcl_lib_init() function to be specific). */ -tis_sendrecv_fn tis_probe(enum tpm_family *family); +typedef tis_sendrecv_fn (*tis_probe_fn)(enum tpm_family *family); /* * tis_vendor_write() diff --git a/src/security/tpm/tss/tss.c b/src/security/tpm/tss/tss.c index bd0e985..8e52de7 100644 --- a/src/security/tpm/tss/tss.c +++ b/src/security/tpm/tss/tss.c @@ -1,6 +1,10 @@ /* SPDX-License-Identifier: BSD-3-Clause */ #include <console/console.h> +#include <drivers/crb/tpm.h> +#include <drivers/i2c/tpm/tpm.h> +#include <drivers/pc80/tpm/tpm.h> +#include <drivers/spi/tpm/tpm.h> #include <security/tpm/tis.h> #include <security/tpm/tss.h> @@ -24,13 +28,21 @@ /* Set right away to make recursion impossible. */ init_done = true; - tlcl_tis_sendrecv = tis_probe(&tlcl_tpm_family); + tlcl_tis_sendrecv = NULL; + if (CONFIG(CRB_TPM)) + tlcl_tis_sendrecv = crb_tis_probe(&tlcl_tpm_family); + if (CONFIG(MEMORY_MAPPED_TPM) && tlcl_tis_sendrecv == NULL) + tlcl_tis_sendrecv = pc80_tis_probe(&tlcl_tpm_family); + if (CONFIG(I2C_TPM) && tlcl_tis_sendrecv == NULL) + tlcl_tis_sendrecv = i2c_tis_probe(&tlcl_tpm_family); + if (CONFIG(SPI_TPM) && tlcl_tis_sendrecv == NULL) + tlcl_tis_sendrecv = spi_tis_probe(&tlcl_tpm_family); if (tlcl_tis_sendrecv == NULL) { - printk(BIOS_ERR, "%s: tis_probe failed\n", __func__); + printk(BIOS_ERR, "%s: TIS probe failed\n", __func__); tlcl_tpm_family = TPM_UNKNOWN; } else if (tlcl_tpm_family != TPM_1 && tlcl_tpm_family != TPM_2) { - printk(BIOS_ERR, "%s: tis_probe returned incorrect TPM family: %d\n", __func__, + printk(BIOS_ERR, "%s: TIS probe returned incorrect TPM family: %d\n", __func__, tlcl_tpm_family); tlcl_tpm_family = TPM_UNKNOWN; } -- To view, visit https://review.coreboot.org/c/coreboot/+/69162?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I44c5a1d825afe414c2f5c2c90f4cfe41ba9bef5f Gerrit-Change-Number: 69162 Gerrit-PatchSet: 41 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: mb/google/zork: Enable eMMC driver for edk2 payload
by Felix Held (Code Review) 16 Apr '24

16 Apr '24

Attention is currently required from: Jason Nien, Martin Roth, Matt DeVillier. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81893?usp=email ) Change subject: mb/google/zork: Enable eMMC driver for edk2 payload ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81893?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib7e98f309594554dbcf1ddd875d47c89bd9e0e44 Gerrit-Change-Number: 81893 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Tue, 16 Apr 2024 13:39:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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