coreboot-gerrit March 2024

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[XS] Change in coreboot[main]: drivers/mipi: Fine tune clock for BOE_NV110WUM_L60 and IVO_T109NW41
by Ruihai Zhou (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Yidi Lin, cong yang. Ruihai Zhou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81438?usp=email ) Change subject: drivers/mipi: Fine tune clock for BOE_NV110WUM_L60 and IVO_T109NW41 ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/81438/comment/454b07a4_e3414e05 : PS3, Line 10: > Maybe should add frame rate? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81438?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic44c86f062d4e836f403ee97f2fc6370fff02797 Gerrit-Change-Number: 81438 Gerrit-PatchSet: 4 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 26 Mar 2024 07:42:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: drivers/mipi: Fine tune clock for BOE_NV110WUM_L60 and IVO_T109NW41
by Ruihai Zhou (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Ruihai Zhou. Hello build bot (Jenkins), cong yang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81438?usp=email to look at the new patch set (#4). Change subject: drivers/mipi: Fine tune clock for BOE_NV110WUM_L60 and IVO_T109NW41 ...................................................................... drivers/mipi: Fine tune clock for BOE_NV110WUM_L60 and IVO_T109NW41 Fine tune the panel clock to prevent mipi noise from affecting wifi band. After tuning, the panel refresh rate keeps at 60Hz and wifi test passed. Just keep consistent with the Linux kernel panel driver configuration. BUG=b:330807136 TEST=fw screen display normally Signed-off-by: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Change-Id: Ic44c86f062d4e836f403ee97f2fc6370fff02797 --- M src/drivers/mipi/panel-BOE_NV110WUM_L60.c M src/drivers/mipi/panel-IVO_T109NW41.c 2 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/81438/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/81438?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic44c86f062d4e836f403ee97f2fc6370fff02797 Gerrit-Change-Number: 81438 Gerrit-PatchSet: 4 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: mb/google/nissa: Create sundance variant
by Leo Chou (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Shou-Chieh Hsu, Subrata Banik. Leo Chou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81347?usp=email ) Change subject: mb/google/nissa: Create sundance variant ...................................................................... Patch Set 9: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/81347/comment/99fe9905_51fe3983 : PS7, Line 2: leo.chou > Please use Leo Chou. […] Done https://review.coreboot.org/c/coreboot/+/81347/comment/080af067_537b3563 : PS7, Line 12: in : inside > What do you mean? The 'repo' has been removed from the inside SDK -- To view, visit https://review.coreboot.org/c/coreboot/+/81347?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8ba318f18d2cac69898687311631778e61bf2ea Gerrit-Change-Number: 81347 Gerrit-PatchSet: 9 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Tue, 26 Mar 2024 07:29:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: drivers/mipi: Fine tune clock for BOE_NV110WUM_L60 and IVO_T109NW41
by cong yang (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Ruihai Zhou. cong yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81438?usp=email ) Change subject: drivers/mipi: Fine tune clock for BOE_NV110WUM_L60 and IVO_T109NW41 ...................................................................... Patch Set 3: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/81438/comment/7f1035d5_baae8737 : PS3, Line 10: Maybe should add frame rate? -- To view, visit https://review.coreboot.org/c/coreboot/+/81438?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic44c86f062d4e836f403ee97f2fc6370fff02797 Gerrit-Change-Number: 81438 Gerrit-PatchSet: 3 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Tue, 26 Mar 2024 07:23:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/nissa: Create sundance variant
by Leo Chou (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Leo Chou, Nick Vaccaro, Shou-Chieh Hsu, Subrata Banik. Hello Derek Huang, Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Shou-Chieh Hsu, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81347?usp=email to look at the new patch set (#8). Change subject: mb/google/nissa: Create sundance variant ...................................................................... mb/google/nissa: Create sundance variant Create the sundance variant of nissa reference board by copying the template files to a new directory named for the variant. Due to new_variant.py limitation that repo can no longer be used in inside, created this CL manually following google suggestion. BUG=b:328505938 Change-Id: Ia8ba318f18d2cac69898687311631778e61bf2ea Signed-off-by: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/variants/sundance/include/variant/ec.h A src/mainboard/google/brya/variants/sundance/include/variant/gpio.h A src/mainboard/google/brya/variants/sundance/memory/Makefile.mk A src/mainboard/google/brya/variants/sundance/memory/dram_id.generated.txt A src/mainboard/google/brya/variants/sundance/memory/mem_parts_used.txt A src/mainboard/google/brya/variants/sundance/overridetree.cb 8 files changed, 47 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/81347/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/81347?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8ba318f18d2cac69898687311631778e61bf2ea Gerrit-Change-Number: 81347 Gerrit-PatchSet: 8 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: drivers/mipi: Fine tune clock for BOE_NV110WUM_L60 and IVO_T109NW41
by Ruihai Zhou (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: cong yang. Ruihai Zhou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81438?usp=email ) Change subject: drivers/mipi: Fine tune clock for BOE_NV110WUM_L60 and IVO_T109NW41 ...................................................................... Patch Set 3: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/81438?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic44c86f062d4e836f403ee97f2fc6370fff02797 Gerrit-Change-Number: 81438 Gerrit-PatchSet: 3 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Tue, 26 Mar 2024 07:16:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: cpu/x86/topology: Add node ID parser
by Shuo Liu (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Chen, Gang C, Christian Walter, Johnny Lin, Jonathan Zhang, Jérémy Compostella, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81515?usp=email ) Change subject: cpu/x86/topology: Add node ID parser ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: We have a patch set that is solving similar problem, https://review.coreboot.org/c/coreboot/+/81439/ https://review.coreboot.org/c/coreboot/+/81440/ But I think we can have all. -- To view, visit https://review.coreboot.org/c/coreboot/+/81515?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia3ed1e5923aa18ca7619b32cde491fdb4da0fa0d Gerrit-Change-Number: 81515 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 26 Mar 2024 07:10:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/corsola: Add new board 'Kyogre'
by Kei Hiroyoshi (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Hung-Te Lin, Kei Hiroyoshi, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81218?usp=email to look at the new patch set (#5). Change subject: mb/google/corsola: Add new board 'Kyogre' ...................................................................... mb/google/corsola: Add new board 'Kyogre' Add a new Kingler follower 'Kyogre'. BUG=b:318614302 TEST= (chroot) setup_board --board=corsola --profile=kyogre (chroot) cros_workon --board corsola start chromeos-config-bsp chromeos-config-bsp-private chromeos-config coreboot-private-files-board coreboot depthcharge chromeos-zephyr chromeos-bootimage (chroot) emerge-corsola chromeos-config coreboot depthcharge chromeos-zephyr chromeos-bootimage Signed-off-by: Kei Hiroyoshi <hiroyoshi.kei(a)fujitsu.corp-partner.google.com> Change-Id: Iae3857a9f8edadcc2eee3500fda2e76c0334221c --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/Kconfig.name 2 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/81218/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/81218?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iae3857a9f8edadcc2eee3500fda2e76c0334221c Gerrit-Change-Number: 81218 Gerrit-PatchSet: 5 Gerrit-Owner: Kei Hiroyoshi <hiroyoshi.kei(a)fujitsu.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kenny Pan <kennypan(a)google.com> Gerrit-CC: Knox Chiou <knoxchiou(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Kei Hiroyoshi <hiroyoshi.kei(a)fujitsu.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: cpu/x86/topology: Add node ID parser
by Shuo Liu (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Chen, Gang C, Christian Walter, Johnny Lin, Jonathan Zhang, Jérémy Compostella, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81515?usp=email ) Change subject: cpu/x86/topology: Add node ID parser ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81515?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia3ed1e5923aa18ca7619b32cde491fdb4da0fa0d Gerrit-Change-Number: 81515 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 26 Mar 2024 07:09:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Add device to proximity domain map utils
by Shuo Liu (Code Review) 26 Mar '24

26 Mar '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu, Ziang Wang. Hello Chen, Gang C, Ziang Wang, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/81440?usp=email to review the following change. Change subject: soc/intel/xeon_sp: Add device to proximity domain map utils ...................................................................... soc/intel/xeon_sp: Add device to proximity domain map utils In NUMA architecture, all devices (cpu, memory and PCI device) belong to specific proximity domain. Add utils to map device instance to their proximity domain. Please note that, proximity domain ID is the index assigned at the creation of proximity domains. There is no hard relationship between proximity domain ID and the device identities. Change-Id: Icd14a98823491ccfc38473e44a26dddfbbcaa7c0 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Signed-off-by: Ziang Wang <ziang.wang(a)intel.com> Signed-off-by: Gang Chen <gang.c.chen(a)intel.com> --- M src/soc/intel/xeon_sp/include/soc/numa.h M src/soc/intel/xeon_sp/numa.c M src/soc/intel/xeon_sp/spr/soc_acpi.c M src/soc/intel/xeon_sp/uncore_acpi.c 4 files changed, 43 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/81440/1 diff --git a/src/soc/intel/xeon_sp/include/soc/numa.h b/src/soc/intel/xeon_sp/include/soc/numa.h index aba3f09..929b61c 100644 --- a/src/soc/intel/xeon_sp/include/soc/numa.h +++ b/src/soc/intel/xeon_sp/include/soc/numa.h @@ -7,6 +7,7 @@ #ifndef NUMA_H #define NUMA_H +#include <soc/soc_util.h> #include <types.h> enum proximity_domain_type { @@ -16,6 +17,7 @@ * Generic Initiator domain is a CXL memory device. */ PD_TYPE_GENERIC_INITIATOR, + PD_TYPE_MAX }; /* @@ -62,4 +64,7 @@ */ uint32_t get_generic_initiator_mem_size(void); +uint32_t memory_to_pd(const struct SystemMemoryMapElement *mem); +uint32_t device_to_pd(const struct device *dev); + #endif /* NUMA_H */ diff --git a/src/soc/intel/xeon_sp/numa.c b/src/soc/intel/xeon_sp/numa.c index 0186865..930237f 100644 --- a/src/soc/intel/xeon_sp/numa.c +++ b/src/soc/intel/xeon_sp/numa.c @@ -5,6 +5,7 @@ #include <device/pci_ops.h> #include <device/pci.h> #include <device/pciexp.h> +#include <soc/chip_common.h> #include <soc/numa.h> #include <soc/soc_util.h> #include <soc/util.h> @@ -117,3 +118,31 @@ return size; } + +static uint32_t socket_to_pd(uint8_t socket) +{ + for (uint8_t i = 0; i < pds.num_pds; i++) { + if (pds.pds[i].pd_type != PD_TYPE_PROCESSOR) + continue; + if (pds.pds[i].socket_bitmap == (1 << socket)) + return i; + } + return PD_TYPE_MAX; +} + +uint32_t device_to_pd(const struct device *dev) +{ + if (dev->path.type == DEVICE_PATH_APIC) + return socket_to_pd(dev->path.apic.package_id); + + if ((dev->path.type == DEVICE_PATH_DOMAIN) || + (dev->path.type == DEVICE_PATH_PCI)) + return socket_to_pd(iio_pci_domain_socket_from_dev(dev)); + + return PD_TYPE_MAX; +} + +uint32_t memory_to_pd(const struct SystemMemoryMapElement *mem) +{ + return socket_to_pd(mem->SocketId); +} diff --git a/src/soc/intel/xeon_sp/spr/soc_acpi.c b/src/soc/intel/xeon_sp/spr/soc_acpi.c index aa9bb18..33f9914 100644 --- a/src/soc/intel/xeon_sp/spr/soc_acpi.c +++ b/src/soc/intel/xeon_sp/spr/soc_acpi.c @@ -15,6 +15,7 @@ #include <soc/acpi.h> #include <soc/chip_common.h> #include <soc/iomap.h> +#include <soc/numa.h> #include <soc/msr.h> #include <soc/pci_devs.h> #include <soc/pm.h> @@ -265,7 +266,7 @@ acpigen_write_scope(acpi_device_path(domain)); acpigen_write_name("_PXM"); - acpigen_write_integer(iio_pci_domain_socket_from_dev(domain)); + acpigen_write_integer(device_to_pd(domain)); acpigen_write_method("_PRT", 0); /* \_SB.AR0X are defined in uncore_irq.asl */ diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c index 17c25a5..27830a8 100644 --- a/src/soc/intel/xeon_sp/uncore_acpi.c +++ b/src/soc/intel/xeon_sp/uncore_acpi.c @@ -60,16 +60,16 @@ if (is_x2apic_mode()) { printk(BIOS_DEBUG, "SRAT: x2apic cpu_index=%04x, node_id=%02x, apic_id=%08x\n", - i, cpu->path.apic.node_id, cpu->path.apic.apic_id); + i, device_to_pd(cpu), cpu->path.apic.apic_id); current += acpi_create_srat_x2apic((acpi_srat_x2apic_t *)current, - cpu->path.apic.node_id, cpu->path.apic.apic_id); + device_to_pd(cpu), cpu->path.apic.apic_id); } else { printk(BIOS_DEBUG, "SRAT: lapic cpu_index=%02x, node_id=%02x, apic_id=%02x\n", - i, cpu->path.apic.node_id, cpu->path.apic.apic_id); + i, device_to_pd(cpu), cpu->path.apic.apic_id); current += acpi_create_srat_lapic((acpi_srat_lapic_t *)current, - cpu->path.apic.node_id, cpu->path.apic.apic_id); + device_to_pd(cpu), cpu->path.apic.apic_id); } } return current; @@ -129,7 +129,7 @@ srat_mem[mmap_index].base_address_high = (uint32_t)(addr >> 32); srat_mem[mmap_index].length_low = (uint32_t)(size & 0xffffffff); srat_mem[mmap_index].length_high = (uint32_t)(size >> 32); - srat_mem[mmap_index].proximity_domain = mem_element->SocketId; + srat_mem[mmap_index].proximity_domain = memory_to_pd(mem_element); srat_mem[mmap_index].flags = ACPI_SRAT_MEMORY_ENABLED; if (is_memtype_non_volatile(mem_element->Type)) srat_mem[mmap_index].flags |= ACPI_SRAT_MEMORY_NONVOLATILE; @@ -445,7 +445,6 @@ { struct device *dev = NULL; struct resource *resource; - int socket; while ((dev = dev_find_device(PCI_VID_INTEL, MMAP_VTD_CFG_REG_DEVID, dev))) { /* See if there is a resource with the appropriate index. */ @@ -453,11 +452,9 @@ if (!resource) continue; - socket = iio_pci_domain_socket_from_dev(dev); - printk(BIOS_DEBUG, "[Remapping Hardware Static Affinity] Base Address: %p, " - "Proximity Domain: 0x%x\n", res2mmio(resource, 0, 0), socket); - current += acpi_create_dmar_rhsa(current, (uintptr_t)res2mmio(resource, 0, 0), socket); + "Proximity Domain: 0x%x\n", res2mmio(resource, 0, 0), device_to_pd(dev)); + current += acpi_create_dmar_rhsa(current, (uintptr_t)res2mmio(resource, 0, 0), device_to_pd(dev)); } return current; -- To view, visit https://review.coreboot.org/c/coreboot/+/81440?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icd14a98823491ccfc38473e44a26dddfbbcaa7c0 Gerrit-Change-Number: 81440 Gerrit-PatchSet: 1 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newchange

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coreboot-gerrit March 2024