Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/70175?usp=email )
Change subject: lib/lzmadecode: Allow for 8 byte reads on 64bit
......................................................................
lib/lzmadecode: Allow for 8 byte reads on 64bit
This adds an optimization to lzma decode to also read from the boot
medium in chunks of 8 bytes if that is the general purpose register
length instead of always 4 bytes. It depends on the cache / memory / spi
controller whether this is faster, but it's likely to be either the same
or faster.
TESTED
- google/vilboz: cached boot medium
64bit before - 32bit - 64bit after
load FSP-M: 35,674 - 35,595 - 34,690
load ramstage: 42,134 - 43,378 - 40,882
load FSP-S: 24,954 - 25,496 - 24,368
- foxconn/g41m: uncached boot medium for testing
64bit before - 32bit - 64bit after
load ramstage: 51,164 - 51,872 - 51,894
Change-Id: I890c075307c0aec877618d9902ea352ae42a3bfa
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70175
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com>
Reviewed-by: Julius Werner <jwerner(a)chromium.org>
---
M src/lib/lzmadecode.c
M src/lib/lzmadecode.h
2 files changed, 12 insertions(+), 10 deletions(-)
Approvals:
Lean Sheng Tan: Looks good to me, but someone else must approve
build bot (Jenkins): Verified
Julius Werner: Looks good to me, approved
diff --git a/src/lib/lzmadecode.c b/src/lib/lzmadecode.c
index cb86829..5c6baa4 100644
--- a/src/lib/lzmadecode.c
+++ b/src/lib/lzmadecode.c
@@ -35,15 +35,15 @@
#define kBitModelTotal (1 << kNumBitModelTotalBits)
#define kNumMoveBits 5
-/* Use 32-bit reads whenever possible to avoid bad flash performance. Fall back
- * to byte reads for last 4 bytes since RC_TEST returns an error when BufferLim
+/* Use sizeof(SizeT) sized reads whenever possible to avoid bad flash performance. Fall back
+ * to byte reads for last sizeof(SizeT) bytes since RC_TEST returns an error when BufferLim
* is *reached* (not surpassed!), meaning we can't allow that to happen while
* there are still bytes to decode from the algorithm's point of view. */
#define RC_READ_BYTE \
- (look_ahead_ptr < 4 ? look_ahead.raw[look_ahead_ptr++] \
- : ((((uintptr_t) Buffer & 3) \
- || ((SizeT) (BufferLim - Buffer) <= 4)) ? (*Buffer++) \
- : ((look_ahead.dw = *(UInt32 *)Buffer), (Buffer += 4), \
+ (look_ahead_ptr < sizeof(SizeT) ? look_ahead.raw[look_ahead_ptr++] \
+ : ((((uintptr_t) Buffer & (sizeof(SizeT) - 1)) \
+ || ((SizeT) (BufferLim - Buffer) <= sizeof(SizeT))) ? (*Buffer++) \
+ : ((look_ahead.dw = *(SizeT *)Buffer), (Buffer += sizeof(SizeT)), \
(look_ahead_ptr = 1), look_ahead.raw[0])))
#define RC_INIT2 Code = 0; Range = 0xFFFFFFFF; \
@@ -207,10 +207,10 @@
int len = 0;
const Byte *Buffer;
const Byte *BufferLim;
- int look_ahead_ptr = 4;
+ int look_ahead_ptr = sizeof(SizeT);
union {
- Byte raw[4];
- UInt32 dw;
+ Byte raw[sizeof(SizeT)];
+ SizeT dw;
} look_ahead;
UInt32 Range;
UInt32 Code;
diff --git a/src/lib/lzmadecode.h b/src/lib/lzmadecode.h
index 9ed352a..5498061 100644
--- a/src/lib/lzmadecode.h
+++ b/src/lib/lzmadecode.h
@@ -22,10 +22,12 @@
#ifndef __LZMADECODE_H
#define __LZMADECODE_H
+#include <types.h>
+
typedef unsigned char Byte;
typedef unsigned short UInt16;
typedef unsigned int UInt32;
-typedef UInt32 SizeT;
+typedef size_t SizeT;
#define CProb UInt16
--
To view, visit https://review.coreboot.org/c/coreboot/+/70175?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I890c075307c0aec877618d9902ea352ae42a3bfa
Gerrit-Change-Number: 70175
Gerrit-PatchSet: 6
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-MessageType: merged
Attention is currently required from: Balázs Vinarz, Vlado Ilic.
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79838?usp=email )
Change subject: util/scripts/restore_agesa.sh - restores the opensource AMD AGESA boards
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS6:
> Sorry for the confusion, i have Athlon X4 750K (Trinity) and Athlon X4 845 (Carrizo), both normal CP […]
Vlado, thank you for your kind help offer: to be able to use coreboot, you need to get either A10-6700 or A10-6800K and install it into your A88XM-E ; luckily, these CPUs are dirt cheap nowadays (I'd suggest going with A10-6700 since it is 1.5x times cooler and almost the same)
--
To view, visit https://review.coreboot.org/c/coreboot/+/79838?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ia97e80ffaad9459e54ff5cb01f20d9129241433c
Gerrit-Change-Number: 79838
Gerrit-PatchSet: 6
Gerrit-Owner: Mike Banon <mikebdp2(a)gmail.com>
Gerrit-Reviewer: Balázs Vinarz <vinibali1(a)gmail.com>
Gerrit-Reviewer: Mike Banon <mikebdp2(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Alexander Goncharov <chat(a)joursoir.net>
Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-CC: Vlado Ilic <kakonema(a)gmail.com>
Gerrit-CC: awokd(a)danwin1210.me
Gerrit-Attention: Balázs Vinarz <vinibali1(a)gmail.com>
Gerrit-Attention: Vlado Ilic <kakonema(a)gmail.com>
Gerrit-Comment-Date: Wed, 21 Feb 2024 15:53:16 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Vlado Ilic <kakonema(a)gmail.com>
Gerrit-MessageType: comment
Attention is currently required from: Alexander Couzens, Arthur Heymans, Krystian Hebel, Maciej Pijanowski, Michał Kopeć, Michał Żygowski, Nicholas Sudsgaard, Paul Menzel.
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80610?usp=email )
Change subject: mb/lenovo: Add ThinkCentre M700/M900 Tiny board (Skylake/Kaby Lake)
......................................................................
Patch Set 7: Code-Review+2
(3 comments)
Patchset:
PS7:
Looks good! 😊
File src/mainboard/lenovo/m900_tiny/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/80610/comment/f404f7a5_9b1c73df :
PS7, Line 4: register "s0ix_enable" = "0"
Another one set to 0 ;)
https://review.coreboot.org/c/coreboot/+/80610/comment/16878b3e_636b0be5 :
PS7, Line 192: #register "gen4_dec" = "0x000c0081"
Are these supposed to be commented out?
--
To view, visit https://review.coreboot.org/c/coreboot/+/80610?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I6786e068ec03c8bf243e1767cd7b9d50512ea77f
Gerrit-Change-Number: 80610
Gerrit-PatchSet: 7
Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com>
Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com>
Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com>
Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com>
Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com>
Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-Comment-Date: Wed, 21 Feb 2024 14:55:30 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80637?usp=email )
Change subject: mb/google/brya/var/xol: Add support memory parts
......................................................................
mb/google/brya/var/xol: Add support memory parts
Add support memory parts for Xol.
- Samsung K3KL6L60GM-MGCT
- Samsung K3KL8L80CM-MGCT
BUG=b:319506033
BRANCH=firmware-brya-14505.B
TEST=FW_NAME=xol emerge-brya coreboot chromeos-bootimage
Proto board can boot to ChromeOS.
Change-Id: Ic6a36e40f0f93109f296c5cc67a368ace81bd217
Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80637
Reviewed-by: Eric Lai <ericllai(a)google.com>
Reviewed-by: Kapil Porwal <kapilporwal(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Subrata Banik <subratabanik(a)google.com>
---
D src/mainboard/google/brya/variants/xol/memory/Makefile.inc
A src/mainboard/google/brya/variants/xol/memory/Makefile.mk
M src/mainboard/google/brya/variants/xol/memory/dram_id.generated.txt
M src/mainboard/google/brya/variants/xol/memory/mem_parts_used.txt
4 files changed, 17 insertions(+), 5 deletions(-)
Approvals:
Subrata Banik: Looks good to me, approved
Kapil Porwal: Looks good to me, approved
build bot (Jenkins): Verified
Eric Lai: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/xol/memory/Makefile.inc b/src/mainboard/google/brya/variants/xol/memory/Makefile.inc
deleted file mode 100644
index eace2e4..0000000
--- a/src/mainboard/google/brya/variants/xol/memory/Makefile.inc
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-# This is an auto-generated file. Do not edit!!
-# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
-
-SPD_SOURCES = placeholder
diff --git a/src/mainboard/google/brya/variants/xol/memory/Makefile.mk b/src/mainboard/google/brya/variants/xol/memory/Makefile.mk
new file mode 100644
index 0000000..f07fb67
--- /dev/null
+++ b/src/mainboard/google/brya/variants/xol/memory/Makefile.mk
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# This is an auto-generated file. Do not edit!!
+# Generated by:
+# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/xol/memory/ src/mainboard/google/brya/variants/xol/memory/mem_parts_used.txt
+
+SPD_SOURCES =
+SPD_SOURCES += spd/lp5/set-0/spd-9.hex # ID = 0(0b0000) Parts = K3KL6L60GM-MGCT
+SPD_SOURCES += spd/lp5/set-0/spd-7.hex # ID = 1(0b0001) Parts = K3KL8L80CM-MGCT
diff --git a/src/mainboard/google/brya/variants/xol/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/xol/memory/dram_id.generated.txt
index fa24790..e36906a 100644
--- a/src/mainboard/google/brya/variants/xol/memory/dram_id.generated.txt
+++ b/src/mainboard/google/brya/variants/xol/memory/dram_id.generated.txt
@@ -1 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# This is an auto-generated file. Do not edit!!
+# Generated by:
+# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/xol/memory/ src/mainboard/google/brya/variants/xol/memory/mem_parts_used.txt
+
DRAM Part Name ID to assign
+K3KL6L60GM-MGCT 0 (0000)
+K3KL8L80CM-MGCT 1 (0001)
diff --git a/src/mainboard/google/brya/variants/xol/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/xol/memory/mem_parts_used.txt
index 9621137..b5773cc 100644
--- a/src/mainboard/google/brya/variants/xol/memory/mem_parts_used.txt
+++ b/src/mainboard/google/brya/variants/xol/memory/mem_parts_used.txt
@@ -9,3 +9,5 @@
# See util/spd_tools/README.md for more details and instructions.
# Part Name
+K3KL6L60GM-MGCT
+K3KL8L80CM-MGCT
--
To view, visit https://review.coreboot.org/c/coreboot/+/80637?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ic6a36e40f0f93109f296c5cc67a368ace81bd217
Gerrit-Change-Number: 80637
Gerrit-PatchSet: 2
Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com>
Gerrit-Reviewer: Eric Lai <ericllai(a)google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: merged