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Change subject: soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80718/comment/1f0e6dc9_a5a6fb0a :
PS6, Line 10: from
: Alder Lake to fix a similar issue present on Tiger Lake:
reflow to 72 char
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Change subject: device/pnp_device: Demote unassigned resource printk to NOTICE
......................................................................
Patch Set 2: Code-Review+1
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Change subject: soc/intel/common/lpc_lib: Demote printk for IO base value 0
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> so you would keep it as an error then?
Sure. Unless it still shows up as a spurious message for some reason?
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Change subject: soc/intel/common/lpc_lib: Demote printk for IO base value 0
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> If this function gets called with a 0 value, that's most likely a bug at the […]
so you would keep it as an error then?
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Change subject: soc/intel/tigerlake: Remove IOM Mctp command from TCSS ASL
......................................................................
soc/intel/tigerlake: Remove IOM Mctp command from TCSS ASL
Port fix from Alder Lake to not set/reset IOM MCTP during
D3 cold entry or exit.
Ports 5008d340033d ("soc/intel/adl: Remove IOM Mctp command from TCSS
ASL"):
```
Recently as part of s0ix hang issue, it was found that sending IOM
MCTP command as part of TCSS D3 Cold enter-exit sequence created an
issue.
We discovered that due to change in hardware sequence, ADL should not
set/reset IOM MCTP during D3 cold entry or exit. This patch removes the
bit setting from ASL file to prevent hang in the system.
This patch also removes obsolete Pcode mailbox communication which is
no longer required for ADL.
BUG=b:220796339
BRANCH=firmware-brya-14505.B
TEST=Check if hang issue is resolved with the CL and no other regression
observed
https://review.coreboot.org/c/coreboot/+/62861
```
Test: build/boot drobit to Win11. Verify TCSS XHCI power management
working and USB Root Hub doesn't Code 43 in device manager
Change-Id: I40a537fd2b0c821caf282f52aaff1874f54325f1
Signed-off-by: CoolStar <coolstarorganization(a)gmail.com>
---
M src/soc/intel/tigerlake/acpi/tcss.asl
1 file changed, 1 insertion(+), 142 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/80719/7
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to look at the new patch set (#6).
Change subject: soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
......................................................................
soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
Port 9c348a7b7ea3 ("soc/intel/alderlake: Fix processor hang while plug
unplug of TBT device") from
Alder Lake to fix a similar issue present on Tiger Lake:
```Processor hang is observed while hot plug unplug of TBT device. BIOS
should execute TBT PCIe RP RTD3 flow based on the value of
TBT_DMA_CFG_VS_CAP_9[30]. It should skip TBT PCIe RP RTD3 flow, if
BIT30 in TBT FW version is not set.
BUG=b:194880254
https://review.coreboot.org/c/coreboot/+/56503
```
Change-Id: Ie5409111d4239be86c0b153f01b4fe5fc6af352c
Signed-off-by: CoolStar <coolstarorganization(a)gmail.com>
---
M src/soc/intel/tigerlake/acpi/tcss.asl
M src/soc/intel/tigerlake/acpi/tcss_dma.asl
2 files changed, 10 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/80718/6
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Change subject: soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
......................................................................
Patch Set 5:
(1 comment)
File src/soc/intel/tigerlake/acpi/tcss_dma.asl:
https://review.coreboot.org/c/coreboot/+/80718/comment/79536cb1_a7ec595e :
PS2, Line 15: /* ITBT FW Version Bit30 */
> extra tab
Done
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Change subject: soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
......................................................................
soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
Port 9c348a7b7ea3 "soc/intel/alderlake: Fix processor hang while plug
unplug of TBT device" from
Alder Lake to fix a similar issue present on Tiger Lake:
```Processor hang is observed while hot plug unplug of TBT device. BIOS
should execute TBT PCIe RP RTD3 flow based on the value of
TBT_DMA_CFG_VS_CAP_9[30]. It should skip TBT PCIe RP RTD3 flow, if
BIT30 in TBT FW version is not set.
BUG=b:194880254
https://review.coreboot.org/c/coreboot/+/56503
```
Change-Id: Ie5409111d4239be86c0b153f01b4fe5fc6af352c
Signed-off-by: CoolStar <coolstarorganization(a)gmail.com>
---
M src/soc/intel/tigerlake/acpi/tcss.asl
M src/soc/intel/tigerlake/acpi/tcss_dma.asl
2 files changed, 10 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/80718/5
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Change subject: soc/intel/tigerlake: Remove IOM Mctp command from TCSS ASL
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80719/comment/ea3e8538_7409622a :
PS3, Line 1: Parent: e7ee525c (soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device)
> same comments here as previous patch: truncate commit hash to 12 digits, add quotes around commit ms […]
Done
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https://review.coreboot.org/c/coreboot/+/80719?usp=email
to look at the new patch set (#5).
Change subject: soc/intel/tigerlake: Remove IOM Mctp command from TCSS ASL
......................................................................
soc/intel/tigerlake: Remove IOM Mctp command from TCSS ASL
Port fix from Alder Lake to not set/reset IOM MCTP during
D3 cold entry or exit.
Ports 5008d340033d "soc/intel/adl: Remove IOM Mctp command from TCSS ASL":
```
Recently as part of s0ix hang issue, it was found that sending IOM
MCTP command as part of TCSS D3 Cold enter-exit sequence created an
issue.
We discovered that due to change in hardware sequence, ADL should not
set/reset IOM MCTP during D3 cold entry or exit. This patch removes the
bit setting from ASL file to prevent hang in the system.
This patch also removes obsolete Pcode mailbox communication which is
no longer required for ADL.
BUG=b:220796339
BRANCH=firmware-brya-14505.B
TEST=Check if hang issue is resolved with the CL and no other regression
observed
https://review.coreboot.org/c/coreboot/+/62861
```
Test: build/boot drobit to Win11. Verify TCSS XHCI power management
working and USB Root Hub doesn't Code 43 in device manager
Change-Id: I40a537fd2b0c821caf282f52aaff1874f54325f1
Signed-off-by: CoolStar <coolstarorganization(a)gmail.com>
---
M src/soc/intel/tigerlake/acpi/tcss.asl
1 file changed, 1 insertion(+), 142 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/80719/5
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