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Change subject: soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
......................................................................
Patch Set 7: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80718/comment/27b6df31_89c98b61 :
PS7, Line 13: ```Processor hang is observed while hot plug unplug of TBT device. BIOS
: should execute TBT PCIe RP RTD3 flow based on the value of
: TBT_DMA_CFG_VS_CAP_9[30]. It should skip TBT PCIe RP RTD3 flow, if
: BIT30 in TBT FW version is not set.
:
: BUG=b:194880254
:
: https://review.coreboot.org/c/coreboot/+/56503
: ```
In Markdown citation is done as in email citations: Prepend a `> ` to the lines.
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Change subject: mb/purism/librem_cnl/var/librem_mini: Set RTC register defaults
......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/purism/librem_cnl/variants/librem_mini/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/80601/comment/bfa25a6e_b60676ff :
PS2, Line 154: io 0x60 = 0x070
> you're right -- setting 0x70 does break the RTC, so this patch is no good. […]
Hmmm, best way: go back in time and prevent the soc/intel/lpc code from being moved
to common/. Fixing this code would be a lot easier if we knew that no board is
relying on the code.
I see two pragmatic solutions:
1. don't call the lpc_lib code for unassigned resources (i.e. check the assigned flag before the call). and then leave it unassigned and live with the BIOS_NOTICE message from pnp_device code.
2. assign a non-zero value that doesn't conflict. e.g. 0x350 might be free and would look good with the 0x360 below it :) this could, however, result in more soc/intel/lpc trouble, if it runs out of generic-decode registers.
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Change subject: soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
......................................................................
Patch Set 7: Code-Review+2
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Change subject: soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80718/comment/7f442d52_ea01bcb7 :
PS6, Line 10: from
: Alder Lake to fix a similar issue present on Tiger Lake:
> reflow to 72 char
Done
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Hello Matt DeVillier, Nick Vaccaro, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#7).
Change subject: soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
......................................................................
soc/intel/tigerlake: Fix processor hang while plug unplug of TBT device
Port 9c348a7b7ea3 ("soc/intel/alderlake: Fix processor hang while plug
unplug of TBT device") from Alder Lake to fix a similar issue present
on Tiger Lake:
```Processor hang is observed while hot plug unplug of TBT device. BIOS
should execute TBT PCIe RP RTD3 flow based on the value of
TBT_DMA_CFG_VS_CAP_9[30]. It should skip TBT PCIe RP RTD3 flow, if
BIT30 in TBT FW version is not set.
BUG=b:194880254
https://review.coreboot.org/c/coreboot/+/56503
```
Change-Id: Ie5409111d4239be86c0b153f01b4fe5fc6af352c
Signed-off-by: CoolStar <coolstarorganization(a)gmail.com>
---
M src/soc/intel/tigerlake/acpi/tcss.asl
M src/soc/intel/tigerlake/acpi/tcss_dma.asl
2 files changed, 10 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/80718/7
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Change subject: soc/intel/common/lpc_lib: Demote printk for IO base value 0
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> so you would keep it as an error then?
the problem I'm seeing is that the lpc_lib will try to open IO windows even when the resource is (intentionally) not assigned in devicetree
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Change subject: mb/purism/librem_cnl/var/librem_mini: Set RTC register defaults
......................................................................
Patch Set 2: Code-Review-1
(1 comment)
File src/mainboard/purism/librem_cnl/variants/librem_mini/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/80601/comment/1989771d_e2329fc6 :
PS2, Line 154: io 0x60 = 0x070
> Maybe do both? This hardware register is enable by the `2e.10 on` anyway, […]
you're right -- setting 0x70 does break the RTC, so this patch is no good. The problem remains though that even without this patch, the Intel LPC lib will try to open 2 IO windows with base 0, throwing 2 errors. What's the best way to handle?
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Change subject: soc/intel/tigerlake: Remove IOM Mctp command from TCSS ASL
......................................................................
Patch Set 7: Code-Review+2
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