coreboot-gerrit February 2024

coreboot-gerrit@coreboot.org

1 participants
3067 discussions

[S] Change in coreboot[main]: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM
by Patrick Rudolph (Code Review) 02 Feb '24

02 Feb '24

Attention is currently required from: Andrey Petrov, Arthur Heymans, Chen, Gang C, David Hendricks, Johnny Lin, Lean Sheng Tan, Ronak Kanabar, Shuo Liu. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80328?usp=email ) Change subject: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/80328/comment/9363784a_a7132d67 : PS3, Line 8: Need to justify your change. It does neither describe a problem nor why this change is necessary. Does it fix something? https://review.coreboot.org/c/coreboot/+/80328/comment/2cc1414b_1823057c : PS3, Line 11: some why ones? -- To view, visit https://review.coreboot.org/c/coreboot/+/80328?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I17a73e4f627c91808ed17c712b72937662ae9293 Gerrit-Change-Number: 80328 Gerrit-PatchSet: 3 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Fri, 02 Feb 2024 10:00:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM
by Arthur Heymans (Code Review) 02 Feb '24

02 Feb '24

Attention is currently required from: Andrey Petrov, Arthur Heymans, Chen, Gang C, David Hendricks, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Ronak Kanabar, Shuo Liu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80328?usp=email ) Change subject: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM ...................................................................... Patch Set 2: Code-Review-1 Copied votes on follow-up patch sets have been updated: * Code-Review-1 has been copied to patch set 3 (copy condition: "changekind:NO_CHANGE OR changekind:NO_CODE_CHANGE OR changekind:TRIVIAL_REBASE OR is:MIN"). (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/80328/comment/f7b36b91_469de38c : PS1, Line 9: FSP allocates temporary ram in its reserved memory ranges : instead of requesting coreboot to do the allocation. This : is supported by some FSP implementations for Xeon SP. Are you sure that is what is going on? It's just using the default settings which avoid this heap being in .bss which is above the stack? I think it's more prudent to still explicitly set the values and use Kconfig params to do that, but to explain what is going on. Memory management is something you want explicit control over and not leave up to defaults. The end result is still the same location with for the heap, but at least it's visible what is going on and not an implicit default. File src/drivers/intel/fsp2_0/memory_init.c: https://review.coreboot.org/c/coreboot/+/80328/comment/63318fb4_3e3ab9db : PS1, Line 156: goto temp_ram_assigned; goto is considered bad taste. Just add an if clause below to skip the UPD setup. But I'd still prefer to set values explicitly: Add a new Kconfig setting 'XEON_SP_FSP_HEAP_WORKAROUND' and based on that set base at 'CONFIG_DCACHE_RAM_BASE + CONFIG_FSP_M_RC_HEAP_SIZE - CONFIG_FSP_TEMP_RAM_SIZE' and size to CONFIG_FSP_TEMP_RAM_SIZE, while still increasing CONFIG_FSP_M_RC_HEAP_SIZE to encompass both. Change the help text of CONFIG_FSP_M_RC_HEAP_SIZE that it includes both heaps. -- To view, visit https://review.coreboot.org/c/coreboot/+/80328?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I17a73e4f627c91808ed17c712b72937662ae9293 Gerrit-Change-Number: 80328 Gerrit-PatchSet: 2 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Fri, 02 Feb 2024 10:00:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM
by Shuo Liu (Code Review) 02 Feb '24

02 Feb '24

Attention is currently required from: Andrey Petrov, Arthur Heymans, Chen, Gang C, David Hendricks, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Ronak Kanabar. Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80328?usp=email ) Change subject: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM ...................................................................... Patch Set 3: (1 comment) File src/drivers/intel/fsp2_0/memory_init.c: https://review.coreboot.org/c/coreboot/+/80328/comment/ac75f7fb_ea8e0b78 : PS3, Line 156: goto temp_ram_assigned; > arch_upd->StackBase/Size already contains the FSP internally assigned values, here we are not overri […] Please review together with https://review.coreboot.org/c/coreboot/+/80329 -- To view, visit https://review.coreboot.org/c/coreboot/+/80328?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I17a73e4f627c91808ed17c712b72937662ae9293 Gerrit-Change-Number: 80328 Gerrit-PatchSet: 3 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Fri, 02 Feb 2024 09:57:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/intel/xeon_sp/spr: Enable FSP_DOES_NOT_NEED_TEMP_RAM
by Shuo Liu (Code Review) 02 Feb '24

02 Feb '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80329?usp=email ) Change subject: soc/intel/xeon_sp/spr: Enable FSP_DOES_NOT_NEED_TEMP_RAM ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/xeon_sp/spr/Kconfig: https://review.coreboot.org/c/coreboot/+/80329/comment/fd67a869_e4b504f3 : PS3, Line 67: default 0x150000 coreboot's RC HEAP reservation is enlarged to cover the FSP internal statically assigned TEMP RAM -- To view, visit https://review.coreboot.org/c/coreboot/+/80329?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic84c4332dd5b6980ca03f6ab601b7464e0b18001 Gerrit-Change-Number: 80329 Gerrit-PatchSet: 3 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 02 Feb 2024 09:56:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM
by Shuo Liu (Code Review) 02 Feb '24

02 Feb '24

Attention is currently required from: Andrey Petrov, Arthur Heymans, Chen, Gang C, David Hendricks, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Ronak Kanabar. Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80328?usp=email ) Change subject: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM ...................................................................... Patch Set 3: (1 comment) File src/drivers/intel/fsp2_0/memory_init.c: https://review.coreboot.org/c/coreboot/+/80328/comment/bb41cbf9_1fd271e9 : PS3, Line 156: goto temp_ram_assigned; arch_upd->StackBase/Size already contains the FSP internally assigned values, here we are not overriding using coreboot allocation -- To view, visit https://review.coreboot.org/c/coreboot/+/80328?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I17a73e4f627c91808ed17c712b72937662ae9293 Gerrit-Change-Number: 80328 Gerrit-PatchSet: 3 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Fri, 02 Feb 2024 09:56:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/intel/xeon_sp/spr: Enable FSP_DOES_NOT_NEED_TEMP_RAM
by Shuo Liu (Code Review) 02 Feb '24

02 Feb '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Hello Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80329?usp=email to look at the new patch set (#3). Change subject: soc/intel/xeon_sp/spr: Enable FSP_DOES_NOT_NEED_TEMP_RAM ...................................................................... soc/intel/xeon_sp/spr: Enable FSP_DOES_NOT_NEED_TEMP_RAM TEST=intel/archercity CRB 1S/2S Change-Id: Ic84c4332dd5b6980ca03f6ab601b7464e0b18001 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> --- M src/soc/intel/xeon_sp/spr/Kconfig 1 file changed, 2 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/80329/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/80329?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic84c4332dd5b6980ca03f6ab601b7464e0b18001 Gerrit-Change-Number: 80329 Gerrit-PatchSet: 3 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM
by Shuo Liu (Code Review) 02 Feb '24

02 Feb '24

Attention is currently required from: Andrey Petrov, Arthur Heymans, Chen, Gang C, David Hendricks, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Ronak Kanabar. Hello Andrey Petrov, Arthur Heymans, Chen, Gang C, David Hendricks, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Ronak Kanabar, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80328?usp=email to look at the new patch set (#3). Change subject: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM ...................................................................... drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM FSP allocates temporary ram in its reserved memory ranges instead of requesting coreboot to do the allocation. This is supported by some FSP implementations for Xeon SP. TEST=intel/archercity CRB 1S/2S Change-Id: I17a73e4f627c91808ed17c712b72937662ae9293 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/memory_init.c 2 files changed, 24 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/80328/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/80328?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I17a73e4f627c91808ed17c712b72937662ae9293 Gerrit-Change-Number: 80328 Gerrit-PatchSet: 3 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/amd: commonize PCI root IOAPIC initialization
by Felix Held (Code Review) 02 Feb '24

02 Feb '24

Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80286?usp=email ) Change subject: soc/amd: commonize PCI root IOAPIC initialization ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/80286/comment/0ed0a5e8_dbc41989 : PS1, Line 13: Gena > Genoa Done https://review.coreboot.org/c/coreboot/+/80286/comment/4156ef5f_13369ce6 : PS1, Line 17: Both the FCH IOAPIC and the PCIe root IOAPIC are still initialized : on Mandolin > does this change affect the timing or order of the IOAPIC init? haven't checked the timing before this patch, but the ioapic ids stay the same, since we have a special case for the fch ioapic that needs to be the first one in the system. since the function that gets called only sets the ioapic id and clears the vectors i don't see any possible problems there -- To view, visit https://review.coreboot.org/c/coreboot/+/80286?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7c0ec6ac2f11cb11e46248cceec96c1fd2a49c16 Gerrit-Change-Number: 80286 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Fri, 02 Feb 2024 09:46:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/intel/xeon_sp/spr: Enable FSP_DOES_NOT_NEED_TEMP_RAM
by Shuo Liu (Code Review) 02 Feb '24

02 Feb '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Hello Arthur Heymans, Christian Walter, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80329?usp=email to look at the new patch set (#2). Change subject: soc/intel/xeon_sp/spr: Enable FSP_DOES_NOT_NEED_TEMP_RAM ...................................................................... soc/intel/xeon_sp/spr: Enable FSP_DOES_NOT_NEED_TEMP_RAM TEST=intel/archercity CRB Change-Id: Ic84c4332dd5b6980ca03f6ab601b7464e0b18001 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> --- M src/soc/intel/xeon_sp/spr/Kconfig 1 file changed, 2 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/80329/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80329?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic84c4332dd5b6980ca03f6ab601b7464e0b18001 Gerrit-Change-Number: 80329 Gerrit-PatchSet: 2 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM
by Shuo Liu (Code Review) 02 Feb '24

02 Feb '24

Attention is currently required from: Andrey Petrov, Ronak Kanabar. Hello Andrey Petrov, Ronak Kanabar, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80328?usp=email to look at the new patch set (#2). Change subject: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM ...................................................................... drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM FSP allocates temporary ram in its reserved memory ranges instead of requesting coreboot to do the allocation. This is supported by some FSP implementations for Xeon SP. TEST=intel/archercity CRB Change-Id: I17a73e4f627c91808ed17c712b72937662ae9293 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/memory_init.c 2 files changed, 24 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/80328/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80328?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I17a73e4f627c91808ed17c712b72937662ae9293 Gerrit-Change-Number: 80328 Gerrit-PatchSet: 2 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit February 2024