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Change subject: lib/romstage_handoff.c: Initialize using a cbmem hook
......................................................................
Patch Set 3:
(1 comment)
File src/lib/romstage_handoff.c:
https://review.coreboot.org/c/coreboot/+/52933/comment/d6b53986_c50c78e7 :
PS3, Line 56: ROMSTAGE_CBMEM_INIT_HOOK(romstage_handoff_init);
> Since this file is compiled unconditionally, adding an INIT_HOOK() expands this to a lot of platforms which never used it. Please add a Kconfig to limit compilation of the file to the right set of boards if you want to do this (I'm not quite sure what exactly this is or what the right set of boards for it would be, but I know the Arm boards I work on don't use this, for example).
Done. HAVE_ACPI_RESUME is the proper flag.
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Change subject: lib/romstage_handoff.c: Initialize using a cbmem hook
......................................................................
lib/romstage_handoff.c: Initialize using a cbmem hook
This reduces platform boilerplate code.
Change-Id: I93abf33a6eb055eeaba1fed5042387822de1aa20
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---
M src/drivers/amd/agesa/romstage.c
M src/drivers/intel/fsp1_1/romstage.c
M src/drivers/intel/fsp2_0/memory_init.c
M src/include/romstage_handoff.h
M src/lib/romstage_handoff.c
M src/northbridge/intel/gm45/romstage.c
M src/northbridge/intel/haswell/romstage.c
M src/northbridge/intel/i945/early_init.c
M src/northbridge/intel/ironlake/romstage.c
M src/northbridge/intel/pineview/romstage.c
M src/northbridge/intel/sandybridge/romstage.c
M src/northbridge/intel/x4x/romstage.c
M src/soc/amd/stoneyridge/romstage.c
M src/soc/intel/baytrail/romstage/romstage.c
M src/soc/intel/broadwell/romstage.c
15 files changed, 9 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/52933/4
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Change subject: vc/amd/opensil/genoa_poc: remove xSIM-api dependency from opensil.h
......................................................................
Patch Set 1: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80287/comment/a71511e6_1ae55afe :
PS1, Line 18:
May be you already did that but add info that you did a build test ?
File src/vendorcode/amd/opensil/genoa_poc/ramstage.c:
https://review.coreboot.org/c/coreboot/+/80287/comment/fb6c626a_128b44fe :
PS1, Line 178: /* TODO: also call timepoints 2 and 3 from coreboot. Are they NOOP? */
Can this be removed now ?
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Change subject: [WIP,UNTESTED] arch/x86/ioapic: always write IOAPIC ID in set_ioapic_id
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
haven't looked at all the details yet, but at least for the socs i work on the old behavior seems to be quite questionable to me. i guess that this might be some regression from the ioapic id cleanup; before that one we used MAX_CPUS as ID for the first ioapic
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Change subject: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM
......................................................................
Patch Set 3: Code-Review-1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80328/comment/0dcc1e64_6c4ee7ce :
PS3, Line 8:
> Need to justify your change. It does neither describe a problem nor why this change is necessary. Does it fix something?
I presume the dual+ socket issue? It's worth mentioning though.
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Hello Jakub Czapiga, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: em100: return an error if a command fails
......................................................................
em100: return an error if a command fails
We don't properly return an error in every code path when a command
fails. This makes it hard to use this tool in a shell script because you
can't be sure that your command was successful.
Change-Id: I2554252d007a92e939088389d67f9d4cede837ee
Signed-off-by: Corvin Köhne <c.koehne(a)beckhoff.com>
---
M em100.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/em100 refs/changes/50/80250/2
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Hello Jakub Czapiga, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: em100: exit when using an invalid device name
......................................................................
em100: exit when using an invalid device name
If you use a stupid device name like `em100 --device bla`, we won't exit
with an error right now. It just ignores the devices and uses the first
device it can find. This could lead to unexpected issues when connecting
more than one EM100 device to your machine. It's much better to exit if
we're unable to parse the device name.
Change-Id: If0f7b8b576224a9db6ab319c2212bc245110c5c1
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Change subject: em100: free device list when calling em100 --list
......................................................................
em100: free device list when calling em100 --list
After querying the device list by calling libusb_get_device_list, you
have to free the list with lib_usb_free_device_list to properly clean up
the resources allocated by libusb. This solves some warnings issued by
libusb when calling `em100 --list`.
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M em100.c
1 file changed, 1 insertion(+), 0 deletions(-)
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Change subject: [WIP,UNTESTED] arch/x86/ioapic: always write IOAPIC ID in set_ioapic_id
......................................................................
[WIP,UNTESTED] arch/x86/ioapic: always write IOAPIC ID in set_ioapic_id
It seems very odd to me that the IOAPIC ID doesn't get written to the
register if it's 0 which is a valid IOAPIC ID which is used for the
first IOAPIC in the system. I'm not sure yet if that was to work around
some issue with some older system, but relying of the IOAPIC ID of the
first IOAPIC in the system to be 0 seems to be a bad idea to me.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: Ic8538f82a6b10f16eeb228669db197dc8e326ffd
---
M src/arch/x86/ioapic.c
1 file changed, 2 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/80330/1
diff --git a/src/arch/x86/ioapic.c b/src/arch/x86/ioapic.c
index 04c852b..df97a50 100644
--- a/src/arch/x86/ioapic.c
+++ b/src/arch/x86/ioapic.c
@@ -131,12 +131,8 @@
ioapic_base);
printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id);
- if (ioapic_id) {
- /* Set IOAPIC ID if it has been specified. */
- io_apic_write(ioapic_base, 0x00,
- (io_apic_read(ioapic_base, 0x00) & 0xf0ffffff) |
- (ioapic_id << 24));
- }
+ io_apic_write(ioapic_base, 0x00,
+ (io_apic_read(ioapic_base, 0x00) & 0xf0ffffff) | (ioapic_id << 24));
printk(BIOS_SPEW, "IOAPIC: Dumping registers\n");
for (i = 0; i < 3; i++)
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Change subject: drivers/intel/fsp2_0: Add FSP_DOES_NOT_NEED_TEMP_RAM
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80328/comment/9363784a_a7132d67 :
PS3, Line 8:
Need to justify your change. It does neither describe a problem nor why this change is necessary. Does it fix something?
https://review.coreboot.org/c/coreboot/+/80328/comment/2cc1414b_1823057c :
PS3, Line 11: some
why ones?
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