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Change subject: mb/amd/birman: Add Birmanplus board support for PHX1 SOC
......................................................................
Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80353/comment/cce3b495_d8b09a98 :
PS2, Line 7: PHX1
> What does the 1 refer to?
it is Phoenix SOC
https://review.coreboot.org/c/coreboot/+/80353/comment/a6d22c2e_ad1e5704 :
PS2, Line 7: Birmanplus
> What is the official spelling?
Birman+ or Birmanplus
File src/mainboard/amd/birman/Kconfig:
https://review.coreboot.org/c/coreboot/+/80353/comment/9fa36573_aed055d7 :
PS2, Line 78: default "3rdparty/blobs/mainboard/amd/birman/EC_birman.bin"
> do birman and birmanplus share the same ec firmware?
no, they are different.
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Change subject: soc/amd: move common pci_domain_fill_ssdt implementation to acpi/
......................................................................
Patch Set 1: -Code-Review
(1 comment)
File src/acpi/Kconfig:
https://review.coreboot.org/c/coreboot/+/80464/comment/da1e3f45_49c4cd55 :
PS1, Line 101: ACPI_PCI_ROOT_RESOURCE_PRODUCER
> not sure if there might be a better name for this. […]
Do you need a Kconfig for it? The linker would just discard the code if unused right?
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Change subject: soc/amd: move common pci_domain_fill_ssdt implementation to acpi/
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
I had a look at Intel client .asl code if that could be replaced with this code. It looks like there are OPROM entries and a TPM Area. I'm not sure if the OS cares about those, but declaring those would be easy.
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Change subject: device/pciexp_device.c: Fix setting Max Payload Size
......................................................................
Patch Set 19:
(2 comments)
File src/device/pciexp_device.c:
https://review.coreboot.org/c/coreboot/+/77338/comment/d9b3e8c3_730b2afb :
PS18, Line 653: pciexp_dev_set_max_payload_size(parent, max_payload);
> Agreed. It would save a few cycles without making the code more complicated.
Done
https://review.coreboot.org/c/coreboot/+/77338/comment/9542381e_a913413b :
PS18, Line 721: parent's
From the other comment:
> pciexp_scan_bus() is already recursive. Everything that is called before the recursion happens on the way down, everything after happens on the way up. So we don't need additional loops that walk up, we do it already.
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Change subject: device/pciexp_device.c: Fix setting Max Payload Size
......................................................................
device/pciexp_device.c: Fix setting Max Payload Size
Current implementation assumes that the endpoint device is connected
directly to the PCIe Root Port, which does not always have to be true.
In a case where there is a PCIe switch between the endpoint and the
root port, the Max Payload Size capability may differ across the
devices in the chain and coreboot will not set a correct Max Payload
Size. This results in a PCIe device malfunction in pre-OS environment,
e.g. if the Ethernet NICs are connected behind a PCIe switch, the iPXE
fails to obtain the DHCP configuration.
Fix this by traversing the topology and programming the highest common
Max Payload Size in the given PCIe device chain during enumeration.
Once finished, the root port has the highest common Max Payload Size
supported by all the devices in the chain. So at the end of root port
bus scan, propagate the root port's Max Payload Size to all downstream
devices to keep Max Payload Size in sync within the whole chain.
TEST=Perform successful dhcp command in iPXE on the NIC connected to
the PCIe root port via ASMedia ASM1806 PCIe switch and again on the
NIC connected directly to the PCIe root port.
Change-Id: I24386dc208363b7d94fea46dec25c231a3968225
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
---
M src/device/pciexp_device.c
1 file changed, 130 insertions(+), 29 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/77338/20
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Change subject: soc/amd: move common pci_domain_fill_ssdt implementation to acpi/
......................................................................
Patch Set 1: Code-Review+2
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Change subject: docker/doc.coreboot.org: Install pip modules into virtual env
......................................................................
docker/doc.coreboot.org: Install pip modules into virtual env
Currently, pip modules are installed system-wide, which may cause
conflicts with modules installed using the package manager. Newer
versions of the Alpine base image also mark its system wide Python
installation as an externally managed environment, which will cause
pip to return an error as per recent Python recommendations [1].
[1] https://peps.python.org/pep-0668/
Change-Id: Idd9cc5e6fb28b42ef8e4fa5db01eb9ef192ba0ec
Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com>
---
M util/docker/doc.coreboot.org/Dockerfile
1 file changed, 8 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/80311/4
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