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Change subject: mb/amd/birman: Add Birman+ board support for Phoenix SOC
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80353/comment/b5263683_26abf39a :
PS2, Line 7: Birmanplus
> Birman+ or Birmanplus
resolved.
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Change subject: mb/amd/birman: Add Birman+ board support for Phoenix SOC
......................................................................
Patch Set 4:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80353/comment/f136479e_49e09d65 :
PS2, Line 7: PHX1
> it is Phoenix SOC
renamed to Phoenix
https://review.coreboot.org/c/coreboot/+/80353/comment/70c1503c_b349015c :
PS2, Line 9: 1)Initial commit for upstreaming Birmanplus mainboard changes.
: 2)Add the DXIO descriptors for Birmanplus mainboard.
> Please add a space after the item “bullet”. […]
done
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Change subject: include/device/azalia_device.h: Add enum for misc field
......................................................................
Patch Set 2:
(3 comments)
Patchset:
PS2:
Looks good in general. 👍
File src/include/device/azalia_device.h:
https://review.coreboot.org/c/coreboot/+/80452/comment/3920ec05_f81945ff :
PS2, Line 117: NO_JACK_PRESENCE_DETECT
nit: Add a comma here
https://review.coreboot.org/c/coreboot/+/80452/comment/5cc3c07c_174ac260 :
PS2, Line 118: }
Missing a semicolon here but otherwise looks good to me.
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Hello Angel Pons, Arthur Heymans, Benjamin Doron, Christian Walter, Lean Sheng Tan, Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/77905?usp=email
to look at the new patch set (#21).
The following approvals got outdated and were removed:
Verified-1 by build bot (Jenkins)
Change subject: mb/emulation: Add SIMICS QSP support
......................................................................
mb/emulation: Add SIMICS QSP support
SIMICS Quick Start Platform (QSP) is weird. It doesn't implement a single X58 register
besides DEVID/VENID. Likely because those are never used by an OS.
As it is a slimmed-down entry-level platform, it is not so suitable for developing complex firmware.
ICH10 seems to be more properly implemented.
Working:
- Boots to EDK2 payload (payloads/external/edk2)
- TSEG works, ASEG is broken
- Graphics init works
Signed-off-by: Leon Gross <leon.gross(a)9elements.com>
Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36
---
A Documentation/mainboard/emulation/simics-qsp.md
M src/cpu/qemu-x86/Kconfig
A src/mainboard/emulation/simics-qsp/Kconfig
A src/mainboard/emulation/simics-qsp/Kconfig.name
A src/mainboard/emulation/simics-qsp/Makefile.inc
A src/mainboard/emulation/simics-qsp/acpi.h
A src/mainboard/emulation/simics-qsp/acpi_tables.c
A src/mainboard/emulation/simics-qsp/board_info.txt
A src/mainboard/emulation/simics-qsp/bootblock.c
A src/mainboard/emulation/simics-qsp/cmos.default
A src/mainboard/emulation/simics-qsp/cmos.layout
A src/mainboard/emulation/simics-qsp/cpu.c
A src/mainboard/emulation/simics-qsp/devicetree.cb
A src/mainboard/emulation/simics-qsp/dsdt.asl
A src/mainboard/emulation/simics-qsp/exit_car.S
A src/mainboard/emulation/simics-qsp/hda_verb.c
A src/mainboard/emulation/simics-qsp/mainboard.c
A src/mainboard/emulation/simics-qsp/memmap.c
A src/mainboard/emulation/simics-qsp/memory.h
A src/mainboard/emulation/simics-qsp/northbridge.c
A src/mainboard/emulation/simics-qsp/romstage.c
A src/mainboard/emulation/simics-qsp/vboot-rwa-16M.fmd
A src/mainboard/emulation/simics-qsp/vboot-rwab-16M.fmd
M src/southbridge/intel/i82801jx/Kconfig
24 files changed, 1,236 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/77905/21
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Change subject: device/pci_device.c: Avoid adding invalid resources
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80466/comment/b4b4f976_73c8f5a0 :
PS1, Line 10:
Could you give an example?
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Change subject: device/pci_device.c: Avoid adding invalid resources
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> > Does it fix a real problem, though? It's not uncommon to have `limit < base` for […]
Ack. I thought it was in the context of the following patch. Makes perfectly sense
with the previous patch in mind.
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Change subject: soc/amd: move common pci_domain_fill_ssdt implementation to acpi/
......................................................................
Patch Set 1:
(1 comment)
File src/acpi/Kconfig:
https://review.coreboot.org/c/coreboot/+/80464/comment/b4b33fd1_933c115d :
PS1, Line 101: ACPI_PCI_ROOT_RESOURCE_PRODUCER
> Do you need a Kconfig for it? The linker would just discard the code if unused right?
How about "acpi(gen)_domain_resources"?
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