coreboot-gerrit February 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: soc/intel/jasperlake: Drop redundant PcieRpEnable
by Paul Menzel (Code Review) 16 Feb '24

16 Feb '24

Attention is currently required from: Arthur Heymans, Jeremy Compostella, Matt DeVillier, Nico Huber. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79919?usp=email ) Change subject: soc/intel/jasperlake: Drop redundant PcieRpEnable ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/79919?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea7f616f6db579c06722369c08de7cf7261dece8 Gerrit-Change-Number: 79919 Gerrit-PatchSet: 4 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Reviewer: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 16 Feb 2024 11:27:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/jasperlake: Drop redundant PcieRpEnable
by Nico Huber (Code Review) 16 Feb '24

16 Feb '24

Attention is currently required from: Arthur Heymans, Jeremy Compostella, Matt DeVillier, Paul Menzel. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79919?usp=email ) Change subject: soc/intel/jasperlake: Drop redundant PcieRpEnable ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/79919/comment/009bac8a_3a028df2 : PS3, Line 10: infracture > infrastructure Huh. Done. -- To view, visit https://review.coreboot.org/c/coreboot/+/79919?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea7f616f6db579c06722369c08de7cf7261dece8 Gerrit-Change-Number: 79919 Gerrit-PatchSet: 4 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Reviewer: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 16 Feb 2024 11:07:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/jasperlake: Drop redundant PcieRpEnable
by Nico Huber (Code Review) 16 Feb '24

16 Feb '24

Attention is currently required from: Arthur Heymans, Jeremy Compostella, Matt DeVillier, Nico Huber. Hello Arthur Heymans, Jeremy Compostella, Jonathon Hall, Matt DeVillier, Nicholas Sudsgaard, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79919?usp=email to look at the new patch set (#4). Change subject: soc/intel/jasperlake: Drop redundant PcieRpEnable ...................................................................... soc/intel/jasperlake: Drop redundant PcieRpEnable The PcieRpEnable option is redundant to our on/off setting in the devicetrees. Let's use the common coreboot infrastructure instead. Thanks to Nicholas for doing all the mainboard legwork! Change-Id: Iea7f616f6db579c06722369c08de7cf7261dece8 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Signed-off-by: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb M src/mainboard/google/dedede/variants/baseboard/ramstage.c M src/mainboard/google/dedede/variants/boxy/overridetree.cb M src/mainboard/google/dedede/variants/bugzzy/overridetree.cb M src/mainboard/google/dedede/variants/dexi/overridetree.cb M src/mainboard/google/dedede/variants/dibbi/overridetree.cb M src/mainboard/google/dedede/variants/dita/overridetree.cb M src/mainboard/google/dedede/variants/sasuke/overridetree.cb M src/mainboard/google/dedede/variants/sasukette/overridetree.cb M src/mainboard/google/dedede/variants/storo/overridetree.cb M src/mainboard/google/dedede/variants/taranza/overridetree.cb M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb M src/mainboard/purism/librem_jsl/devicetree.cb M src/soc/intel/jasperlake/Makefile.mk M src/soc/intel/jasperlake/chip.c M src/soc/intel/jasperlake/chip.h A src/soc/intel/jasperlake/include/soc/pcie.h A src/soc/intel/jasperlake/pcie_rp.c M src/soc/intel/jasperlake/romstage/fsp_params.c 19 files changed, 41 insertions(+), 82 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/79919/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/79919?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea7f616f6db579c06722369c08de7cf7261dece8 Gerrit-Change-Number: 79919 Gerrit-PatchSet: 4 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Reviewer: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/tigerlake: Drop redundant PcieRpEnable
by Nico Huber (Code Review) 16 Feb '24

16 Feb '24

Attention is currently required from: Arthur Heymans, Jeremy Compostella, Jeremy Soller, Michael Niewöhner, Nick Vaccaro, Sean Rhodes, Subrata Banik, Tim Crawford. Hello Arthur Heymans, Jeremy Compostella, Jeremy Soller, Michael Niewöhner, Nicholas Sudsgaard, Nick Vaccaro, Sean Rhodes, Subrata Banik, Tim Crawford, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79920?usp=email to look at the new patch set (#5). Change subject: soc/intel/tigerlake: Drop redundant PcieRpEnable ...................................................................... soc/intel/tigerlake: Drop redundant PcieRpEnable The PcieRpEnable option is redundant to our on/off setting in the devicetrees. Let's use the common coreboot infrastructure instead. Thanks to Nicholas for doing all the mainboard legwork! Change-Id: Iacfef5f032278919f1fcf49e31fa42bcbf1eaf20 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Signed-off-by: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> --- M src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/chronicler/overridetree.cb M src/mainboard/google/volteer/variants/elemi/overridetree.cb M src/mainboard/google/volteer/variants/voema/overridetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb M src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb M src/mainboard/system76/tgl-h/variants/gaze16-3050/overridetree.cb M src/mainboard/system76/tgl-h/variants/gaze16-3060/overridetree.cb M src/mainboard/system76/tgl-h/variants/oryp8/overridetree.cb M src/mainboard/system76/tgl-u/variants/darp7/overridetree.cb M src/mainboard/system76/tgl-u/variants/galp5/overridetree.cb M src/mainboard/system76/tgl-u/variants/lemp10/overridetree.cb M src/soc/intel/tigerlake/Makefile.mk M src/soc/intel/tigerlake/chip.h M src/soc/intel/tigerlake/romstage/fsp_params.c 17 files changed, 20 insertions(+), 57 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/79920/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/79920?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iacfef5f032278919f1fcf49e31fa42bcbf1eaf20 Gerrit-Change-Number: 79920 Gerrit-PatchSet: 5 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/tigerlake: Drop redundant PcieRpEnable
by Nico Huber (Code Review) 16 Feb '24

16 Feb '24

Attention is currently required from: Arthur Heymans, Jeremy Compostella, Jeremy Soller, Michael Niewöhner, Nick Vaccaro, Nico Huber, Subrata Banik, Tim Crawford. Hello Arthur Heymans, Jeremy Compostella, Jeremy Soller, Michael Niewöhner, Nicholas Sudsgaard, Nick Vaccaro, Subrata Banik, Tim Crawford, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79920?usp=email to look at the new patch set (#4). Change subject: soc/intel/tigerlake: Drop redundant PcieRpEnable ...................................................................... soc/intel/tigerlake: Drop redundant PcieRpEnable The PcieRpEnable option is redundant to our on/off setting in the devicetrees. Let's use the common coreboot infracture instead. Thanks to Nicholas for doing all the mainboard legwork! Change-Id: Iacfef5f032278919f1fcf49e31fa42bcbf1eaf20 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Signed-off-by: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> --- M src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/chronicler/overridetree.cb M src/mainboard/google/volteer/variants/elemi/overridetree.cb M src/mainboard/google/volteer/variants/voema/overridetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb M src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb M src/mainboard/system76/tgl-h/variants/gaze16-3050/overridetree.cb M src/mainboard/system76/tgl-h/variants/gaze16-3060/overridetree.cb M src/mainboard/system76/tgl-h/variants/oryp8/overridetree.cb M src/mainboard/system76/tgl-u/variants/darp7/overridetree.cb M src/mainboard/system76/tgl-u/variants/galp5/overridetree.cb M src/mainboard/system76/tgl-u/variants/lemp10/overridetree.cb M src/soc/intel/tigerlake/Makefile.mk M src/soc/intel/tigerlake/chip.h M src/soc/intel/tigerlake/romstage/fsp_params.c 17 files changed, 20 insertions(+), 57 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/79920/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/79920?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iacfef5f032278919f1fcf49e31fa42bcbf1eaf20 Gerrit-Change-Number: 79920 Gerrit-PatchSet: 4 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: treewide: Move stdlib.h to commonlib
by Maximilian Brune (Code Review) 16 Feb '24

16 Feb '24

Attention is currently required from: Andrey Petrov, Arthur Heymans, Christian Walter, Hung-Te Lin, Jakub Czapiga, Johnny Lin, Jérémy Compostella, Lean Sheng Tan, Martin L Roth, Patrick Rudolph, Ronak Kanabar, Shuo Liu, Tim Chu, Yidi Lin, Yu-Ping Wu. Hello Andrey Petrov, Arthur Heymans, Christian Walter, Hung-Te Lin, Jakub Czapiga, Johnny Lin, Jérémy Compostella, Martin L Roth, Ronak Kanabar, Tim Chu, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77969?usp=email to look at the new patch set (#13). Change subject: treewide: Move stdlib.h to commonlib ...................................................................... treewide: Move stdlib.h to commonlib This patch moves commonlib/stdlib.h -> commonlib/bsd/stdlib.h, since all code is BSD licensed anyway. It also moves some code from libpayloads stdlib.h to commonlib/bsd/stdlib.h so that it can be shared with coreboot. This is useful for a subsequent commit that adds devicetree.c into commonlib. Also we don't support DMA on arm platforms in coreboot (only libpayload) therefore `dma_malloc()` has been removed and `dma_coherent()` has been moved to architecture specific functions. Any architecture that tries to use `dma_coherent()` now will get a compile time error. In order to not break current platforms like mb/google/herobrine which make use of the commonlib/storage/sdhci.c controller which in turn uses `dma_coherent` a stub has been added to arch/arm64/dma.c. Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Change-Id: I3a7ab0d1ddcc7ce9af121a61b4d4eafc9e563a8a --- M Makefile.mk M payloads/libpayload/include/stdlib.h M src/arch/arm64/Makefile.mk A src/arch/arm64/dma.c M src/arch/x86/Makefile.mk A src/arch/x86/dma.c R src/commonlib/bsd/include/commonlib/bsd/stdlib.h M src/commonlib/storage/bouncebuf.c M src/commonlib/storage/sdhci.c M src/drivers/intel/fsp2_0/silicon_init.c M src/include/stdlib.h M src/lib/device_tree.c M src/lib/fit.c M src/soc/intel/xeon_sp/spr/numa.c M src/soc/mediatek/common/pcie.c M src/soc/mediatek/mt8195/pcie.c 16 files changed, 36 insertions(+), 52 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/77969/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/77969?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3a7ab0d1ddcc7ce9af121a61b4d4eafc9e563a8a Gerrit-Change-Number: 77969 Gerrit-PatchSet: 13 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: treewide: Move list.h to commonlib
by Maximilian Brune (Code Review) 16 Feb '24

16 Feb '24

Attention is currently required from: Jakub Czapiga, Julius Werner, Martin L Roth. Hello Jakub Czapiga, Julius Werner, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77968?usp=email to look at the new patch set (#8). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: treewide: Move list.h to commonlib ...................................................................... treewide: Move list.h to commonlib It is needed in order to move device_tree.c into commonlib in a subsequent commit. Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Change-Id: I16eb7b743fb1d36301f0eda563a62364e7a9cfec --- M payloads/libpayload/Makefile.mk M payloads/libpayload/libc/Makefile.mk M src/commonlib/Makefile.mk R src/commonlib/include/commonlib/list.h R src/commonlib/list.c M src/include/device_tree.h M src/include/fit.h M src/lib/Makefile.mk M src/lib/cbfs.c M src/lib/edid_fill_fb.c M tests/commonlib/Makefile.mk R tests/commonlib/list-test.c M tests/lib/Makefile.mk 13 files changed, 21 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/77968/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/77968?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I16eb7b743fb1d36301f0eda563a62364e7a9cfec Gerrit-Change-Number: 77968 Gerrit-PatchSet: 8 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/jasperlake: Drop redundant PcieRpEnable
by Paul Menzel (Code Review) 16 Feb '24

16 Feb '24

Attention is currently required from: Arthur Heymans, Jeremy Compostella, Matt DeVillier, Nico Huber. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79919?usp=email ) Change subject: soc/intel/jasperlake: Drop redundant PcieRpEnable ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/79919/comment/170bb7bd_88102afe : PS3, Line 10: infracture infrastructure -- To view, visit https://review.coreboot.org/c/coreboot/+/79919?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea7f616f6db579c06722369c08de7cf7261dece8 Gerrit-Change-Number: 79919 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Reviewer: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 16 Feb 2024 10:43:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/dedede/var/beadrix: Disable un-used C1 port by daughterboard
by Kevin Yang (Code Review) 16 Feb '24

16 Feb '24

Attention is currently required from: Felix Held, Ivan Chen, Karthik Ramasubramanian, Paul Menzel. Kevin Yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80573?usp=email ) Change subject: mb/google/dedede/var/beadrix: Disable un-used C1 port by daughterboard ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/80573?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I494a922d2b04dcf7bd35680f5d95f8463e225f2d Gerrit-Change-Number: 80573 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Yang <kevin.yang(a)ecs.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kevin Yang <kevin.yang(a)ecs.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ivan Chen <yulunchen(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 16 Feb 2024 10:37:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/dedede/var/beadrix: Generate SPD ID for supported memory part
by Kevin Yang (Code Review) 16 Feb '24

16 Feb '24

Attention is currently required from: Felix Held, Ivan Chen, Karthik Ramasubramanian, Paul Menzel. Kevin Yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79887?usp=email ) Change subject: mb/google/dedede/var/beadrix: Generate SPD ID for supported memory part ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/79887?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3a6925395b52dc7aa5c0f93b8820099369db4dbf Gerrit-Change-Number: 79887 Gerrit-PatchSet: 4 Gerrit-Owner: Kevin Yang <kevin.yang(a)ecs.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kevin Yang <kevin.yang(a)ecs.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ivan Chen <yulunchen(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 16 Feb 2024 10:37:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit February 2024