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Patrick Rudolph has posted comments on this change by Jincheng Li. ( https://review.coreboot.org/c/coreboot/+/85737?usp=email )
Change subject: soc/intel/xeon_sp: Remove assert when creating DMAR component
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85737/comment/d122a4d5_2bb7cd8d?us… :
PS1, Line 10: Remove
> Good question. Got a quick check but agree that more checks are needed before moving ahead. […]
Thanks for explaining. When you found no problems on gen6 I'm fine this change.
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Change subject: soc/mediatek/mt8196: Define MFGPLL_*_BASE using MFGSYS_BASE
......................................................................
Patch Set 3: Code-Review+2
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Hello Hung-Te Lin, Xinxiong Xu, Yidi Lin, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/85742?usp=email
to look at the new patch set (#2).
Change subject: mb/google/corsola: Add new board variant Wyrdeer
......................................................................
mb/google/corsola: Add new board variant Wyrdeer
Add a new Staryu follower device 'Wyrdeer'. And add MIPI panel support.
BUG=b:379810871
TEST=emerge-staryu coreboot chromeos-bootimage and check FW screen
BRANCH=corsola
Change-Id: I07b73c97d8d51b32f557e31d834ffc6cfb8420ed
Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/corsola/Kconfig
M src/mainboard/google/corsola/Kconfig.name
M src/mainboard/google/corsola/Makefile.mk
A src/mainboard/google/corsola/panel_wyrdeer.c
4 files changed, 78 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/85742/2
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Hello Hung-Te Lin, Yidi Lin,
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Change subject: soc/mediatek/mt8196: Define MFGPLL_*_BASE using MFGSYS_BASE
......................................................................
soc/mediatek/mt8196: Define MFGPLL_*_BASE using MFGSYS_BASE
The MFGPLL_*_BASE addresses are based on MFGSYS_BASE (0x40000000)
instead of IO_PHYS (0x10000000). Rewrite the address calculation for
readability.
Also rename these macros to MFG_PLL_* to make them consistent with other
macros to be added in CB:85654.
Change-Id: Ifd5d77b95c698cb6030c58ba259f2cdf2a29d87b
Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org>
---
M src/soc/mediatek/mt8196/include/soc/addressmap.h
M src/soc/mediatek/mt8196/include/soc/pll.h
2 files changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/85740/3
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Hello Hung-Te Lin, Yidi Lin,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: soc/mediatek/mt8196: Define MFGPLL_*_BASE using MFGSYS_BASE
......................................................................
soc/mediatek/mt8196: Define MFGPLL_*_BASE using MFGSYS_BASE
The MFGPLL_*_BASE addresses are based on MFGSYS_BASE (0x40000000)
instead of IO_PHYS (0x10000000). Rewrite the address calculation for
readability.
Also rename these macros to MFG_PLL_* to make them consistent with other
macros to be added in CB:85654.
Change-Id: Ifd5d77b95c698cb6030c58ba259f2cdf2a29d87b
Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org>
---
M src/soc/mediatek/mt8196/include/soc/addressmap.h
M src/soc/mediatek/mt8196/include/soc/pll.h
2 files changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/85740/2
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Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85743?usp=email )
Change subject: ec/google/chromeec: Add API to check if a USB PD charger is attached
......................................................................
ec/google/chromeec: Add API to check if a USB PD charger is attached
This change introduces a new API, `google_chromeec_is_usb_pd_attached()`
which checks the current status of the USB-C port and returns whether a
USB Power Delivery (PD) charger is currently connected.
This API is useful for determining if the system is currently being
powered by a PD charger.
BUG=b:377798581
TEST=Able to read the PD status correctly while booting google/fatcat.
Change-Id: I47c934ee8a7563d4ba5124bff5613e61dd66e923
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/ec/google/chromeec/ec.c
M src/ec/google/chromeec/ec.h
2 files changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/85743/1
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index af5c235..d0c5fc5 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -966,6 +966,28 @@
return 0;
}
+/*
+ * This API checks the current status of the USB-C port and returns
+ * whether a USB Power Delivery (PD) charger is currently connected.
+ */
+bool google_chromeec_is_usb_pd_attached(void)
+{
+ const struct ec_params_usb_pd_power_info params = {
+ .port = PD_POWER_CHARGING_PORT,
+ };
+ struct ec_response_usb_pd_power_info resp = {};
+ int rv;
+
+ rv = ec_cmd_usb_pd_power_info(PLAT_EC, ¶ms, &resp);
+ if (rv != 0)
+ return false;
+
+ if (resp.type == USB_CHG_TYPE_PD)
+ return true;
+
+ return false;
+}
+
int google_chromeec_override_dedicated_charger_limit(uint16_t current_lim,
uint16_t voltage_lim)
{
diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h
index 31c7671..cdea70f 100644
--- a/src/ec/google/chromeec/ec.h
+++ b/src/ec/google/chromeec/ec.h
@@ -137,6 +137,9 @@
int google_chromeec_get_usb_pd_power_info(enum usb_chg_type *type,
uint16_t *current_max, uint16_t *voltage_max);
+/* Check if a USB Power Delivery (PD) charger is attached */
+bool google_chromeec_is_usb_pd_attached(void);
+
/*
* Set max current and voltage of a dedicated charger.
*
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Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Kun Liu, Nick Vaccaro, Subrata Banik.
Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rui Zhou, Subrata Banik,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/nissa/var/telith: Disable stylus function
......................................................................
mb/google/nissa/var/telith: Disable stylus function
Disable stylus function based on hardware schematic diagram.
BUG=b:372506691
TEST=Local build successfully.
Change-Id: I7b72284ab173633405d5de9541f0ea7520d09658
Signed-off-by: Kun Liu <liukun11(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/telith/gpio.c
M src/mainboard/google/brya/variants/telith/overridetree.cb
2 files changed, 4 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/85738/2
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