coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Set SPMI-P SCL/SDA SoC PD
by Hope Wang (Code Review) 26 Dec '24

26 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Hope Wang has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85751?usp=email ) Change subject: soc/mediatek/mt8196: Set SPMI-P SCL/SDA SoC PD ...................................................................... Patch Set 6: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85751/comment/d97874b6_8b793d2b?us… : PS5, Line 10: spmi > SPMI Done https://review.coreboot.org/c/coreboot/+/85751/comment/4265777a_2e3cd6dc?us… : PS5, Line 10: clk > clock Done File src/soc/mediatek/mt8196/pmif_spmi.c: https://review.coreboot.org/c/coreboot/+/85751/comment/a79559ad_b1afc73f?us… : PS1, Line 178: setbits32p(SPMI_SCL_P_PD_ADDR, : BIT(SPMI_SCL_P_PD_OFFSET) | BIT(SPMI_SDA_P_PD_OFFSET)); > This is identical to […] Done https://review.coreboot.org/c/coreboot/+/85751/comment/5af3d8b4_a5300dee?us… : PS1, Line 177: if (dev->slvid == SPMI_SLAVE_6) { : setbits32p(SPMI_SCL_P_PD_ADDR, : BIT(SPMI_SCL_P_PD_OFFSET) | BIT(SPMI_SDA_P_PD_OFFSET)); : printk(BIOS_INFO, "%s, Set SoC PD for SPMI-P SCL/SDA, [0x%x] = 0x%x\n", : __func__, SPMI_SCL_P_PD_ADDR, read32p(SPMI_SCL_P_PD_ADDR)); : } > This setting also effects other slaves, right ? Should we revert the setting for other slaves ? Plea […] Because the 6316 with slave id 6 is the first PMIC in SPMI-P, just need to set one time. -- To view, visit https://review.coreboot.org/c/coreboot/+/85751?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idbf8ed8e31850ca81c823db1b25bde4a83a48c4f Gerrit-Change-Number: 85751 Gerrit-PatchSet: 6 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Thu, 26 Dec 2024 13:15:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: mb/google/rex/var/kanix: Add Synaptics touchpad
by Subrata Banik (Code Review) 26 Dec '24

26 Dec '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kenneth Chan, Tarun, Tyler Wang. Subrata Banik has posted comments on this change by Kenneth Chan. ( https://review.coreboot.org/c/coreboot/+/85776?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/rex/var/kanix: Add Synaptics touchpad ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/rex/variants/kanix/overridetree.cb: https://review.coreboot.org/c/coreboot/+/85776/comment/c8be09e2_aa9f8085?us… : PS3, Line 460: 0x2c nit `2c` do you plan to use fw_config ? -- To view, visit https://review.coreboot.org/c/coreboot/+/85776?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I89b9e24f98c1e7af571507283469411fd389431a Gerrit-Change-Number: 85776 Gerrit-PatchSet: 3 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Thu, 26 Dec 2024 13:11:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/google/fatcat/var/fatcat: Modify interrupt GPIO for LPSS I2C touchpad
by Subrata Banik (Code Review) 26 Dec '24

26 Dec '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85754?usp=email ) Change subject: mb/google/fatcat/var/fatcat: Modify interrupt GPIO for LPSS I2C touchpad ...................................................................... mb/google/fatcat/var/fatcat: Modify interrupt GPIO for LPSS I2C touchpad Change the interrupt GPIO for LPSS I2C based touchpad from GPP_F18 to GPP_A13 to match the current fatcat configuration. BUG=b:376019577 TEST=Able to verify the touchpad functionality using 'THAT' touchpad module. Change-Id: I37a9d3aae67883f9eb4f47d76b4f48ac6ebb6d16 Signed-off-by: Pranava Y N <pranavayn(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85754 Reviewed-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> --- M src/mainboard/google/fatcat/variants/fatcat/fw_config.c M src/mainboard/google/fatcat/variants/fatcat/gpio.c M src/mainboard/google/fatcat/variants/fatcat/overridetree.cb 3 files changed, 5 insertions(+), 7 deletions(-) Approvals: Kapil Porwal: Looks good to me, approved Dtrain Hsu: Looks good to me, approved Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c index 728d0f9..6ac0755 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c +++ b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c @@ -439,8 +439,8 @@ PAD_CFG_NF(GPP_F12, NONE, DEEP, NF8), /* GPP_F13: THC_I2C1_SDA_TCH_PAD */ PAD_CFG_NF(GPP_F13, NONE, DEEP, NF8), - /* GPP_F18: TCH_PAD_INT_N */ - PAD_CFG_GPI_APIC(GPP_F18, NONE, PLTRST, EDGE_SINGLE, INVERT), + /* GPP_A13: TCH_PAD_INT_N */ + PAD_CFG_GPI_IRQ_WAKE(GPP_A13, NONE, PWROK, LEVEL, INVERT), }; static const struct pad_config touchpad_i2c_disable_pads[] = { @@ -448,8 +448,8 @@ PAD_NC(GPP_F12, NONE), /* GPP_F13: THC_I2C1_SDA_TCH_PAD */ PAD_NC(GPP_F13, NONE), - /* GPP_F18: TCH_PAD_INT_N */ - PAD_NC(GPP_F18, NONE), + /* GPP_A13: TCH_PAD_INT_N */ + PAD_NC(GPP_A13, NONE), }; static const struct pad_config ish_disable_pads[] = { diff --git a/src/mainboard/google/fatcat/variants/fatcat/gpio.c b/src/mainboard/google/fatcat/variants/fatcat/gpio.c index a5a1be1..881c5c7 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/gpio.c +++ b/src/mainboard/google/fatcat/variants/fatcat/gpio.c @@ -36,8 +36,6 @@ PAD_CFG_GPO(GPP_A11, 1, PLTRST), /* GPP_A12: WIFI_WAKE_N */ PAD_CFG_GPI_SCI_LOW(GPP_A12, NONE, DEEP, LEVEL), - /* GPP_A13: Not used */ - PAD_NC(GPP_A13, NONE), /* GPP_A15: GPP_A15_DNX_FORCE_RELOAD */ PAD_CFG_NF(GPP_A15, NONE, DEEP, NF1), /* GPP_A16: BT_RF_KILL_N */ diff --git a/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb b/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb index 60fb95f..693d6cf 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb +++ b/src/mainboard/google/fatcat/variants/fatcat/overridetree.cb @@ -756,7 +756,7 @@ chip drivers/i2c/hid register "generic.hid" = ""HFW68H"" register "generic.desc" = ""Hynitron TOUCHPAD"" - register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F18_IRQ)" + register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A13_IRQ)" register "generic.uid" = "5" register "generic.detect" = "1" register "hid_desc_reg_offset" = "0x20" -- To view, visit https://review.coreboot.org/c/coreboot/+/85754?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I37a9d3aae67883f9eb4f47d76b4f48ac6ebb6d16 Gerrit-Change-Number: 85754 Gerrit-PatchSet: 3 Gerrit-Owner: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/google/rex/var/kanix: Add Synaptics touchpad
by Kapil Porwal (Code Review) 26 Dec '24

26 Dec '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kenneth Chan, Subrata Banik, Tarun, Tyler Wang. Kapil Porwal has posted comments on this change by Kenneth Chan. ( https://review.coreboot.org/c/coreboot/+/85776?usp=email ) Change subject: mb/google/rex/var/kanix: Add Synaptics touchpad ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85776?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I89b9e24f98c1e7af571507283469411fd389431a Gerrit-Change-Number: 85776 Gerrit-PatchSet: 3 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Thu, 26 Dec 2024 13:06:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: ec/google/chromeec: Add debug timestamp for host EC commands
by Kapil Porwal (Code Review) 26 Dec '24

26 Dec '24

Attention is currently required from: Boris Mittelberg, Caveh Jalali, Jayvik Desai, Paul Menzel, Subrata Banik. Kapil Porwal has posted comments on this change by Jayvik Desai. ( https://review.coreboot.org/c/coreboot/+/85326?usp=email ) Change subject: ec/google/chromeec: Add debug timestamp for host EC commands ...................................................................... Patch Set 12: (1 comment) File src/ec/google/chromeec/ec_lpc.c: https://review.coreboot.org/c/coreboot/+/85326/comment/420e5b88_1f92d1c3?us… : PS12, Line 285: if (CONFIG(EC_GOOGLE_CHROMEEC_EC_HOST_CMD_DEBUG)) { : stopwatch_tick(&sw); : printk(BIOS_DEBUG, "EC HOST CMD Duration: %llu us, Command: 0x%x, version: 0x%x\n", : stopwatch_duration_usecs(&sw), : rq.command, : rq.command_version); : } : Can we move this code to `google_chromeec_command()` so that we can capture timings during command failures, and version 1 command timings? -- To view, visit https://review.coreboot.org/c/coreboot/+/85326?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8ab89830ede940d2237ad21187b137dca9689fb0 Gerrit-Change-Number: 85326 Gerrit-PatchSet: 12 Gerrit-Owner: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Thu, 26 Dec 2024 13:03:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add MT6685 Clock IC driver
by Jarried Lin (Code Review) 26 Dec '24

26 Dec '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85734?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Code-Review+2 by Yidi Lin, Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add MT6685 Clock IC driver ...................................................................... soc/mediatek/mt8196: Add MT6685 Clock IC driver Add MT6685 initial settings and ADC init settings to support Thermal Information Acquisition (TIA), TIA will read thermal info in HW. TEST=Build pass BUG=b:317009620 Change-Id: I26ae4f416202f04a8030259c49e009b19a60712e Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> --- A src/soc/mediatek/common/include/soc/mt6685.h A src/soc/mediatek/common/mt6685.c M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/mt6685.c M src/soc/mediatek/mt8196/pmif_init.c 5 files changed, 201 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/85734/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/85734?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I26ae4f416202f04a8030259c49e009b19a60712e Gerrit-Change-Number: 85734 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Set SPMI-P SCL/SDA SoC PD
by Jarried Lin (Code Review) 26 Dec '24

26 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin. Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85751?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Set SPMI-P SCL/SDA SoC PD ...................................................................... soc/mediatek/mt8196: Set SPMI-P SCL/SDA SoC PD Configure the SCL and SDA of the SPMI-P to Pull-Down mode on MT8196 SoC, it is done only once during the SPMI read check to fix SPMI clock calibration failure. TEST=Build pass BUG=b:361174333 Change-Id: Idbf8ed8e31850ca81c823db1b25bde4a83a48c4f Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/pmif_spmi.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/85751/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/85751?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idbf8ed8e31850ca81c823db1b25bde4a83a48c4f Gerrit-Change-Number: 85751 Gerrit-PatchSet: 6 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIC MT6363 ADC driver
by Yidi Lin (Code Review) 26 Dec '24

26 Dec '24

Attention is currently required from: Jarried Lin. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85128?usp=email ) Change subject: soc/mediatek/mt8196: Add PMIC MT6363 ADC driver ...................................................................... Patch Set 30: (1 comment) File src/soc/mediatek/common/mt6363_sdmadc.c: https://review.coreboot.org/c/coreboot/+/85128/comment/1be88af5_afdfd7a8?us… : PS30, Line 107: regval * chan->hw_info.ratio[0] * chan->hw_info.ref_volt > Is the multiplication likely to overflow (if so we need to cast to u64)? Could you check the maximum […] @jarried.lin@mediatek.com update ? -- To view, visit https://review.coreboot.org/c/coreboot/+/85128?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ice3c286cd207e445392d5f0126a07ce4f40dcf8a Gerrit-Change-Number: 85128 Gerrit-PatchSet: 30 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Thu, 26 Dec 2024 12:38:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: mb/google/rauru: Raise little core CPU frequency from 700MHz to 2.4GHz
by Yidi Lin (Code Review) 26 Dec '24

26 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85773?usp=email ) Change subject: mb/google/rauru: Raise little core CPU frequency from 700MHz to 2.4GHz ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/rauru/romstage.c: https://review.coreboot.org/c/coreboot/+/85773/comment/a79ef94e_4c5c03c7?us… : PS3, Line 18: get vcpul `%s: little core voltage: %d\n, __func__, mt6316_buck_get_voltage(0x8, MT6316_BUCK_3)` -- To view, visit https://review.coreboot.org/c/coreboot/+/85773?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I14a31f3a51ca246b842cc0ef740c43ff5d857310 Gerrit-Change-Number: 85773 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 26 Dec 2024 12:37:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/mediatek: Distinguish pmic_init_setting function name
by Yidi Lin (Code Review) 26 Dec '24

26 Dec '24

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85764?usp=email ) Change subject: soc/mediatek: Distinguish pmic_init_setting function name ...................................................................... soc/mediatek: Distinguish pmic_init_setting function name Rename pmic_init_setting to ${PMIC model}_init_setting accordingly. Change-Id: Id591bf3089aaa2148d34c77d021c17403494a776 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85764 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/soc/mediatek/common/include/soc/mt6359p.h M src/soc/mediatek/common/include/soc/mt6363.h M src/soc/mediatek/common/mt6359p.c M src/soc/mediatek/common/mt6363.c M src/soc/mediatek/mt8188/mt6359p.c M src/soc/mediatek/mt8192/mt6359p.c M src/soc/mediatek/mt8195/mt6359p.c M src/soc/mediatek/mt8196/mt6363.c 8 files changed, 13 insertions(+), 13 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved diff --git a/src/soc/mediatek/common/include/soc/mt6359p.h b/src/soc/mediatek/common/include/soc/mt6359p.h index 55a1a4d..fa21eaa 100644 --- a/src/soc/mediatek/common/include/soc/mt6359p.h +++ b/src/soc/mediatek/common/include/soc/mt6359p.h @@ -89,6 +89,6 @@ void mt6359p_enable_vm18(bool enable); void mt6359p_init_pmif_arb(void); void mt6359p_write_field(u32 reg, u32 val, u32 mask, u32 shift); -void pmic_init_setting(void); -void pmic_lp_setting(void); +void mt6359p_init_setting(void); +void mt6359p_lp_setting(void); #endif /* __SOC_MEDIATEK_MT6359P_H__ */ diff --git a/src/soc/mediatek/common/include/soc/mt6363.h b/src/soc/mediatek/common/include/soc/mt6363.h index 7e4487f..19b23d4 100644 --- a/src/soc/mediatek/common/include/soc/mt6363.h +++ b/src/soc/mediatek/common/include/soc/mt6363.h @@ -111,6 +111,6 @@ u32 mt6363_read16(u32 reg); void mt6363_write8(u32 reg, u8 reg_val); void mt6363_write_field(u32 reg, u32 val, u32 mask, u32 shift); -void pmic_init_setting(void); +void mt6363_init_setting(void); #endif /* __SOC_MEDIATEK_MT6363_H__ */ diff --git a/src/soc/mediatek/common/mt6359p.c b/src/soc/mediatek/common/mt6359p.c index 47c46d0..e766479 100644 --- a/src/soc/mediatek/common/mt6359p.c +++ b/src/soc/mediatek/common/mt6359p.c @@ -347,8 +347,8 @@ pmic_set_power_hold(); pmic_wdt_set(); pmic_protect_key_setting(false); - pmic_init_setting(); - pmic_lp_setting(); + mt6359p_init_setting(); + mt6359p_lp_setting(); pmic_efuse_setting(); pmic_protect_key_setting(true); pmic_wk_vs2_voter_setting(); diff --git a/src/soc/mediatek/common/mt6363.c b/src/soc/mediatek/common/mt6363.c index 9619d44..691282b 100644 --- a/src/soc/mediatek/common/mt6363.c +++ b/src/soc/mediatek/common/mt6363.c @@ -269,6 +269,6 @@ pmic_set_power_hold(); pmic_wdt_set(); pmic_protect_key_setting(false); - pmic_init_setting(); + mt6363_init_setting(); pmic_protect_key_setting(true); } diff --git a/src/soc/mediatek/mt8188/mt6359p.c b/src/soc/mediatek/mt8188/mt6359p.c index db3029e..9c8a2b5 100644 --- a/src/soc/mediatek/mt8188/mt6359p.c +++ b/src/soc/mediatek/mt8188/mt6359p.c @@ -209,14 +209,14 @@ {0x1d14, 0x1, 0x1, 0x2}, }; -void pmic_init_setting(void) +void mt6359p_init_setting(void) { for (int i = 0; i < ARRAY_SIZE(init_setting); i++) mt6359p_write_field(init_setting[i].addr, init_setting[i].val, init_setting[i].mask, init_setting[i].shift); } -void pmic_lp_setting(void) +void mt6359p_lp_setting(void) { for (int i = 0; i < ARRAY_SIZE(lp_setting); i++) mt6359p_write_field(lp_setting[i].addr, lp_setting[i].val, diff --git a/src/soc/mediatek/mt8192/mt6359p.c b/src/soc/mediatek/mt8192/mt6359p.c index 7579e2d..a5576db 100644 --- a/src/soc/mediatek/mt8192/mt6359p.c +++ b/src/soc/mediatek/mt8192/mt6359p.c @@ -283,14 +283,14 @@ {0x1d14, 0x1, 0x1, 0x2}, }; -void pmic_init_setting(void) +void mt6359p_init_setting(void) { for (int i = 0; i < ARRAY_SIZE(init_setting); i++) mt6359p_write_field(init_setting[i].addr, init_setting[i].val, init_setting[i].mask, init_setting[i].shift); } -void pmic_lp_setting(void) +void mt6359p_lp_setting(void) { for (int i = 0; i < ARRAY_SIZE(lp_setting); i++) mt6359p_write_field(lp_setting[i].addr, lp_setting[i].val, diff --git a/src/soc/mediatek/mt8195/mt6359p.c b/src/soc/mediatek/mt8195/mt6359p.c index 8a88d8c..690596b 100644 --- a/src/soc/mediatek/mt8195/mt6359p.c +++ b/src/soc/mediatek/mt8195/mt6359p.c @@ -239,14 +239,14 @@ {0x1d14, 0x1, 0x1, 0x2}, }; -void pmic_init_setting(void) +void mt6359p_init_setting(void) { for (int i = 0; i < ARRAY_SIZE(init_setting); i++) mt6359p_write_field(init_setting[i].addr, init_setting[i].val, init_setting[i].mask, init_setting[i].shift); } -void pmic_lp_setting(void) +void mt6359p_lp_setting(void) { for (int i = 0; i < ARRAY_SIZE(lp_setting); i++) mt6359p_write_field(lp_setting[i].addr, lp_setting[i].val, diff --git a/src/soc/mediatek/mt8196/mt6363.c b/src/soc/mediatek/mt8196/mt6363.c index e41ce0e..cc5ae56 100644 --- a/src/soc/mediatek/mt8196/mt6363.c +++ b/src/soc/mediatek/mt8196/mt6363.c @@ -376,7 +376,7 @@ {0x191A, 0x8, 0xFF}, }; -void pmic_init_setting(void) +void mt6363_init_setting(void) { for (int i = 0; i < ARRAY_SIZE(init_setting); i++) mt6363_write_field(init_setting[i].addr, init_setting[i].val, -- To view, visit https://review.coreboot.org/c/coreboot/+/85764?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id591bf3089aaa2148d34c77d021c17403494a776 Gerrit-Change-Number: 85764 Gerrit-PatchSet: 2 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit December 2024