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Hello Angel Pons, Angel Pons, Arthur Heymans, Christian Walter, Jincheng Li, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, build bot (Jenkins), yuchi.chen(a)intel.com,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#6).
Change subject: mainboard: Add support for MiTAC Computing Whitestone-2
......................................................................
mainboard: Add support for MiTAC Computing Whitestone-2
The MiTAC Computing Whitestone2 O-RAN CU/DU Edge Server is a compact
and highly efficient 1U rackmount solution designed for edge computing
in O-RAN (Open Radio Access Network) environments. Featuring support
for the 4th Gen Intel® Xeon® Scalable Processor Edge Enhanced Product
Family, it delivers robust performance with a single socket (LGA-4677)
that supports up to 205W TDP. The server provides excellent memory
capabilities with 8 DDR5 RDIMM slots supporting 4400 MHz speeds across
8 channels per CPU.
Working:
- All eight DIMM slots
- Serial port to emit spam
- POST code display
- Front USB 2.0 port
- Front Intel E810 CAM1 (25Gbps x 4)
- Front Intel E810 CAM2 (25Gbps x 4 / 10Gbps x 8)
- M.2 2280/22110 slot x 2 (Gen3 x4)
- Flashing internally with flashrom
Untested for now (i.e. should work, will eventually test):
- Riser PCIe Gen.4 x16 slots x 2 (FHHL)
Others:
- The board boots to Ubuntu 22.04.2 (5.15.0-1032-realtime) with all
40 cores (Intel 5433n) available.
- FlexRAN 23.11 + DPDK 22.11.1 + ACC200 O-RU + O-DU long-run test
pass.
Change-Id: Icf625cf8e9c76ef08411614c15ee43d0c459b905
Signed-off-by: Mark Chang <mark.chang(a)mitaccomputing.com>
---
A configs/config.mitaccomputing_ws_2
A src/mainboard/mitaccomputing/Kconfig
A src/mainboard/mitaccomputing/Kconfig.name
A src/mainboard/mitaccomputing/whitestone-2/Kconfig
A src/mainboard/mitaccomputing/whitestone-2/Kconfig.name
A src/mainboard/mitaccomputing/whitestone-2/Makefile.mk
A src/mainboard/mitaccomputing/whitestone-2/acpi/platform.asl
A src/mainboard/mitaccomputing/whitestone-2/board.fmd
A src/mainboard/mitaccomputing/whitestone-2/board_info.txt
A src/mainboard/mitaccomputing/whitestone-2/bootblock.c
A src/mainboard/mitaccomputing/whitestone-2/devicetree.cb
A src/mainboard/mitaccomputing/whitestone-2/dsdt.asl
A src/mainboard/mitaccomputing/whitestone-2/include/smbios_onboard.h
A src/mainboard/mitaccomputing/whitestone-2/include/spr_ws_2_gpio.h
A src/mainboard/mitaccomputing/whitestone-2/include/sprsp_ws_2_iio.h
A src/mainboard/mitaccomputing/whitestone-2/mainboard.c
A src/mainboard/mitaccomputing/whitestone-2/ramstage.c
A src/mainboard/mitaccomputing/whitestone-2/romstage.c
18 files changed, 739 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/85532/6
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Change subject: util/mtkheader: Add GFH header for mt8189 bootblock code
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/trulo/var/uldrenite: Configure USB ports and mapping
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85582/comment/c00dccf4_bc4c44fd?us… :
PS2, Line 7: Configuration
> Configure
Done
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#3).
Change subject: mb/trulo/var/uldrenite: Configure USB ports and mapping
......................................................................
mb/trulo/var/uldrenite: Configure USB ports and mapping
Based on the schematic_20241203, configure USB ports and their
mappings.
BUG=b:380789023
TEST=emerge-nissa coreboot
Change-Id: I8fa3bf958faaf17b35e33fe93e2a11e0d2eb48d6
Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com>
---
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/brya/variants/uldrenite/overridetree.cb
2 files changed, 93 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/85582/3
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I'd like you to reexamine a change. Please visit
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Change subject: mb/trulo/var/uldrenite: Configure serial_io and I2C
......................................................................
mb/trulo/var/uldrenite: Configure serial_io and I2C
1. Configure serial_io and I2C
2. Add I2C devices
BUG=b:380789023
TEST=emerge-nissa coreboot
Change-Id: I3c1b6028c7e4392a2142851d5fd0199954e2272d
Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com>
---
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/brya/variants/uldrenite/overridetree.cb
2 files changed, 174 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/85581/5
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Change subject: util/mtkheader: Add GFH header for mt8189 bootblock code
......................................................................
Patch Set 1:
(1 comment)
File util/mtkheader/gen-bl-img.py:
https://review.coreboot.org/c/coreboot/+/85598/comment/bd2e44f2_614ff95b?us… :
PS1, Line 27: 'mt8189': 0x02001000,
: 'mt8196': 0x02001000,
> I don't think reuse mt8196's entry would be a good idea, as it would mean we need to rewrite src/so […]
Acknowledged
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Change subject: mainboard: Add support for MiTAC Computing Whitestone-2 mainboard
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85532/comment/621acad9_b7f1252e?us… :
PS4, Line 7: Add support for MiTAC Computing Whitestone-2 mainboard
> As for mentioning the SOC/processor/socket in the summary, it won't fit. […]
Done
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I'd like you to reexamine a change. Please visit
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Change subject: mainboard: Add support for MiTAC Computing Whitestone-2 mainboard
......................................................................
mainboard: Add support for MiTAC Computing Whitestone-2 mainboard
The MiTAC Computing Whitestone2 O-RAN CU/DU Edge Server is a compact
and highly efficient 1U rackmount solution designed for edge computing
in O-RAN (Open Radio Access Network) environments. Featuring support
for the 4th Gen Intel® Xeon® Scalable Processor Edge Enhanced Product
Family, it delivers robust performance with a single socket (LGA-4677)
that supports up to 205W TDP. The server provides excellent memory
capabilities with 8 DDR5 RDIMM slots supporting 4400 MHz speeds across
8 channels per CPU.
Working:
- All eight DIMM slots
- Serial port to emit spam
- POST code display
- Front USB 2.0 port
- Front Intel E810 CAM1 (25Gbps x 4)
- Front Intel E810 CAM2 (25Gbps x 4 / 10Gbps x 8)
- M.2 2280/22110 slot x 2 (Gen3 x4)
- Flashing internally with flashrom
Untested for now (i.e. should work, will eventually test):
- Riser PCIe Gen.4 x16 slots x 2 (FHHL)
Others:
- The board boots to Ubuntu 22.04.2 (5.15.0-1032-realtime) with all
40 cores (Intel 5433n) available.
- FlexRAN 23.11 + DPDK 22.11.1 + ACC200 O-RU + O-DU long-run test
pass.
Change-Id: Icf625cf8e9c76ef08411614c15ee43d0c459b905
Signed-off-by: Mark Chang <mark.chang(a)mitaccomputing.com>
---
A configs/config.mitaccomputing_ws_2
A src/mainboard/mitaccomputing/Kconfig
A src/mainboard/mitaccomputing/Kconfig.name
A src/mainboard/mitaccomputing/whitestone-2/Kconfig
A src/mainboard/mitaccomputing/whitestone-2/Kconfig.name
A src/mainboard/mitaccomputing/whitestone-2/Makefile.mk
A src/mainboard/mitaccomputing/whitestone-2/acpi/platform.asl
A src/mainboard/mitaccomputing/whitestone-2/board.fmd
A src/mainboard/mitaccomputing/whitestone-2/board_info.txt
A src/mainboard/mitaccomputing/whitestone-2/bootblock.c
A src/mainboard/mitaccomputing/whitestone-2/devicetree.cb
A src/mainboard/mitaccomputing/whitestone-2/dsdt.asl
A src/mainboard/mitaccomputing/whitestone-2/include/smbios_onboard.h
A src/mainboard/mitaccomputing/whitestone-2/include/spr_ws_2_gpio.h
A src/mainboard/mitaccomputing/whitestone-2/include/sprsp_ws_2_iio.h
A src/mainboard/mitaccomputing/whitestone-2/mainboard.c
A src/mainboard/mitaccomputing/whitestone-2/ramstage.c
A src/mainboard/mitaccomputing/whitestone-2/romstage.c
18 files changed, 739 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/85532/5
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