coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: mb/google/nissa/var/telith: Modify PLD for typeC and typeA
by Rui Zhou (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Ginger Zhang, Jayvik Desai, Kapil Porwal, Kun Liu, Nick Vaccaro, Subrata Banik. Rui Zhou has posted comments on this change by Kun Liu. ( https://review.coreboot.org/c/coreboot/+/85618?usp=email ) Change subject: mb/google/nissa/var/telith: Modify PLD for typeC and typeA ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/85618?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifc5cd7c8e61b20632d2dcf4b7b2d506c42162063 Gerrit-Change-Number: 85618 Gerrit-PatchSet: 2 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ginger Zhang <zhangqingchun(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Ginger Zhang <zhangqingchun(a)huaqin.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Tue, 17 Dec 2024 08:34:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Add pwrsel driver
by Yu-Ping Wu (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85613?usp=email ) Change subject: soc/mediatek/mt8196: Add pwrsel driver ...................................................................... Patch Set 1: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85613/comment/b20e5b96_e8925264?us… : PS1, Line 9: is File src/soc/mediatek/mt8196/include/soc/mtk_pwrsel.h: https://review.coreboot.org/c/coreboot/+/85613/comment/47241ebc_e295a850?us… : PS1, Line 8: 0x0 One more tab to align with `0x04A4` below. File src/soc/mediatek/mt8196/mtk_pwrsel.c: https://review.coreboot.org/c/coreboot/+/85613/comment/85f56ace_a582b6d5?us… : PS1, Line 15: ( remove -- To view, visit https://review.coreboot.org/c/coreboot/+/85613?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib1b8588810fdad5c675dee865627337269b57d18 Gerrit-Change-Number: 85613 Gerrit-PatchSet: 1 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 17 Dec 2024 08:15:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/google/nissa/var/telith: Modify PLD for typeC and typeA
by Kun Liu (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Kun Liu has posted comments on this change by Kun Liu. ( https://review.coreboot.org/c/coreboot/+/85618?usp=email ) Change subject: mb/google/nissa/var/telith: Modify PLD for typeC and typeA ...................................................................... Patch Set 2: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/85618?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifc5cd7c8e61b20632d2dcf4b7b2d506c42162063 Gerrit-Change-Number: 85618 Gerrit-PatchSet: 2 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 17 Dec 2024 07:56:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brox: Apply ISH_FW_VERSION in Kconfig
by Subrata Banik (Code Review) 17 Dec '24

17 Dec '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85580?usp=email ) Change subject: mb/google/brox: Apply ISH_FW_VERSION in Kconfig ...................................................................... mb/google/brox: Apply ISH_FW_VERSION in Kconfig Apply ISH_FW_VERSION in Kconfig to improve boot time. It won't do some ISH init task without the config on UFS sku and cause boot to kernel time over 1.55 sec from G3 boot. BUG=b:364971947 BRANCH=firmware-brox-16080.B TEST=cbmem -c | grep "ISH version" -> ISH version: 5.4.2.7780 Boot to OS on jubilant, run bootperf test of G3 boot. Confirm the test result is pass. Change-Id: I31db0925a81b6ec68ee6afcb262e540ba7db206a Signed-off-by: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85580 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brox/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: Karthik Ramasubramanian: Looks good to me, approved build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/brox/Kconfig b/src/mainboard/google/brox/Kconfig index 11bcfe6..1731d51 100644 --- a/src/mainboard/google/brox/Kconfig +++ b/src/mainboard/google/brox/Kconfig @@ -34,6 +34,7 @@ select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES select SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE select SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY_V1 + select SOC_INTEL_STORE_ISH_FW_VERSION if DRIVERS_INTEL_ISH config BOARD_GOOGLE_BASEBOARD_BROX def_bool n -- To view, visit https://review.coreboot.org/c/coreboot/+/85580?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I31db0925a81b6ec68ee6afcb262e540ba7db206a Gerrit-Change-Number: 85580 Gerrit-PatchSet: 5 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/google/brya/var/uldrenite: Enable PMC, HECI and SRAM devices
by John Su (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Dinesh Gehlot, Dtrain Hsu, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. John Su has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/85597?usp=email ) Change subject: mb/google/brya/var/uldrenite: Enable PMC, HECI and SRAM devices ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: Hi Googler, would you please help CR and CQ+2? Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/85597?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icd537fd5b6bfa589931633b72477414098523b54 Gerrit-Change-Number: 85597 Gerrit-PatchSet: 6 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 17 Dec 2024 07:53:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/google/nissa/var/telith: Modify PLD for typeC and typeA
by Kun Liu (Code Review) 17 Dec '24

17 Dec '24

Kun Liu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85618?usp=email ) Change subject: mb/google/nissa/var/telith: Modify PLD for typeC and typeA ...................................................................... mb/google/nissa/var/telith: Modify PLD for typeC and typeA Modify PLD according to the actual positions of typeC and typeA on the DUT. +----------------+ | | | Screen | | | +----------------+ C0 | | A0 | | C1 | | +----------------+ BUG=b:372506691 TEST=emerge-nissa coreboot chromeos-bootimage Change-Id: Ifc5cd7c8e61b20632d2dcf4b7b2d506c42162063 Signed-off-by: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/telith/overridetree.cb 1 file changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/85618/1 diff --git a/src/mainboard/google/brya/variants/telith/overridetree.cb b/src/mainboard/google/brya/variants/telith/overridetree.cb index 4f1b16e..2c6f4f6 100644 --- a/src/mainboard/google/brya/variants/telith/overridetree.cb +++ b/src/mainboard/google/brya/variants/telith/overridetree.cb @@ -348,11 +348,11 @@ # TCP0 (DP-1) for port C0 register "device[2].name" = ""DD02"" register "device[2].use_pld" = "true" - register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" # TCP1 (DP-2) for port C1 register "device[3].name" = ""DD03"" register "device[3].use_pld" = "true" - register "device[3].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + register "device[3].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))" device generic 0 on end end end @@ -573,7 +573,7 @@ register "desc" = ""USB3 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))" device ref tcss_usb3_port1 on end end end @@ -601,14 +601,14 @@ register "desc" = ""USB2 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))" device ref usb2_port2 on end end chip drivers/usb/acpi register "desc" = ""USB2 Type-A Port A0 (MLB)"" register "type" = "UPC_TYPE_A" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, CENTER, ACPI_PLD_GROUP(3, 1))" device ref usb2_port3 on end end chip drivers/usb/acpi @@ -637,7 +637,7 @@ register "desc" = ""USB3 Type-A Port A0 (MLB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, CENTER, ACPI_PLD_GROUP(3, 1))" device ref usb3_port1 on end end chip drivers/usb/acpi -- To view, visit https://review.coreboot.org/c/coreboot/+/85618?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifc5cd7c8e61b20632d2dcf4b7b2d506c42162063 Gerrit-Change-Number: 85618 Gerrit-PatchSet: 1 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com>

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[XL] Change in coreboot[main]: soc/meidatek/mt8196: Add SPM loader
by Yu-Ping Wu (Code Review) 17 Dec '24

17 Dec '24

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[XL] Change in coreboot[main]: soc/meidatek/mt8196: Add SPM loader
by Yu-Ping Wu (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Ccong Chen, Hung-Te Lin, Wenzhen Yu, Yidi Lin. Yu-Ping Wu has posted comments on this change by Ccong Chen. ( https://review.coreboot.org/c/coreboot/+/85599?usp=email ) Change subject: soc/meidatek/mt8196: Add SPM loader ...................................................................... Patch Set 3: (13 comments) File src/soc/mediatek/common/Kconfig: https://review.coreboot.org/c/coreboot/+/85599/comment/b11902c1_da2c1309?us… : PS3, Line 122: version2. This version of the chip design : has been simplified `version 2, where the chip design is simplified compared to version 1.` File src/soc/mediatek/mt8196/include/soc/spm.h: https://review.coreboot.org/c/coreboot/+/85599/comment/cbd2eafe_21810445?us… : PS3, Line 636: u32 reserved1; Revert these unrelated changes. https://review.coreboot.org/c/coreboot/+/85599/comment/c52974e5_507c7a92?us… : PS3, Line 690: u32 reserved12[3]; Revert these unrelated changes. https://review.coreboot.org/c/coreboot/+/85599/comment/f291cbc6_5a575893?us… : PS3, Line 717: reserved16 Why is this changed to "reserved"? https://review.coreboot.org/c/coreboot/+/85599/comment/2f0926db_5d9b2282?us… : PS3, Line 1117: u32 pcm_apwdt_latch_27; : u32 pcm_apwdt_latch_28; : u32 pcm_apwdt_latch_29; : u32 pcm_apwdt_latch_30; : u32 pcm_apwdt_latch_31; : u32 pcm_apwdt_latch_32; : u32 pcm_apwdt_latch_33; : u32 pcm_apwdt_latch_34; : u32 pcm_apwdt_latch_35; : u32 pcm_apwdt_latch_36; : u32 pcm_apwdt_latch_37; : u32 pcm_apwdt_latch_38; `u32 pcm_apwdt_latch_27[12]` File src/soc/mediatek/mt8196/include/soc/spm.h: https://review.coreboot.org/c/coreboot/+/85599/comment/80399c09_edd06ee3?us… : PS1, Line 13: 0x1c001108 > Done I meant defining a structure similar to `mtk_vlpcksys_regs`. File src/soc/mediatek/mt8196/spm.c: https://review.coreboot.org/c/coreboot/+/85599/comment/78c8fccd_97e0de48?us… : PS1, Line 738: status > Done Not done. File src/soc/mediatek/mt8196/spm.c: https://review.coreboot.org/c/coreboot/+/85599/comment/e0ea12da_85bd8e40?us… : PS3, Line 742: SPM_ACK_CHK_3_CON_EN); align https://review.coreboot.org/c/coreboot/+/85599/comment/9fddf3d0_3222d4f2?us… : PS3, Line 744: Remove blank line https://review.coreboot.org/c/coreboot/+/85599/comment/48046918_eccbd82f?us… : PS3, Line 753: SPM_ACK_CHK_3_CON_HW_MODE_TRIG | SPM_ACK_CHK_3_CON_CLR_ALL, align https://review.coreboot.org/c/coreboot/+/85599/comment/e26379d1_322c256d?us… : PS3, Line 816: spm_resource_ack_con `spm_resource_ack_con[0]` https://review.coreboot.org/c/coreboot/+/85599/comment/44540573_40b085f5?us… : PS3, Line 827: spm_resource_ack_con `spm_resource_ack_con[0]` https://review.coreboot.org/c/coreboot/+/85599/comment/c560b928_34bafa52?us… : PS3, Line 835: ( remove -- To view, visit https://review.coreboot.org/c/coreboot/+/85599?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie09346f46cb734c74776b760485e7f35d4357e5e Gerrit-Change-Number: 85599 Gerrit-PatchSet: 3 Gerrit-Owner: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 17 Dec 2024 07:37:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[XL] Change in coreboot[main]: soc/meidatek/mt8196: Add SPM loader
by Ccong Chen (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Hung-Te Lin, Wenzhen Yu, Yidi Lin, Yu-Ping Wu. Ccong Chen has posted comments on this change by Ccong Chen. ( https://review.coreboot.org/c/coreboot/+/85599?usp=email ) Change subject: soc/meidatek/mt8196: Add SPM loader ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/mt8196/include/soc/spm.h: https://review.coreboot.org/c/coreboot/+/85599/comment/136d5c62_b5420700?us… : PS1, Line 201: u8 reg_apifr_mem_apsrc_req_mask_b; > Is the original register definition wrong? If that's the case, please split the "fixing" part into a […] The modifications here are part of the spm function， included in the same patch for easy maintenance. Separate processing increases effort. Can we put it in the same patch？ -- To view, visit https://review.coreboot.org/c/coreboot/+/85599?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie09346f46cb734c74776b760485e7f35d4357e5e Gerrit-Change-Number: 85599 Gerrit-PatchSet: 3 Gerrit-Owner: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 17 Dec 2024 07:34:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: mb/google/skywalker: Add MediaTek MT8189 reference board
by Yu-Ping Wu (Code Review) 17 Dec '24

17 Dec '24

Attention is currently required from: Hung-Te Lin, Vince Liu, Yidi Lin. Yu-Ping Wu has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/85617?usp=email ) Change subject: mb/google/skywalker: Add MediaTek MT8189 reference board ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85617?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I690508fea91c790f202f234f89be8f3cf4d09546 Gerrit-Change-Number: 85617 Gerrit-PatchSet: 1 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 17 Dec 2024 07:25:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit December 2024