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Change subject: soc/mediatek/common: Move some functions to spm_v1.c
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85623/comment/ba6eddd1_3adbda98?us… :
PS1, Line 12: named
> name
Done
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Change subject: mb/trulo/var/uldrenite: Set GPP_B5 and B6 to ISH function
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Patch Set 1: Code-Review+2
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Change subject: soc/mediatek/common: Move some functions to spm_v1.c
......................................................................
soc/mediatek/common: Move some functions to spm_v1.c
The init flow in `spm_init_pcm_register` and `spm_kick_pcm_to_run` is
simplified on MT8196. And MT8196 does not have corresponded registers
used by these two functions. Therefore, move these two function to a
separated file and simply name it as spm_v1.c.
BUG=none
TEST=emerge-geralt coreboot && emerge-corsola coreboot
Change-Id: I028d8f8ca8c9988d26d400f25ca09a2615541364
Signed-off-by: Yidi Lin <yidilin(a)chromium.org>
---
M src/soc/mediatek/common/include/soc/spm_common.h
M src/soc/mediatek/common/spm.c
A src/soc/mediatek/common/spm_v1.c
M src/soc/mediatek/mt8186/Makefile.mk
M src/soc/mediatek/mt8188/Makefile.mk
M src/soc/mediatek/mt8192/Makefile.mk
M src/soc/mediatek/mt8195/Makefile.mk
7 files changed, 53 insertions(+), 45 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/85623/2
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The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: soc/mediatek/mt8196: Add PMIC MT6316 driver
......................................................................
soc/mediatek/mt8196: Add PMIC MT6316 driver
Add MT6316 driver in SoC folder
TEST=Build pass
BUG=b:317009620
Change-Id: I39e91d64e77cff03281845dfbea565e6ddf748f6
Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com>
---
A src/soc/mediatek/common/include/soc/mt6316.h
A src/soc/mediatek/common/mt6316.c
M src/soc/mediatek/mt8196/Makefile.mk
A src/soc/mediatek/mt8196/mt6316.c
4 files changed, 1,167 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/85630/3
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Change subject: util/mtkheader: Add GFH header for mt8189 bootblock code
......................................................................
Patch Set 1:
(2 comments)
Patchset:
PS1:
I'll close this discussion thread for now.
If there are any issues, we can reopen the discussion.
Commit Message:
https://review.coreboot.org/c/coreboot/+/85598/comment/6c00b999_e59e5da7?us… :
PS1, Line 9: Set bootblock load address for bootROM.
> We don't have any documentation describing this address.
Done
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Change subject: mainboard: Add support for MiTAC Computing Whitestone-2
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85532/comment/754bc295_9531d7fc?us… :
PS4, Line 7: Add support for MiTAC Computing Whitestone-2 mainboard
> “support for” could be left out: […]
Can we modfiy the title to "mainboard: Add MiTAC Computing Whitestone-2 (LGA-4677)?
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Change subject: mb/google/brya/var/uldrenite: Enable PMC, HECI and SRAM devices
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Patch Set 6: Code-Review+2
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Change subject: soc/mediatek/common: Move SPM_SYSTEM_BASE_OFFSET to soc folders
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Patch Set 2: Code-Review+2
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Change subject: soc/mediatek/common: Use array to represent spm_sw_rsv registers
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Patch Set 1: Code-Review+2
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