coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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3018 discussions

[XL] Change in coreboot[main]: soc/meidatek/mt8196: Add SPM loader
by Ccong Chen (Code Review) 18 Dec '24

18 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Ccong Chen has posted comments on this change by Ccong Chen. ( https://review.coreboot.org/c/coreboot/+/85599?usp=email ) Change subject: soc/meidatek/mt8196: Add SPM loader ...................................................................... Patch Set 4: (2 comments) File src/soc/mediatek/common/Kconfig: https://review.coreboot.org/c/coreboot/+/85599/comment/ffedaac1_ae3d07d4?us… : PS3, Line 122: version2. This version of the chip design : has been simplified > `version 2, where the chip design is simplified compared to version 1. […] The simplified part is power on initial & bus protect initial File src/soc/mediatek/mt8196/include/soc/spm.h: https://review.coreboot.org/c/coreboot/+/85599/comment/c96ba970_56d072b5?us… : PS1, Line 201: u8 reg_apifr_mem_apsrc_req_mask_b; > You didn't answer my question. […] The original definition is wrong. It's not setting for mt8196, and this code did not run before. The current setting is the first version of mt8196 -- To view, visit https://review.coreboot.org/c/coreboot/+/85599?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie09346f46cb734c74776b760485e7f35d4357e5e Gerrit-Change-Number: 85599 Gerrit-PatchSet: 4 Gerrit-Owner: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-CC: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Wed, 18 Dec 2024 07:27:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: mb/google/brya/uldrenite: Add WWAN RW350R-GL power on sequence
by Eric Lai (Code Review) 18 Dec '24

18 Dec '24

Attention is currently required from: Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik. Eric Lai has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/85537?usp=email ) Change subject: mb/google/brya/uldrenite: Add WWAN RW350R-GL power on sequence ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85537?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If8695920c2b3d2a27da62afcbe75e70d1ea09792 Gerrit-Change-Number: 85537 Gerrit-PatchSet: 8 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 18 Dec 2024 07:25:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XL] Change in coreboot[main]: soc/meidatek/mt8196: Add SPM loader
by Yidi Lin (Code Review) 18 Dec '24

18 Dec '24

Attention is currently required from: Ccong Chen, Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Ccong Chen. ( https://review.coreboot.org/c/coreboot/+/85599?usp=email ) Change subject: soc/meidatek/mt8196: Add SPM loader ...................................................................... Patch Set 4: (1 comment) File src/soc/mediatek/mt8196/include/soc/spm.h: https://review.coreboot.org/c/coreboot/+/85599/comment/b1becaca_24d03c58?us… : PS1, Line 201: u8 reg_apifr_mem_apsrc_req_mask_b; > You didn't answer my question. […] `struct pwr_ctrl` defines the bit/fields settings written to SPM registers. It should be not harm to update here. -- To view, visit https://review.coreboot.org/c/coreboot/+/85599?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie09346f46cb734c74776b760485e7f35d4357e5e Gerrit-Change-Number: 85599 Gerrit-PatchSet: 4 Gerrit-Owner: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-CC: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Wed, 18 Dec 2024 07:23:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: mb/google/brya/uldrenite: Add WWAN RW350R-GL power on sequence
by Dtrain Hsu (Code Review) 18 Dec '24

18 Dec '24

Attention is currently required from: Eric Lai, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik. Dtrain Hsu has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/85537?usp=email ) Change subject: mb/google/brya/uldrenite: Add WWAN RW350R-GL power on sequence ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85537?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If8695920c2b3d2a27da62afcbe75e70d1ea09792 Gerrit-Change-Number: 85537 Gerrit-PatchSet: 8 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 18 Dec 2024 07:11:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/amd: Add some PSP commands
by Bao Zheng (Code Review) 18 Dec '24

18 Dec '24

Attention is currently required from: Bao Zheng, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Zheng Bao. Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Zheng Bao, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85650?usp=email to look at the new patch set (#4). Change subject: soc/amd: Add some PSP commands ...................................................................... soc/amd: Add some PSP commands Getting and setting boot partition. Toggle boot partition. Set curruption reason. Change-Id: Ia7f2eedae5b277745cb34a0761bd1a8b61441695 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/common/block/psp/Makefile.mk M src/soc/amd/common/block/psp/psp_def.h M src/soc/amd/common/block/psp/psp_gen2.c 3 files changed, 85 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/85650/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/85650?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7f2eedae5b277745cb34a0761bd1a8b61441695 Gerrit-Change-Number: 85650 Gerrit-PatchSet: 4 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[XL] Change in coreboot[main]: soc/meidatek/mt8196: Add SPM loader
by Ccong Chen (Code Review) 18 Dec '24

18 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Ccong Chen has posted comments on this change by Ccong Chen. ( https://review.coreboot.org/c/coreboot/+/85599?usp=email ) Change subject: soc/meidatek/mt8196: Add SPM loader ...................................................................... Patch Set 4: (12 comments) File src/soc/mediatek/mt8196/include/soc/spm.h: https://review.coreboot.org/c/coreboot/+/85599/comment/82c03cd9_4262ecec?us… : PS3, Line 636: u32 reserved1; > Revert these unrelated changes. Done https://review.coreboot.org/c/coreboot/+/85599/comment/854ad983_2625796f?us… : PS3, Line 690: u32 reserved12[3]; > Revert these unrelated changes. Done https://review.coreboot.org/c/coreboot/+/85599/comment/08155de4_3ec31b32?us… : PS3, Line 717: reserved16 > Why is this changed to "reserved"? spm_dpsw_con register address have been changed https://review.coreboot.org/c/coreboot/+/85599/comment/8749d8e4_756ecfa3?us… : PS3, Line 1117: u32 pcm_apwdt_latch_27; : u32 pcm_apwdt_latch_28; : u32 pcm_apwdt_latch_29; : u32 pcm_apwdt_latch_30; : u32 pcm_apwdt_latch_31; : u32 pcm_apwdt_latch_32; : u32 pcm_apwdt_latch_33; : u32 pcm_apwdt_latch_34; : u32 pcm_apwdt_latch_35; : u32 pcm_apwdt_latch_36; : u32 pcm_apwdt_latch_37; : u32 pcm_apwdt_latch_38; > `u32 pcm_apwdt_latch_27[12]` Done File src/soc/mediatek/mt8196/include/soc/spm.h: https://review.coreboot.org/c/coreboot/+/85599/comment/4373d35b_83fb2e47?us… : PS1, Line 13: 0x1c001108 > I meant defining a structure similar to `mtk_vlpcksys_regs`. Done File src/soc/mediatek/mt8196/spm.c: https://review.coreboot.org/c/coreboot/+/85599/comment/6c1a7f54_19d98660?us… : PS1, Line 738: status > Not done. Done File src/soc/mediatek/mt8196/spm.c: https://review.coreboot.org/c/coreboot/+/85599/comment/fd5f240c_f9933631?us… : PS3, Line 742: SPM_ACK_CHK_3_CON_EN); > align Done https://review.coreboot.org/c/coreboot/+/85599/comment/4834649f_59873c6c?us… : PS3, Line 744: > Remove blank line Done https://review.coreboot.org/c/coreboot/+/85599/comment/9388b2db_47f6f00a?us… : PS3, Line 753: SPM_ACK_CHK_3_CON_HW_MODE_TRIG | SPM_ACK_CHK_3_CON_CLR_ALL, > align Done https://review.coreboot.org/c/coreboot/+/85599/comment/e32db514_40dfd03b?us… : PS3, Line 816: spm_resource_ack_con > `spm_resource_ack_con[0]` Done https://review.coreboot.org/c/coreboot/+/85599/comment/75f4cfab_95a0dcc1?us… : PS3, Line 827: spm_resource_ack_con > `spm_resource_ack_con[0]` Done https://review.coreboot.org/c/coreboot/+/85599/comment/b9e6b649_fff69979?us… : PS3, Line 835: ( > remove Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85599?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie09346f46cb734c74776b760485e7f35d4357e5e Gerrit-Change-Number: 85599 Gerrit-PatchSet: 4 Gerrit-Owner: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-CC: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Wed, 18 Dec 2024 07:06:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[XL] Change in coreboot[main]: soc/meidatek/mt8196: Add SPM loader
by Ccong Chen (Code Review) 18 Dec '24

18 Dec '24

Attention is currently required from: Ccong Chen, Hung-Te Lin, Jarried Lin. Hello Hung-Te Lin, Wenzhen Yu, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85599?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: soc/meidatek/mt8196: Add SPM loader ...................................................................... soc/meidatek/mt8196: Add SPM loader This patch adds support for loading SPM firmware from CBFS to SPM SRAM. SPM needs its own firmware to enable SPM suspend/resume function which turns off several resources such as DRAM/mainpll/26M clk when linux system suspend. coreboot log: CBFS: Found 'spm_firmware.pm' @0xadf00 size 0x5a60 in mcache @0xfffdd3c mtk_init_mcu: Loaded (and reset) spm_firmware.pm in 3 msecs (30080 byt) TEST=build pass BUG=348147674 Change-Id: Ie09346f46cb734c74776b760485e7f35d4357e5e Signed-off-by: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/common/Kconfig M src/soc/mediatek/common/spm.c M src/soc/mediatek/mt8196/Kconfig M src/soc/mediatek/mt8196/Makefile.mk M src/soc/mediatek/mt8196/include/soc/addressmap.h M src/soc/mediatek/mt8196/include/soc/pll.h M src/soc/mediatek/mt8196/include/soc/spm.h A src/soc/mediatek/mt8196/spm.c 8 files changed, 1,350 insertions(+), 173 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/85599/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/85599?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie09346f46cb734c74776b760485e7f35d4357e5e Gerrit-Change-Number: 85599 Gerrit-PatchSet: 4 Gerrit-Owner: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-CC: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[M] Change in coreboot[main]: soc/intel/alderlake: Add function to force disable memory channels
by Jamie Chen (Code Review) 18 Dec '24

18 Dec '24

Attention is currently required from: Christian Walter, Dinesh Gehlot, Eric Lai, Jayvik Desai, Jeremy Soller, Kapil Porwal, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Paul Menzel, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford. Jamie Chen has posted comments on this change by Kapil Porwal. ( https://review.coreboot.org/c/coreboot/+/85529?usp=email ) Change subject: soc/intel/alderlake: Add function to force disable memory channels ...................................................................... Patch Set 7: (1 comment) File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/85529/comment/28c38b0f_1c92b76a?us… : PS1, Line 252: if (ch_disable_mask == 0) { > Are these combinations valid? […] >Are these combinations valid? > >Mc0Ch1 >Mc0Ch3 Invalid. >I wonder if the channels are grouped in pairs (0+1 and 2+3), and the first >channel of a group must be enabled if the group is in use. One LP5/x DRAM chip usually has two 16 bits channels. We can connect Mc0Ch0-1 to one DRAM chip and connect Mc0Ch2-3 to another DRAM chip. >Per my test, the four combinations are valid. >I also tried Mc0Ch0+Mc0Ch1+Mc0Ch2 and Mc0Ch0+Mc0Ch2+Mc0Ch3 combinations are work >as well. >It looks like the first channel of every dram chip must be turn on. > >I will check with internal team if it is a necessary condition? After consulting our memory expert, the first channel of DRAM chip must be connected. -- To view, visit https://review.coreboot.org/c/coreboot/+/85529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Gerrit-Change-Number: 85529 Gerrit-PatchSet: 7 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 18 Dec 2024 06:48:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <ericllai(a)google.com> Comment-In-Reply-To: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[S] Change in coreboot[main]: mb/google/brya/uldrenite: Add WWAN RW350R-GL power on sequence
by Dinesh Gehlot (Code Review) 18 Dec '24

18 Dec '24

Attention is currently required from: Dtrain Hsu, Eric Lai, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik. Dinesh Gehlot has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/85537?usp=email ) Change subject: mb/google/brya/uldrenite: Add WWAN RW350R-GL power on sequence ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85537?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If8695920c2b3d2a27da62afcbe75e70d1ea09792 Gerrit-Change-Number: 85537 Gerrit-PatchSet: 8 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 18 Dec 2024 06:15:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/amd: Add some PSP commands
by Bao Zheng (Code Review) 18 Dec '24

18 Dec '24

Attention is currently required from: Bao Zheng, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Zheng Bao. Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Zheng Bao, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85650?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: soc/amd: Add some PSP commands ...................................................................... soc/amd: Add some PSP commands Add getting and setting boot partition. Add toggle boot partition. Change-Id: Ia7f2eedae5b277745cb34a0761bd1a8b61441695 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/common/block/psp/Makefile.mk M src/soc/amd/common/block/psp/psp_def.h M src/soc/amd/common/block/psp/psp_gen2.c M src/soc/amd/glinda/Kconfig M src/soc/amd/glinda/Makefile.mk M src/soc/amd/phoenix/Kconfig M src/soc/amd/phoenix/Makefile.mk 7 files changed, 131 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/85650/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85650?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7f2eedae5b277745cb34a0761bd1a8b61441695 Gerrit-Change-Number: 85650 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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coreboot-gerrit December 2024