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[S] Change in coreboot[main]: mb/qemu-i440fx: refactor fw_cfg logic as separate driver
by Carlos López (Code Review) 19 Dec '24

19 Dec '24

Carlos López has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85673?usp=email ) Change subject: mb/qemu-i440fx: refactor fw_cfg logic as separate driver ...................................................................... mb/qemu-i440fx: refactor fw_cfg logic as separate driver The fw_cfg device can be used by other qemu boards outside i440fx (and q35, which manually includes the code). Factor out the fw_cfg code as a separate driver that qemu mainboards can enable. Change-Id: I8c5c4cb5f5478abd21aab8e8d0b503db41d81d40 Signed-off-by: Carlos López <carlos.lopez(a)openchip.com> --- M src/drivers/emulation/qemu/Kconfig M src/drivers/emulation/qemu/Makefile.mk R src/drivers/emulation/qemu/fw_cfg.c R src/include/device/fw_cfg.h R src/include/device/fw_cfg_if.h M src/mainboard/emulation/qemu-i440fx/Kconfig M src/mainboard/emulation/qemu-i440fx/Makefile.mk M src/mainboard/emulation/qemu-i440fx/bootmode.c M src/mainboard/emulation/qemu-i440fx/memmap.c M src/mainboard/emulation/qemu-i440fx/northbridge.c M src/mainboard/emulation/qemu-q35/Kconfig M src/mainboard/emulation/qemu-q35/Makefile.mk M src/mainboard/emulation/qemu-q35/acpi_tables.c M src/mainboard/emulation/qemu-q35/cpu.c M src/mainboard/emulation/qemu-q35/memmap.c 15 files changed, 23 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/85673/1 diff --git a/src/drivers/emulation/qemu/Kconfig b/src/drivers/emulation/qemu/Kconfig index 5b01ae7..cab0694 100644 --- a/src/drivers/emulation/qemu/Kconfig +++ b/src/drivers/emulation/qemu/Kconfig @@ -35,3 +35,9 @@ default 600 depends on LINEAR_FRAMEBUFFER depends on DRIVERS_EMULATION_QEMU_BOCHS || DRIVERS_EMULATION_QEMU_CIRRUS + +config DRIVERS_EMULATION_QEMU_FW_CFG + bool "qemu fw_cfg" + default n + help + qemu fw_cfg driver diff --git a/src/drivers/emulation/qemu/Makefile.mk b/src/drivers/emulation/qemu/Makefile.mk index 619782f..76bd864 100644 --- a/src/drivers/emulation/qemu/Makefile.mk +++ b/src/drivers/emulation/qemu/Makefile.mk @@ -7,3 +7,9 @@ ramstage-$(CONFIG_DRIVERS_EMULATION_QEMU_BOCHS) += bochs.c ramstage-$(CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS) += cirrus.c + +bootblock-$(CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG) += fw_cfg.c +romstage-$(CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG) += fw_cfg.c +verstage-$(CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG) += fw_cfg.c +postcar-$(CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG) += fw_cfg.c +ramstage-$(CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG) += fw_cfg.c diff --git a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c b/src/drivers/emulation/qemu/fw_cfg.c similarity index 99% rename from src/mainboard/emulation/qemu-i440fx/fw_cfg.c rename to src/drivers/emulation/qemu/fw_cfg.c index ad664a6..3725419 100644 --- a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c +++ b/src/drivers/emulation/qemu/fw_cfg.c @@ -8,9 +8,8 @@ #include <arch/io.h> #include <acpi/acpi.h> #include <commonlib/endian.h> - -#include "fw_cfg.h" -#include "fw_cfg_if.h" +#include <device/fw_cfg.h> +#include <device/fw_cfg_if.h> #define FW_CFG_PORT_CTL 0x0510 #define FW_CFG_PORT_DATA 0x0511 diff --git a/src/mainboard/emulation/qemu-i440fx/fw_cfg.h b/src/include/device/fw_cfg.h similarity index 100% rename from src/mainboard/emulation/qemu-i440fx/fw_cfg.h rename to src/include/device/fw_cfg.h diff --git a/src/mainboard/emulation/qemu-i440fx/fw_cfg_if.h b/src/include/device/fw_cfg_if.h similarity index 100% rename from src/mainboard/emulation/qemu-i440fx/fw_cfg_if.h rename to src/include/device/fw_cfg_if.h diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig index 6d6181c..e17e25d 100644 --- a/src/mainboard/emulation/qemu-i440fx/Kconfig +++ b/src/mainboard/emulation/qemu-i440fx/Kconfig @@ -20,6 +20,7 @@ select BOOT_DEVICE_NOT_SPI_FLASH select BOOT_DEVICE_MEMORY_MAPPED select BOOT_DEVICE_SUPPORTS_WRITES + select DRIVERS_EMULATION_QEMU_FW_CFG config VBOOT select VBOOT_MUST_REQUEST_DISPLAY diff --git a/src/mainboard/emulation/qemu-i440fx/Makefile.mk b/src/mainboard/emulation/qemu-i440fx/Makefile.mk index 6ff2f73..c20f427 100644 --- a/src/mainboard/emulation/qemu-i440fx/Makefile.mk +++ b/src/mainboard/emulation/qemu-i440fx/Makefile.mk @@ -9,5 +9,4 @@ ramstage-y += northbridge.c ramstage-y += rom_media.c -all-y += fw_cfg.c all-y += bootmode.c diff --git a/src/mainboard/emulation/qemu-i440fx/bootmode.c b/src/mainboard/emulation/qemu-i440fx/bootmode.c index 12990b2..ce06478 100644 --- a/src/mainboard/emulation/qemu-i440fx/bootmode.c +++ b/src/mainboard/emulation/qemu-i440fx/bootmode.c @@ -2,7 +2,7 @@ #include <bootmode.h> #include <console/console.h> -#include "fw_cfg.h" +#include <device/fw_cfg.h> /* * Enable recovery mode with fw_cfg option to qemu: diff --git a/src/mainboard/emulation/qemu-i440fx/memmap.c b/src/mainboard/emulation/qemu-i440fx/memmap.c index be730b7..a8033f2 100644 --- a/src/mainboard/emulation/qemu-i440fx/memmap.c +++ b/src/mainboard/emulation/qemu-i440fx/memmap.c @@ -5,8 +5,8 @@ #include <arch/romstage.h> #include <console/console.h> #include <cpu/x86/smm.h> +#include <device/fw_cfg.h> #include "memory.h" -#include "fw_cfg.h" #define CMOS_ADDR_PORT 0x70 #define CMOS_DATA_PORT 0x71 diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index 609e389..5c8636c 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -9,15 +9,14 @@ #include <device/pci_def.h> #include <device/pci_ops.h> #include <device/device.h> +#include <device/fw_cfg.h> +#include <device/fw_cfg_if.h> #include <identity.h> #include <stdlib.h> #include <smbios.h> #include <types.h> #include "memory.h" -#include "fw_cfg.h" -#include "fw_cfg_if.h" - #include "acpi.h" static void qemu_reserve_ports(struct device *dev, unsigned int idx, diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig index 70a7437..854c053 100644 --- a/src/mainboard/emulation/qemu-q35/Kconfig +++ b/src/mainboard/emulation/qemu-q35/Kconfig @@ -18,6 +18,7 @@ select BOOT_DEVICE_NOT_SPI_FLASH select BOOT_DEVICE_MEMORY_MAPPED select BOOT_DEVICE_SUPPORTS_WRITES + select DRIVERS_EMULATION_QEMU_FW_CFG config VBOOT select VBOOT_MUST_REQUEST_DISPLAY diff --git a/src/mainboard/emulation/qemu-q35/Makefile.mk b/src/mainboard/emulation/qemu-q35/Makefile.mk index c1619f5..fc85e64 100644 --- a/src/mainboard/emulation/qemu-q35/Makefile.mk +++ b/src/mainboard/emulation/qemu-q35/Makefile.mk @@ -16,7 +16,6 @@ ramstage-y += memmap.c ramstage-y += cpu.c -all-y += ../qemu-i440fx/fw_cfg.c all-y += ../qemu-i440fx/bootmode.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c diff --git a/src/mainboard/emulation/qemu-q35/acpi_tables.c b/src/mainboard/emulation/qemu-q35/acpi_tables.c index e85ce65..c1c483d 100644 --- a/src/mainboard/emulation/qemu-q35/acpi_tables.c +++ b/src/mainboard/emulation/qemu-q35/acpi_tables.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> +#include <device/fw_cfg.h> -#include "../qemu-i440fx/fw_cfg.h" #include "../qemu-i440fx/acpi.h" void mainboard_fill_fadt(acpi_fadt_t *fadt) diff --git a/src/mainboard/emulation/qemu-q35/cpu.c b/src/mainboard/emulation/qemu-q35/cpu.c index c57ec50..c30c833 100644 --- a/src/mainboard/emulation/qemu-q35/cpu.c +++ b/src/mainboard/emulation/qemu-q35/cpu.c @@ -7,7 +7,7 @@ #include <cpu/x86/legacy_save_state.h> #include <cpu/x86/mp.h> #include <cpu/x86/smm.h> -#include <mainboard/emulation/qemu-i440fx/fw_cfg.h> +#include <device/fw_cfg.h> #include <stddef.h> #include <stdint.h> diff --git a/src/mainboard/emulation/qemu-q35/memmap.c b/src/mainboard/emulation/qemu-q35/memmap.c index d57b25c..3e8da5c 100644 --- a/src/mainboard/emulation/qemu-q35/memmap.c +++ b/src/mainboard/emulation/qemu-q35/memmap.c @@ -5,9 +5,9 @@ #include <assert.h> #include <console/console.h> #include <cpu/x86/smm.h> +#include <device/fw_cfg.h> #include <device/pci_ops.h> #include <mainboard/emulation/qemu-i440fx/memory.h> -#include <mainboard/emulation/qemu-i440fx/fw_cfg.h> #include <cpu/intel/smm_reloc.h> #include "q35.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/85673?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8c5c4cb5f5478abd21aab8e8d0b503db41d81d40 Gerrit-Change-Number: 85673 Gerrit-PatchSet: 1 Gerrit-Owner: Carlos López <carlos.lopezr4096(a)gmail.com>

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[XS] Change in coreboot[main]: mb/qemu-riscv: set PCI_IOBASE
by Carlos López (Code Review) 19 Dec '24

19 Dec '24

Carlos López has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/85670?usp=email ) Change subject: mb/qemu-riscv: set PCI_IOBASE ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/85670?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ied7d7e815348afa68a92c3dda30be64163231615 Gerrit-Change-Number: 85670 Gerrit-PatchSet: 1 Gerrit-Owner: Carlos López <carlos.lopezr4096(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com>

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[S] Change in coreboot[main]: mb/qemu-i440fx: refactor fw_cfg logic as separate driver
by Carlos López (Code Review) 19 Dec '24

19 Dec '24

Carlos López has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/85668?usp=email ) Change subject: mb/qemu-i440fx: refactor fw_cfg logic as separate driver ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/85668?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6b1e6a280b2dbdcca632b473750e052f82d1364f Gerrit-Change-Number: 85668 Gerrit-PatchSet: 1 Gerrit-Owner: Carlos López <carlos.lopezr4096(a)gmail.com>

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[M] Change in coreboot[main]: mb/qemu-riscv: enable vboot
by Carlos López (Code Review) 19 Dec '24

19 Dec '24

Carlos López has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/85672?usp=email ) Change subject: mb/qemu-riscv: enable vboot ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/85672?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9915d47aee1c4f68a7db6a83b88835685d52af0c Gerrit-Change-Number: 85672 Gerrit-PatchSet: 1 Gerrit-Owner: Carlos López <carlos.lopezr4096(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com>

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[XS] Change in coreboot[main]: vboot: update submodule to upstream main
by Carlos López (Code Review) 19 Dec '24

19 Dec '24

Carlos López has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/85671?usp=email ) Change subject: vboot: update submodule to upstream main ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/85671?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I54c3e7fbda83940dfdb97e033069c6f7fd873988 Gerrit-Change-Number: 85671 Gerrit-PatchSet: 1 Gerrit-Owner: Carlos López <carlos.lopezr4096(a)gmail.com>

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[L] Change in coreboot[main]: mb/qemu-i440fx: refactor qemu flash logic as a separate driver
by Carlos López (Code Review) 19 Dec '24

19 Dec '24

Carlos López has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/85669?usp=email ) Change subject: mb/qemu-i440fx: refactor qemu flash logic as a separate driver ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/85669?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If9df9114be3ed83e6157fce7dbc2a1df21d7782b Gerrit-Change-Number: 85669 Gerrit-PatchSet: 1 Gerrit-Owner: Carlos López <carlos.lopezr4096(a)gmail.com>

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[M] Change in coreboot[main]: mb/qemu-riscv: enable vboot
by Carlos López (Code Review) 19 Dec '24

19 Dec '24

Attention is currently required from: Maximilian Brune, Philipp Hug, ron minnich. Carlos López has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85672?usp=email ) Change subject: mb/qemu-riscv: enable vboot ...................................................................... mb/qemu-riscv: enable vboot Add the option to enable vboot for the qemu-riscv board. In order to do this, enable the qemu boot device driver, so that vboot is able to store and modify data in flash, as well as the fw_cfg driver. Additionally, add FMD files to describe the two different vboot FMAP configurations (A or A + B), and update the memory layout in the linker script to acommodate for the VBOOT2_WORK buffer. TEST=boot verified with qemu-system-riscv64 + OpenSBI Change-Id: I9915d47aee1c4f68a7db6a83b88835685d52af0c Signed-off-by: Carlos López <carlos.lopez(a)openchip.com> --- M src/mainboard/emulation/qemu-riscv/Kconfig M src/mainboard/emulation/qemu-riscv/Makefile.mk M src/mainboard/emulation/qemu-riscv/memlayout.ld M src/mainboard/emulation/qemu-riscv/rom_media.c A src/mainboard/emulation/qemu-riscv/vboot-rwa.fmd A src/mainboard/emulation/qemu-riscv/vboot-rwab.fmd 6 files changed, 68 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/85672/1 diff --git a/src/mainboard/emulation/qemu-riscv/Kconfig b/src/mainboard/emulation/qemu-riscv/Kconfig index 2361e25..ac9bde6 100644 --- a/src/mainboard/emulation/qemu-riscv/Kconfig +++ b/src/mainboard/emulation/qemu-riscv/Kconfig @@ -35,6 +35,17 @@ select ARCH_ROMSTAGE_RISCV select ARCH_RAMSTAGE_RISCV select RISCV_USE_ARCH_TIMER + select BOOT_DEVICE_MEMORY_MAPPED + select DRIVERS_EMULATION_QEMU_FW_CFG + select DRIVERS_EMULATION_QEMU_BOOT_DEVICE + +config VBOOT + select VBOOT_STARTS_IN_BOOTBLOCK + select VBOOT_VBNV_FLASH + +config FMDFILE + default "src/mainboard/emulation/qemu-riscv/vboot-rwa.fmd" if VBOOT_SLOTS_RW_A && !VBOOT_SLOTS_RW_AB + default "src/mainboard/emulation/qemu-riscv/vboot-rwab.fmd" if VBOOT_SLOTS_RW_AB config MEMLAYOUT_LD_FILE string diff --git a/src/mainboard/emulation/qemu-riscv/Makefile.mk b/src/mainboard/emulation/qemu-riscv/Makefile.mk index bed0f80..55e6e79 100644 --- a/src/mainboard/emulation/qemu-riscv/Makefile.mk +++ b/src/mainboard/emulation/qemu-riscv/Makefile.mk @@ -18,4 +18,6 @@ ramstage-y += cbmem.c ramstage-y += chip.c +all-y += ../qemu-i440fx/bootmode.c + CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld index 9c16496..e02c335 100644 --- a/src/mainboard/emulation/qemu-riscv/memlayout.ld +++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld @@ -16,5 +16,8 @@ PRERAM_CBMEM_CONSOLE(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M, 8K) FMAP_CACHE(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M + 8K, 2K) CBFS_MCACHE(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M + 8K + 2K, 10K) - STACK(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M + 8K + 2K + 10K, 4M) +#if CONFIG(VBOOT_STARTS_IN_BOOTBLOCK) + VBOOT2_WORK(QEMU_VIRT_DRAM + 128K + 256K + 256K + 2M + 8K + 2K + 10K, VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE) +#endif + STACK(QEMU_VIRT_DRAM + 4M, 4M) } diff --git a/src/mainboard/emulation/qemu-riscv/rom_media.c b/src/mainboard/emulation/qemu-riscv/rom_media.c index 3c636ce..531bca8 100644 --- a/src/mainboard/emulation/qemu-riscv/rom_media.c +++ b/src/mainboard/emulation/qemu-riscv/rom_media.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <boot_device.h> +#include <device/qemu_boot_device.h> #include <symbols.h> #include <mainboard/addressmap.h> @@ -10,3 +11,8 @@ { return &boot_dev.rdev; } + +void *qemu_boot_device_addr(void) +{ + return (void *)QEMU_VIRT_FLASH; +} diff --git a/src/mainboard/emulation/qemu-riscv/vboot-rwa.fmd b/src/mainboard/emulation/qemu-riscv/vboot-rwa.fmd new file mode 100644 index 0000000..741d4ba --- /dev/null +++ b/src/mainboard/emulation/qemu-riscv/vboot-rwa.fmd @@ -0,0 +1,20 @@ +FLASH@0 0x02000000 { + BIOS@0 0x02000000 { + WP_RO { + BOOTBLOCK 128K + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + RW_SECTION_A 0x1c0000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS) + RW_FWID_A 0x40 + } + + RW_VPD(PRESERVE) 0x1000 + RW_NVRAM(PRESERVE) 0x6000 + } +} diff --git a/src/mainboard/emulation/qemu-riscv/vboot-rwab.fmd b/src/mainboard/emulation/qemu-riscv/vboot-rwab.fmd new file mode 100644 index 0000000..af4c8ea --- /dev/null +++ b/src/mainboard/emulation/qemu-riscv/vboot-rwab.fmd @@ -0,0 +1,25 @@ +FLASH@0 0x02000000 { + BIOS@0 0x02000000 { + WP_RO { + BOOTBLOCK 128K + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + RW_SECTION_A 0x1c0000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS) + RW_FWID_A 0x40 + } + RW_SECTION_B 0x1c0000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS) + RW_FWID_B 0x40 + } + + RW_VPD(PRESERVE) 0x1000 + RW_NVRAM(PRESERVE) 0x6000 + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/85672?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9915d47aee1c4f68a7db6a83b88835685d52af0c Gerrit-Change-Number: 85672 Gerrit-PatchSet: 1 Gerrit-Owner: Carlos López <carlos.lopezr4096(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com>

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[XS] Change in coreboot[main]: vboot: update submodule to upstream main
by Carlos López (Code Review) 19 Dec '24

19 Dec '24

Carlos López has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85671?usp=email ) Change subject: vboot: update submodule to upstream main ...................................................................... vboot: update submodule to upstream main Updating from commit f1f70f46 to 3f94e2c7. This brings, among other things, the ability to build vboot for RISC-V. Change-Id: I54c3e7fbda83940dfdb97e033069c6f7fd873988 Signed-off-by: Carlos López <carlos.lopez(a)openchip.com> --- M 3rdparty/vboot 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/85671/1 diff --git a/3rdparty/vboot b/3rdparty/vboot index f1f70f4..3f94e2c 160000 --- a/3rdparty/vboot +++ b/3rdparty/vboot @@ -1 +1 @@ -Subproject commit f1f70f46dc5482bb7c654e53ed58d4001e386df2 +Subproject commit 3f94e2c7ed58c4e67d6e7dc6052ec615dbbb9bb4 -- To view, visit https://review.coreboot.org/c/coreboot/+/85671?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I54c3e7fbda83940dfdb97e033069c6f7fd873988 Gerrit-Change-Number: 85671 Gerrit-PatchSet: 1 Gerrit-Owner: Carlos López <carlos.lopezr4096(a)gmail.com>

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[XS] Change in coreboot[main]: mb/qemu-riscv: set PCI_IOBASE
by Carlos López (Code Review) 19 Dec '24

19 Dec '24

1 0

[L] Change in coreboot[main]: mb/qemu-i440fx: refactor qemu flash logic as a separate driver
by Carlos López (Code Review) 19 Dec '24

19 Dec '24

Carlos López has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85669?usp=email ) Change subject: mb/qemu-i440fx: refactor qemu flash logic as a separate driver ...................................................................... mb/qemu-i440fx: refactor qemu flash logic as a separate driver The logic for read/write detection on qemu flash can be used by other qemu boards outside i440fx and q35 (the latter currently including the code manually). Factor out the logic as a separate driver that other qemu boards can enable. Boards using the driver must implement qemu_boot_device_addr(), as the address for the flash device might change depending on the architecture. Change-Id: If9df9114be3ed83e6157fce7dbc2a1df21d7782b Signed-off-by: Carlos López <carlos.lopez(a)openchip.com> --- M src/drivers/emulation/qemu/Kconfig M src/drivers/emulation/qemu/Makefile.mk A src/drivers/emulation/qemu/qemu_boot_device.c A src/include/device/qemu_boot_device.h M src/mainboard/emulation/qemu-i440fx/Kconfig M src/mainboard/emulation/qemu-i440fx/Makefile.mk M src/mainboard/emulation/qemu-i440fx/rom_media.c M src/mainboard/emulation/qemu-q35/Kconfig M src/mainboard/emulation/qemu-q35/Makefile.mk 9 files changed, 228 insertions(+), 185 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/85669/1 diff --git a/src/drivers/emulation/qemu/Kconfig b/src/drivers/emulation/qemu/Kconfig index cab0694..5fca216 100644 --- a/src/drivers/emulation/qemu/Kconfig +++ b/src/drivers/emulation/qemu/Kconfig @@ -41,3 +41,12 @@ default n help qemu fw_cfg driver + +config DRIVERS_EMULATION_QEMU_BOOT_DEVICE + bool + default n + select BOOT_DEVICE_NOT_SPI_FLASH + select BOOT_DEVICE_SUPPORTS_WRITES + help + qemu boot device driver that detects whether flash is writeable or + not. diff --git a/src/drivers/emulation/qemu/Makefile.mk b/src/drivers/emulation/qemu/Makefile.mk index 76bd864..1596808 100644 --- a/src/drivers/emulation/qemu/Makefile.mk +++ b/src/drivers/emulation/qemu/Makefile.mk @@ -13,3 +13,7 @@ verstage-$(CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG) += fw_cfg.c postcar-$(CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG) += fw_cfg.c ramstage-$(CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG) += fw_cfg.c + +bootblock-$(CONFIG_DRIVERS_EMULATION_QEMU_BOOT_DEVICE) += qemu_boot_device.c +romstage-$(CONFIG_DRIVERS_EMULATION_QEMU_BOOT_DEVICE) += qemu_boot_device.c +ramstage-$(CONFIG_DRIVERS_EMULATION_QEMU_BOOT_DEVICE) += qemu_boot_device.c diff --git a/src/drivers/emulation/qemu/qemu_boot_device.c b/src/drivers/emulation/qemu/qemu_boot_device.c new file mode 100644 index 0000000..e424102 --- /dev/null +++ b/src/drivers/emulation/qemu/qemu_boot_device.c @@ -0,0 +1,197 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* Inspired by OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlash.c from edk2 */ + +#include <arch/mmio.h> +#include <boot_device.h> +#include <console/console.h> +#include <commonlib/helpers.h> +#include <commonlib/region.h> +#include <device/qemu_boot_device.h> +#include <string.h> + +#define WRITE_BYTE_CMD 0x10 +#define BLOCK_ERASE_CMD 0x20 +#define CLEAR_STATUS_CMD 0x50 +#define READ_STATUS_CMD 0x70 +#define BLOCK_ERASE_CONFIRM_CMD 0xD0 +#define READ_ARRAY_CMD 0xFF + +#define CLEARED_ARRAY_STATUS 0x00 + +#define QEMU_FLASH_BLOCK_SIZE 0x1000 + +static ssize_t qemu_writeat(const struct region_device *rd, const void *b, + size_t offset, size_t size) +{ + const struct mem_region_device *mdev; + size_t i; + volatile char *ptr; + const char *buf = b; + + mdev = container_of(rd, __typeof__(*mdev), rdev); + ptr = &mdev->base[offset]; + + for (i = 0; i < size; i++) { + write8(ptr, WRITE_BYTE_CMD); + write8(ptr, buf[i]); + ptr++; + } + + /* Restore flash to read mode. */ + if (size > 0) { + write8(ptr - 1, READ_ARRAY_CMD); + } + + return size; +} + +static ssize_t qemu_eraseat(const struct region_device *rd, size_t offset, + size_t size) +{ + const struct mem_region_device *mdev; + size_t i; + volatile char *ptr; + + mdev = container_of(rd, __typeof__(*mdev), rdev); + ptr = &mdev->base[offset]; + + if (!IS_ALIGNED(offset, QEMU_FLASH_BLOCK_SIZE)) { + printk(BIOS_ERR, "%s: erased offset isn't multiple of block size\n", + __func__); + return -1; + } + + if (!IS_ALIGNED(size, QEMU_FLASH_BLOCK_SIZE)) { + printk(BIOS_ERR, "%s: erased size isn't multiple of block size\n", + __func__); + return -1; + } + + for (i = 0; i < size; i += QEMU_FLASH_BLOCK_SIZE) { + write8(ptr, BLOCK_ERASE_CMD); + write8(ptr, BLOCK_ERASE_CONFIRM_CMD); + ptr += QEMU_FLASH_BLOCK_SIZE; + } + + /* Restore flash to read mode. */ + if (size > 0) { + write8(ptr - QEMU_FLASH_BLOCK_SIZE, READ_ARRAY_CMD); + } + + return size; +} + +static struct region_device_ops flash_ops; +static struct mem_region_device boot_dev = + MEM_REGION_DEV_INIT(NULL, CONFIG_ROM_SIZE, &flash_ops); + +/* + * Depending on how firmware image was passed to QEMU, it may behave as: + * + * - ROM - memory mapped reads, writes are ignored (FW image mounted with + * '-bios'); + * - RAM - memory mapped reads and writes (FW image mounted with e.g. + * '-device loader'); + * - flash - memory mapped reads, write and erase possible through commands. + * Contrary to physical flash devices erase is not required before writing, + * but it also doesn't hurt. Flash may be split into read-only and read-write + * parts, like OVMF_CODE.fd and OVMF_VARS.fd. Maximal combined size of system + * firmware is hardcoded (QEMU < 5.0.0) or set by default to 8 MiB. On QEMU + * version 5.0.0 or newer, it is configurable with `max-fw-size` machine + * configuration option, up to 16 MiB to not overlap with IOAPIC memory range + * (FW image(s) mounted with '-drive if=pflash'). + * + * This function detects which of the above applies and fills region_device_ops + * accordingly. + */ +void boot_device_init(void) +{ + volatile char *ptr; + char original, readback; + static bool initialized = false; + + if (initialized) + return; + + boot_dev.base = qemu_boot_device_addr(); + + /* + * mmap, munmap and readat are always identical to mem_rdev_rw_ops, other + * functions may vary. + */ + flash_ops = mem_rdev_rw_ops; + + /* + * Find first byte different than any of the commands, simplified. + * + * Detection code few lines below writes commands and tries to read back + * the response. To make that code simpler, make sure that original byte + * is different than any of the commands or expected responses. It is + * expected that such byte will always be found - it is virtually + * impossible to write valid x86 code with just bytes ending with 0, and + * there are also ASCII characters in metadata (CBFS, FMAP) that has bytes + * matching those assumptions. + */ + ptr = (volatile char *)boot_dev.base; + original = read8(ptr); + while (original == (char)0xFF || (original & 0x0F) == 0) + original = read8(++ptr); + + /* + * Detect what type of flash we're dealing with. This also clears any stale + * status bits, so the next read of status register should return known + * value (if pflash is used). + */ + write8(ptr, CLEAR_STATUS_CMD); + readback = read8(ptr); + if (readback == CLEAR_STATUS_CMD) { + printk(BIOS_DEBUG, "QEMU flash behaves as RAM\n"); + /* Restore original content. */ + write8(ptr, original); + } else { + /* Either ROM or QEMU flash implementation. */ + write8(ptr, READ_STATUS_CMD); + readback = read8(ptr); + if (readback == original) { + printk(BIOS_DEBUG, "QEMU flash behaves as ROM\n"); + /* ROM means no writing nor erasing. */ + flash_ops.writeat = NULL; + flash_ops.eraseat = NULL; + } else if (readback == CLEARED_ARRAY_STATUS) { + /* Try writing original value to test whether flash is writable. */ + write8(ptr, WRITE_BYTE_CMD); + write8(ptr, original); + write8(ptr, READ_STATUS_CMD); + readback = read8(ptr); + if (readback & 0x10 /* programming error */) { + printk(BIOS_DEBUG, + "QEMU flash behaves as write-protected flash\n"); + flash_ops.writeat = NULL; + flash_ops.eraseat = NULL; + } else { + printk(BIOS_DEBUG, "QEMU flash behaves as writable flash\n"); + flash_ops.writeat = qemu_writeat; + flash_ops.eraseat = qemu_eraseat; + } + /* Restore flash to read mode. */ + write8(ptr, READ_ARRAY_CMD); + } else { + printk(BIOS_ERR, "Unexpected QEMU flash behavior, assuming ROM\n"); + /* + * This shouldn't happen and first byte of flash may already be + * corrupted by testing, but don't take any further risk. + */ + flash_ops.writeat = NULL; + flash_ops.eraseat = NULL; + } + } + + initialized = true; +} + +/* boot_device_ro() must be defined somewhere else for earlier stages */ +const struct region_device *boot_device_rw(void) +{ + return &boot_dev.rdev; +} diff --git a/src/include/device/qemu_boot_device.h b/src/include/device/qemu_boot_device.h new file mode 100644 index 0000000..4dfded3 --- /dev/null +++ b/src/include/device/qemu_boot_device.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef DEVICE_QEMU_BOOT_DEVICE_H +#define DEVICE_QEMU_BOOT_DEVICE_H + +void *qemu_boot_device_addr(void); + +#endif /* DEVICE_QEMU_BOOT_DEVICE_H */ diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig index e17e25d..99c3cf3 100644 --- a/src/mainboard/emulation/qemu-i440fx/Kconfig +++ b/src/mainboard/emulation/qemu-i440fx/Kconfig @@ -17,9 +17,8 @@ select MAINBOARD_FORCE_NATIVE_VGA_INIT select HAVE_ASAN_IN_ROMSTAGE select NO_SMM - select BOOT_DEVICE_NOT_SPI_FLASH select BOOT_DEVICE_MEMORY_MAPPED - select BOOT_DEVICE_SUPPORTS_WRITES + select DRIVERS_EMULATION_QEMU_BOOT_DEVICE select DRIVERS_EMULATION_QEMU_FW_CFG config VBOOT diff --git a/src/mainboard/emulation/qemu-i440fx/Makefile.mk b/src/mainboard/emulation/qemu-i440fx/Makefile.mk index c20f427..6dba57a 100644 --- a/src/mainboard/emulation/qemu-i440fx/Makefile.mk +++ b/src/mainboard/emulation/qemu-i440fx/Makefile.mk @@ -1,6 +1,9 @@ ## SPDX-License-Identifier: GPL-2.0-only +bootblock-y += rom_media.c + romstage-y += memmap.c +romstage-y += rom_media.c postcar-y += memmap.c postcar-y += exit_car.S diff --git a/src/mainboard/emulation/qemu-i440fx/rom_media.c b/src/mainboard/emulation/qemu-i440fx/rom_media.c index f4fd3c3..e7e3f6c 100644 --- a/src/mainboard/emulation/qemu-i440fx/rom_media.c +++ b/src/mainboard/emulation/qemu-i440fx/rom_media.c @@ -7,19 +7,9 @@ #include <console/console.h> #include <commonlib/helpers.h> #include <commonlib/region.h> +#include <device/qemu_boot_device.h> #include <string.h> -#define WRITE_BYTE_CMD 0x10 -#define BLOCK_ERASE_CMD 0x20 -#define CLEAR_STATUS_CMD 0x50 -#define READ_STATUS_CMD 0x70 -#define BLOCK_ERASE_CONFIRM_CMD 0xD0 -#define READ_ARRAY_CMD 0xFF - -#define CLEARED_ARRAY_STATUS 0x00 - -#define QEMU_FLASH_BLOCK_SIZE 0x1000 - #if CONFIG(ELOG) #include <southbridge/intel/common/pmutil.h> @@ -35,175 +25,7 @@ void pch_log_state(void) {} #endif -static ssize_t qemu_writeat(const struct region_device *rd, const void *b, - size_t offset, size_t size) +void *qemu_boot_device_addr(void) { - const struct mem_region_device *mdev; - size_t i; - volatile char *ptr; - const char *buf = b; - - mdev = container_of(rd, __typeof__(*mdev), rdev); - ptr = &mdev->base[offset]; - - for (i = 0; i < size; i++) { - write8(ptr, WRITE_BYTE_CMD); - write8(ptr, buf[i]); - ptr++; - } - - /* Restore flash to read mode. */ - if (size > 0) { - write8(ptr - 1, READ_ARRAY_CMD); - } - - return size; -} - -static ssize_t qemu_eraseat(const struct region_device *rd, size_t offset, - size_t size) -{ - const struct mem_region_device *mdev; - size_t i; - volatile char *ptr; - - mdev = container_of(rd, __typeof__(*mdev), rdev); - ptr = &mdev->base[offset]; - - if (!IS_ALIGNED(offset, QEMU_FLASH_BLOCK_SIZE)) { - printk(BIOS_ERR, "%s: erased offset isn't multiple of block size\n", - __func__); - return -1; - } - - if (!IS_ALIGNED(size, QEMU_FLASH_BLOCK_SIZE)) { - printk(BIOS_ERR, "%s: erased size isn't multiple of block size\n", - __func__); - return -1; - } - - for (i = 0; i < size; i += QEMU_FLASH_BLOCK_SIZE) { - write8(ptr, BLOCK_ERASE_CMD); - write8(ptr, BLOCK_ERASE_CONFIRM_CMD); - ptr += QEMU_FLASH_BLOCK_SIZE; - } - - /* Restore flash to read mode. */ - if (size > 0) { - write8(ptr - QEMU_FLASH_BLOCK_SIZE, READ_ARRAY_CMD); - } - - return size; -} - -static struct region_device_ops flash_ops; -static const struct mem_region_device boot_dev = - MEM_REGION_DEV_INIT(0x100000000ULL - CONFIG_ROM_SIZE, CONFIG_ROM_SIZE, &flash_ops); - -/* - * Depending on how firmware image was passed to QEMU, it may behave as: - * - * - ROM - memory mapped reads, writes are ignored (FW image mounted with - * '-bios'); - * - RAM - memory mapped reads and writes (FW image mounted with e.g. - * '-device loader'); - * - flash - memory mapped reads, write and erase possible through commands. - * Contrary to physical flash devices erase is not required before writing, - * but it also doesn't hurt. Flash may be split into read-only and read-write - * parts, like OVMF_CODE.fd and OVMF_VARS.fd. Maximal combined size of system - * firmware is hardcoded (QEMU < 5.0.0) or set by default to 8 MiB. On QEMU - * version 5.0.0 or newer, it is configurable with `max-fw-size` machine - * configuration option, up to 16 MiB to not overlap with IOAPIC memory range - * (FW image(s) mounted with '-drive if=pflash'). - * - * This function detects which of the above applies and fills region_device_ops - * accordingly. - */ -void boot_device_init(void) -{ - volatile char *ptr; - char original, readback; - static bool initialized = false; - - if (initialized) - return; - - /* - * mmap, munmap and readat are always identical to mem_rdev_rw_ops, other - * functions may vary. - */ - flash_ops = mem_rdev_rw_ops; - - /* - * Find first byte different than any of the commands, simplified. - * - * Detection code few lines below writes commands and tries to read back - * the response. To make that code simpler, make sure that original byte - * is different than any of the commands or expected responses. It is - * expected that such byte will always be found - it is virtually - * impossible to write valid x86 code with just bytes ending with 0, and - * there are also ASCII characters in metadata (CBFS, FMAP) that has bytes - * matching those assumptions. - */ - ptr = (volatile char *)boot_dev.base; - original = read8(ptr); - while (original == (char)0xFF || (original & 0x0F) == 0) - original = read8(++ptr); - - /* - * Detect what type of flash we're dealing with. This also clears any stale - * status bits, so the next read of status register should return known - * value (if pflash is used). - */ - write8(ptr, CLEAR_STATUS_CMD); - readback = read8(ptr); - if (readback == CLEAR_STATUS_CMD) { - printk(BIOS_DEBUG, "QEMU flash behaves as RAM\n"); - /* Restore original content. */ - write8(ptr, original); - } else { - /* Either ROM or QEMU flash implementation. */ - write8(ptr, READ_STATUS_CMD); - readback = read8(ptr); - if (readback == original) { - printk(BIOS_DEBUG, "QEMU flash behaves as ROM\n"); - /* ROM means no writing nor erasing. */ - flash_ops.writeat = NULL; - flash_ops.eraseat = NULL; - } else if (readback == CLEARED_ARRAY_STATUS) { - /* Try writing original value to test whether flash is writable. */ - write8(ptr, WRITE_BYTE_CMD); - write8(ptr, original); - write8(ptr, READ_STATUS_CMD); - readback = read8(ptr); - if (readback & 0x10 /* programming error */) { - printk(BIOS_DEBUG, - "QEMU flash behaves as write-protected flash\n"); - flash_ops.writeat = NULL; - flash_ops.eraseat = NULL; - } else { - printk(BIOS_DEBUG, "QEMU flash behaves as writable flash\n"); - flash_ops.writeat = qemu_writeat; - flash_ops.eraseat = qemu_eraseat; - } - /* Restore flash to read mode. */ - write8(ptr, READ_ARRAY_CMD); - } else { - printk(BIOS_ERR, "Unexpected QEMU flash behavior, assuming ROM\n"); - /* - * This shouldn't happen and first byte of flash may already be - * corrupted by testing, but don't take any further risk. - */ - flash_ops.writeat = NULL; - flash_ops.eraseat = NULL; - } - } - - initialized = true; -} - -/* boot_device_ro() is defined in arch/x86/mmap_boot.c */ -const struct region_device *boot_device_rw(void) -{ - return &boot_dev.rdev; + return (void *)(0x100000000ULL - CONFIG_ROM_SIZE); } diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig index 854c053..ed154b7 100644 --- a/src/mainboard/emulation/qemu-q35/Kconfig +++ b/src/mainboard/emulation/qemu-q35/Kconfig @@ -15,9 +15,8 @@ select MAINBOARD_FORCE_NATIVE_VGA_INIT if !CHROMEOS select MEMORY_MAPPED_TPM select MAINBOARD_HAS_CHROMEOS - select BOOT_DEVICE_NOT_SPI_FLASH select BOOT_DEVICE_MEMORY_MAPPED - select BOOT_DEVICE_SUPPORTS_WRITES + select DRIVERS_EMULATION_QEMU_BOOT_DEVICE select DRIVERS_EMULATION_QEMU_FW_CFG config VBOOT diff --git a/src/mainboard/emulation/qemu-q35/Makefile.mk b/src/mainboard/emulation/qemu-q35/Makefile.mk index fc85e64..285be9a 100644 --- a/src/mainboard/emulation/qemu-q35/Makefile.mk +++ b/src/mainboard/emulation/qemu-q35/Makefile.mk @@ -2,9 +2,11 @@ bootblock-y += bootblock.c bootblock-y += memmap.c +bootblock-y += ../qemu-i440fx/rom_media.c romstage-y += ../qemu-i440fx/memmap.c romstage-y += memmap.c +romstage-y += ../qemu-i440fx/rom_media.c postcar-y += ../qemu-i440fx/memmap.c postcar-y += ../qemu-i440fx/exit_car.S -- To view, visit https://review.coreboot.org/c/coreboot/+/85669?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If9df9114be3ed83e6157fce7dbc2a1df21d7782b Gerrit-Change-Number: 85669 Gerrit-PatchSet: 1 Gerrit-Owner: Carlos López <carlos.lopezr4096(a)gmail.com>

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