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Change subject: mb/topton/adl: Disable mapped SATA port
......................................................................
Patch Set 5: Code-Review+2
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Change subject: mb/asus/p8z77-m: Drop GPIO by I/O
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
I've removed the URL to 75145, since we reference unmerged patches with just their change number.
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Felix Singer has uploaded a new patch set (#2) to the change originally created by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/84617?usp=email )
Change subject: mb/asus/p8z77-m: Drop GPIO by I/O
......................................................................
mb/asus/p8z77-m: Drop GPIO by I/O
Per Fabian Groffen <grobian(a)gentoo.org> in CB:75145:
This particular setting results in
[ERROR] PNP: 002e.308 missing read_resources
The underlying root cause was fixed by commit f5b993de4fcf
(sio/nuvoton/nct6779d: Correct GPIOBASE virtual LDN). However, to make
GPIO by I/O work requires setting up an I/O port resource here and
a generic LPC I/O decode at southbridge/intel/bd82x6x, and both weren't
done. Even if done, this newfound capability still doesn't offer much.
Change-Id: I39739ab71bc644619667b3e123cc9ad85f9d109f
Signed-off-by: Keith Hui <buurin(a)gmail.com>
---
M src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/84617/2
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Change subject: util/crossgcc: Add libstdcxx target
......................................................................
Patch Set 15:
(1 comment)
Patchset:
PS5:
> I don't disagree with all what you say. I just find it hard to draw a line that way. […]
Thanks!
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Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75137?usp=email )
Change subject: mb/asus/p8z77-m: Revert SIO IRQ settings carried from OEM
......................................................................
mb/asus/p8z77-m: Revert SIO IRQ settings carried from OEM
Revert super I/O IRQ polarity settings replicated from OEM firmware
back to its power-on defaults.
With OEM settings COM 1/UART A/serial port 1 gets blocked right after
the kernel boots. It no longer works or responds, which actually means
the Linux boot process gets stuck forever when configured to write
to ttyS0.
Also revised the comment on another SIO setting to say it's being set
for PECI.
TEST=Not using these settings, I have not found any downside.
Serial keeps working, sensors still work, S3 suspend/resume works
correctly.
Reported by Fabian and confirmed by Keith.
Signed-off-by: Fabian Groffen <grobian(a)gentoo.org>
Signed-off-by: Keith Hui <buurin(a)gmail.com>
Change-Id: Iae526762e79e9e2d46d06e12c338f375e5555e8c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75137
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Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
---
M src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
1 file changed, 1 insertion(+), 4 deletions(-)
Approvals:
Fabian Groffen: Looks good to me, but someone else must approve
Felix Singer: Looks good to me, approved
coreboot org: Looks good to me, approved
build bot (Jenkins): Verified
Paul Menzel: Looks good to me, but someone else must approve
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
index 41351b5..9ff794b 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
+++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
@@ -40,12 +40,9 @@
io 0x60 = 0x3f8 # COM1 address
irq 0x70 = 4
# Below are global config settings to replicate OEM
- drq 0x26 = 0x10 # Before accessing CR10/11/13/14, CR26:4 must be set to 1
- drq 0x13 = 0xff # IRQs 0-15 active low
- drq 0x14 = 0xff
drq 0x1a = 0x02
drq 0x1b = 0x60
- drq 0x2c = 0x00 # GP27, 3VSBSW#, No TSI
+ drq 0x2c = 0x00 # PECI
end
device pnp 2e.3 off end # UART B, IR
device pnp 2e.5 on # PS2 KBC
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Change subject: mb/asus/p8z77-m: Revert SIO IRQ settings carried from OEM
......................................................................
Patch Set 11: Code-Review+2
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Change subject: Documentation: Add Erying Polestar G613 Pro
......................................................................
Patch Set 6:
(1 comment)
File Documentation/mainboard/erying/tgl/tgl_matx_board.jpg:
PS6:
> Been thinking the same. […]
Yes please. Let's not merge representation images into the repo. I know a better way, but that's unrelated to this patch.
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Change subject: Documentation: Add Erying Polestar G613 Pro
......................................................................
Patch Set 6:
(1 comment)
File Documentation/mainboard/erying/tgl/tgl_matx_board.jpg:
PS6:
> Do we really need that image? It doesn't show something special and one can find the board in Google […]
Been thinking the same. I think it's nice to have a visual representation in documentation, but I can remove it if that's better for you (and storage space).
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Change subject: Documentation: Add Erying Polestar G613 Pro
......................................................................
Patch Set 6:
(1 comment)
File Documentation/mainboard/erying/tgl/tgl_matx_board.jpg:
PS6:
Do we really need that image? It doesn't show something special and one can find the board in Google as well.
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