coreboot-gerrit October 2024

coreboot-gerrit@coreboot.org

1 participants
2622 discussions

[S] Change in coreboot[main]: mb/starlabs/starbook/cml: Remove PMC GPIO routing
by Paul Menzel (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Sean Rhodes. Paul Menzel has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84265?usp=email ) Change subject: mb/starlabs/starbook/cml: Remove PMC GPIO routing ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84265/comment/c4667c23_f0002d12?us… : PS1, Line 9: These aren't used so remove them Please add a dot/period at the end of sentences. -- To view, visit https://review.coreboot.org/c/coreboot/+/84265?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6b9cf29843047bff9a37f82b899ff1d10b206888 Gerrit-Change-Number: 84265 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 01 Oct 2024 08:15:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/starlabs/starbook/tgl: Add USB ACPI to devicetree
by Paul Menzel (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Sean Rhodes. Paul Menzel has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84271?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/starlabs/starbook/tgl: Add USB ACPI to devicetree ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84271/comment/20c54b96_a30f8796?us… : PS1, Line 8: Please elaborate, and document how you tested this. -- To view, visit https://review.coreboot.org/c/coreboot/+/84271?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I803a23007f49ea45abc68421e867535081e31b3f Gerrit-Change-Number: 84271 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 01 Oct 2024 08:14:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/brox/jubilant: Modify GPIO for WWAN
by Kenneth Chan (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: David Wu, Karthik Ramasubramanian, Ren Kuo, Subrata Banik. Kenneth Chan has posted comments on this change by Ren Kuo. ( https://review.coreboot.org/c/coreboot/+/84611?usp=email ) Change subject: mb/google/brox/jubilant: Modify GPIO for WWAN ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84611?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I47a28342f67f99c5787077c48a01ddbaa77b5967 Gerrit-Change-Number: 84611 Gerrit-PatchSet: 1 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 01 Oct 2024 07:54:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XL] Change in coreboot[main]: mb/google/fatcat: Add FW_CONFIG
by Cliff Huang (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Jérémy Compostella, Pranava Y N, Subrata Banik, YH Lin. Cliff Huang has uploaded a new patch set (#19) to the change originally created by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/84408?usp=email ) Change subject: mb/google/fatcat: Add FW_CONFIG ...................................................................... mb/google/fatcat: Add FW_CONFIG BUG=b:348678529 TEST=Boot on google fatcat board Change-Id: I914f73ff06bfb801fc319b45b23d7ce4cb7a6d54 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/mainboard/google/fatcat/Kconfig M src/mainboard/google/fatcat/romstage.c M src/mainboard/google/fatcat/variants/fatcat/Makefile.mk A src/mainboard/google/fatcat/variants/fatcat/fw_config.c M src/mainboard/google/fatcat/variants/fatcat/overridetree.cb M src/mainboard/google/fatcat/variants/fatcat/variant.c 6 files changed, 1,166 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/84408/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/84408?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I914f73ff06bfb801fc319b45b23d7ce4cb7a6d54 Gerrit-Change-Number: 84408 Gerrit-PatchSet: 19 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: YH Lin <yueherngl(a)google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[S] Change in coreboot[main]: drivers/soundwire: Support Realtek ALC721 codec
by Varun Upadhyay (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Anil Kumar K, Karthik Ramasubramanian, Subrata Banik. Varun Upadhyay has posted comments on this change by Varun Upadhyay. ( https://review.coreboot.org/c/coreboot/+/84610?usp=email ) Change subject: drivers/soundwire: Support Realtek ALC721 codec ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/84610?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1022ee91b16374d0d4d07e5198226595d61403a6 Gerrit-Change-Number: 84610 Gerrit-PatchSet: 1 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 01 Oct 2024 07:24:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brox/jubilant: Modify FP IRQ pin on disable pads
by Paul Menzel (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Ren Kuo. Paul Menzel has posted comments on this change by Ren Kuo. ( https://review.coreboot.org/c/coreboot/+/84545?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/brox/jubilant: Modify FP IRQ pin on disable pads ...................................................................... Patch Set 6: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84545/comment/a77bb0f5_099a81ec?us… : PS6, Line 7: Modify FP IRQ pin on disable pads Update FP IRQ pin to GPP_D13 in fp_disable_pads https://review.coreboot.org/c/coreboot/+/84545/comment/9d6b039b_8e0126b5?us… : PS6, Line 9: In previous CB:84124 Please also use git hashes, as that is what git commands operates with: Commit 8cfe1b3302ff (mb/google/brox/jubilant: Modify FP IRQ pin to GPP_D13), CB:84124, changes the fingerprint IRQ pin from GPP_F15 to GPP_D13, but forgot to update the pin in the array `fp_disable_pads`. … -- To view, visit https://review.coreboot.org/c/coreboot/+/84545?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iee4c3d3f000f884ca8a77ae8c72ccbeebfeb865f Gerrit-Change-Number: 84545 Gerrit-PatchSet: 6 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Tue, 01 Oct 2024 07:23:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brox/jubilant: Modify GPIO for WWAN
by Ren Kuo (Code Review) 01 Oct '24

01 Oct '24

Ren Kuo has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84611?usp=email ) Change subject: mb/google/brox/jubilant: Modify GPIO for WWAN ...................................................................... mb/google/brox/jubilant: Modify GPIO for WWAN The LTE module RW101R-GL provide a hardware pin to enable/disable WWAN RF function.The function is disabled in default and is controlled by the AT command.Therefore,set the WWAN_RF_DISABLE Pin to NC, and it has been pull-high by hardware desgin. BUG=b:368450447 BRANCH=None TEST= Build firmware and verify the WWAN on/off function in OS. Change-Id: I47a28342f67f99c5787077c48a01ddbaa77b5967 Signed-off-by: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brox/variants/jubilant/gpio.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/84611/1 diff --git a/src/mainboard/google/brox/variants/jubilant/gpio.c b/src/mainboard/google/brox/variants/jubilant/gpio.c index aad759d..71c00ea 100644 --- a/src/mainboard/google/brox/variants/jubilant/gpio.c +++ b/src/mainboard/google/brox/variants/jubilant/gpio.c @@ -12,8 +12,8 @@ PAD_CFG_GPI(GPP_E11, NONE, PLTRST), /* GPP_E17 : [NF2: THC0_SPI1_INT# NF6: USB_C_GPP_E17] ==> WWAN_CFG02 */ PAD_CFG_GPI(GPP_E17, NONE, PLTRST), - /* GPP_D7 : SRCCLKREQ2_L ==> WWAN_RF_DISABLE_ODL */ - PAD_CFG_GPO_LOCK(GPP_D7, 1, LOCK_CONFIG), + /* GPP_D7 : SRCCLKREQ2_L ==> WWAN_RF_DISABLE (Reserved) */ + PAD_NC_LOCK(GPP_D7, NONE, LOCK_CONFIG), /* GPP_D5 : SRCCLKREQ0_L ==> WWAN_SAR_ODL */ PAD_CFG_GPO(GPP_D5, 1, DEEP), /* GPP_S4 : SNDW2_CLK/DMIC_CLK_B0 ==> WWAN_WLAN_COEX1 */ -- To view, visit https://review.coreboot.org/c/coreboot/+/84611?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I47a28342f67f99c5787077c48a01ddbaa77b5967 Gerrit-Change-Number: 84611 Gerrit-PatchSet: 1 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com>

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[L] Change in coreboot[main]: soc/intel/pantherlake: Add FSP-S programming
by Subrata Banik (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Ronak Kanabar. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/84552?usp=email ) Change subject: soc/intel/pantherlake: Add FSP-S programming ...................................................................... Patch Set 13: (2 comments) File src/soc/intel/pantherlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/84552/comment/77294b63_fbd31690?us… : PS11, Line 250: static void fill_fsps_cpu_params(FSP_S_CONFIG *s_cfg, : const struct soc_intel_pantherlake_config *config) : { : const struct microcode *microcode; : size_t length; : : if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI)) : s_cfg->CpuMpPpi = (uintptr_t)mp_fill_ppi_services_data(); : : if (CONFIG(USE_FSP_FEATURE_PROGRAM_ON_APS)) { : /* Locate microcode and pass to FSP-S for 2nd microcode loading */ : microcode = intel_microcode_find(); : if (!microcode) : return; : : length = get_microcode_size(microcode); : if (!length) : return; : : /* Update CPU Microcode patch base address/size */ : s_cfg->MicrocodeRegionBase = (uint32_t)(uintptr_t)microcode; : s_cfg->MicrocodeRegionSize = (uint32_t)length; : } : } > 2. USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI is not enforced by pantherlake Kconfig which only relies on the default settings so I believe it should be guard as a mainboard could decide otherwise. This kconfig is specific to this use-case where coreboot let FSP use coreboot MP PPI. In addition, we should not be worried about loosing any CPU cycles thanks to compiler optimization anyway. there are two options to perform MP Init 1. USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI <--- FSP runs coreboot APIs 2. USE_INTEL_FSP_MP_INIT <--- FSP runs own APIs in case #2 , filling the CpuMpPpi UPD won't harm. if you wish to use #2 (which we don't plan to use) then please select USE_INTEL_FSP_MP_INIT config. some more details: https://review.coreboot.org/c/coreboot/+/66706 > 3. Sure, I'll do that tomorrow. https://review.coreboot.org/c/coreboot/+/84552/comment/ce2b40f7_f19f1273?us… : PS11, Line 301: max_port = get_max_tcss_port(); : for (i = 0; i < max_port; i++) > It would definitely save few CPU cycles. Should I replace the call to `get_max_tcss_port()` everywhere ? What about `get_max_pcie_port()`? or `get_max_i2c_port()`? Do you think we should also replace them with their corresponding constants ? At this point we could even get rid of the soc_info.c saving a few bytes of binary space and as a result a few extra cycles in the process. I am sure this is going to hurt code readability and as a result maintainability but if it is really what you desire, I can do it. If we have static configurations like Kconfig and/or macros, it's better to depend on them instead of functions. We don't want to override that function. However, I'll leave it up to you if you'd prefer to change other APIs to macros. -- To view, visit https://review.coreboot.org/c/coreboot/+/84552?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea26d962748116fa84afdb4afcba1098a64b6989 Gerrit-Change-Number: 84552 Gerrit-PatchSet: 13 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Tue, 01 Oct 2024 06:07:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[M] Change in coreboot[main]: mb/starlabs/starbook/cml: Add USB ACPI to devicetree
by Nicholas Sudsgaard (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Sean Rhodes. Nicholas Sudsgaard has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84272?usp=email ) Change subject: mb/starlabs/starbook/cml: Add USB ACPI to devicetree ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File src/mainboard/starlabs/starbook/variants/cml/devicetree.cb: https://review.coreboot.org/c/coreboot/+/84272/comment/367230a5_3c1166dd?us… : PS1, Line 100: chip drivers/usb/acpi : register "desc" = ""MicroSD Card Reader"" : register "type" = "UPC_TYPE_INTERNAL" : device ref usb2_port4 on end : end It would be nice if this was below the "Left USB Type-A" to be consistent with the order of entries above. -- To view, visit https://review.coreboot.org/c/coreboot/+/84272?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I140d597750001ad22e2bb1b6971011d2b3bb2bbc Gerrit-Change-Number: 84272 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 01 Oct 2024 05:51:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/starlabs/starbook/tgl: Add USB ACPI to devicetree
by Nicholas Sudsgaard (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Sean Rhodes. Nicholas Sudsgaard has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84271?usp=email ) Change subject: mb/starlabs/starbook/tgl: Add USB ACPI to devicetree ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/84271/comment/90f7c9ca_a55fde13?us… : PS1, Line 127: chip drivers/usb/acpi : register "desc" = ""Internal Webcam"" : register "type" = "UPC_TYPE_INTERNAL" : device ref usb2_port4 on end : end It would be nice if this was below the "MicroSD Card Reader" to be consistent with the order of entries above (or the opposite). -- To view, visit https://review.coreboot.org/c/coreboot/+/84271?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I803a23007f49ea45abc68421e867535081e31b3f Gerrit-Change-Number: 84271 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 01 Oct 2024 05:46:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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coreboot-gerrit October 2024