coreboot-gerrit October 2024

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[S] Change in coreboot[main]: soc/amd/.../amd_pci_int_defs.h: Update according to datasheet
by Maximilian Brune (Code Review) 01 Oct '24

01 Oct '24

Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84613?usp=email ) Change subject: soc/amd/.../amd_pci_int_defs.h: Update according to datasheet ...................................................................... soc/amd/.../amd_pci_int_defs.h: Update according to datasheet HPET and MISC2/3 and registers are used interchangeably in the datasheets. Add an alias to emphasis that they refer to the same. source: PPR #57396 Rev 3.10 Table "ValidValuesTable: PCI interrupt index list" PPR #57254 Rev 1.59 Table "ValidValuesTable: PCI interrupt index list" PPR #57396 Rev 3.10 FCH::IO::IntrMisc1Map and FCH::IO::IntrMisc2Map PPR #57254 Rev 1.59 FCH::IO::IntrMisc1Map and FCH::IO::IntrMisc2Map Change-Id: Ic7b72040f8c4ce39b8f33699e56c0d99d102725f Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> --- M src/soc/amd/glinda/include/soc/amd_pci_int_defs.h M src/soc/amd/phoenix/include/soc/amd_pci_int_defs.h 2 files changed, 8 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/84613/1 diff --git a/src/soc/amd/glinda/include/soc/amd_pci_int_defs.h b/src/soc/amd/glinda/include/soc/amd_pci_int_defs.h index 3a9d9b5..0398315 100644 --- a/src/soc/amd/glinda/include/soc/amd_pci_int_defs.h +++ b/src/soc/amd/glinda/include/soc/amd_pci_int_defs.h @@ -21,8 +21,10 @@ #define PIRQ_H 0x07 /* INT H */ #define PIRQ_MISC 0x08 /* Miscellaneous IRQ Settings */ #define PIRQ_MISC0 0x09 /* Miscellaneous0 IRQ Settings */ -#define PIRQ_HPET_L 0x0a /* HPET TMR{0..2}_CONF_CAP_H[0:7] */ -#define PIRQ_HPET_H 0x0b /* HPET TMR{0..2}_CONF_CAP_H[15:8] */ +#define PIRQ_MISC1 0x0a /* Miscellaneous1 IRQ Settings */ +#define PIRQ_MISC2 0x0b /* Miscellaneous2 IRQ Settings */ +#define PIRQ_HPET_L PIRQ_MISC1 /* HPET TMR{0..2}_CONF_CAP_L[0:7] */ +#define PIRQ_HPET_H PIRQ_MISC2 /* HPET TMR{0..2}_CONF_CAP_H[15:8] */ #define PIRQ_SIRQA 0x0c /* Serial IRQ INTA */ #define PIRQ_SIRQB 0x0d /* Serial IRQ INTB */ #define PIRQ_SIRQC 0x0e /* Serial IRQ INTC */ diff --git a/src/soc/amd/phoenix/include/soc/amd_pci_int_defs.h b/src/soc/amd/phoenix/include/soc/amd_pci_int_defs.h index 52cca1a..74bb454 100644 --- a/src/soc/amd/phoenix/include/soc/amd_pci_int_defs.h +++ b/src/soc/amd/phoenix/include/soc/amd_pci_int_defs.h @@ -19,8 +19,10 @@ #define PIRQ_H 0x07 /* INT H */ #define PIRQ_MISC 0x08 /* Miscellaneous IRQ Settings */ #define PIRQ_MISC0 0x09 /* Miscellaneous0 IRQ Settings */ -#define PIRQ_HPET_L 0x0a /* HPET TMR{0..2}_CONF_CAP_H[0:7] */ -#define PIRQ_HPET_H 0x0b /* HPET TMR{0..2}_CONF_CAP_H[15:8] */ +#define PIRQ_MISC1 0x0a /* Miscellaneous1 IRQ Settings */ +#define PIRQ_MISC2 0x0b /* Miscellaneous2 IRQ Settings */ +#define PIRQ_HPET_L PIRQ_MISC1 /* HPET TMR{0..2}_CONF_CAP_L[0:7] */ +#define PIRQ_HPET_H PIRQ_MISC2 /* HPET TMR{0..2}_CONF_CAP_H[15:8] */ #define PIRQ_SIRQA 0x0c /* Serial IRQ INTA */ #define PIRQ_SIRQB 0x0d /* Serial IRQ INTB */ #define PIRQ_SIRQC 0x0e /* Serial IRQ INTC */ -- To view, visit https://review.coreboot.org/c/coreboot/+/84613?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic7b72040f8c4ce39b8f33699e56c0d99d102725f Gerrit-Change-Number: 84613 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com>

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[M] Change in coreboot[main]: soc/intel/adl to jsl: Explicitly include static.h for config_of_soc
by Jayvik Desai (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Arthur Heymans, Christian Walter, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Johnny Lin, Jonathan Zhang, Kapil Porwal, Lean Sheng Tan, Nicholas Chin, Nick Vaccaro, Patrick Rudolph, Pranava Y N, Sean Rhodes, Shuo Liu, Subrata Banik, Tarun, Tim Chu, Werner Zeh. Jayvik Desai has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/84586?usp=email ) Change subject: soc/intel/adl to jsl: Explicitly include static.h for config_of_soc ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/84586?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I03e42689487c6d63436d9c2945558073aae87cd1 Gerrit-Change-Number: 84586 Gerrit-PatchSet: 2 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 01 Oct 2024 10:48:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/nissa/var/pujjoga: Change configure_ext_fivr value
by Jayvik Desai (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Leo Chou, Nick Vaccaro, Roger Wang, Shou-Chieh Hsu, Subrata Banik. Jayvik Desai has posted comments on this change by Roger Wang. ( https://review.coreboot.org/c/coreboot/+/84573?usp=email ) Change subject: mb/google/nissa/var/pujjoga: Change configure_ext_fivr value ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/84573?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb51a431ba6c6089d5c9d29adad9ab2a67979447 Gerrit-Change-Number: 84573 Gerrit-PatchSet: 3 Gerrit-Owner: Roger Wang <roger2.wang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Nikki Huang <nikki.huang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Attention: Roger Wang <roger2.wang(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Tue, 01 Oct 2024 10:41:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/ibm/sbp1: Add SMMSTORE
by Felix Held (Code Review) 01 Oct '24

01 Oct '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84559?usp=email ) Change subject: mb/ibm/sbp1: Add SMMSTORE ...................................................................... mb/ibm/sbp1: Add SMMSTORE Add SMMSTORE to the default FMAP to allow using UefiPayload on this board that requires a non-volatile variable store. TEST: Booted an UEFI compatible OS using EDK2 as payload. Change-Id: I32fb0a882c62e42da9f3caec54f8d33333fc8598 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84559 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/ibm/sbp1/board.fmd 1 file changed, 8 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/mainboard/ibm/sbp1/board.fmd b/src/mainboard/ibm/sbp1/board.fmd index 708d4b2..9f51f01 100644 --- a/src/mainboard/ibm/sbp1/board.fmd +++ b/src/mainboard/ibm/sbp1/board.fmd @@ -3,9 +3,12 @@ SI_DESC@0x0 0x1000 SI_ME@0x1000 0x2fff000 } - RW_MRC_CACHE@0x3000000 0x10000 - FMAP 0x800 - RW_VPD(PRESERVE) 0x4000 - RO_VPD(PRESERVE) 0x4000 - COREBOOT(CBFS) + SI_BIOS { + RW_MRC_CACHE 64K + SMMSTORE(PRESERVE) 256K + FMAP 0x800 + RW_VPD(PRESERVE) 0x4000 + RO_VPD(PRESERVE) 0x4000 + COREBOOT(CBFS) + } } -- To view, visit https://review.coreboot.org/c/coreboot/+/84559?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I32fb0a882c62e42da9f3caec54f8d33333fc8598 Gerrit-Change-Number: 84559 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/google/brox: Pass PL4 address and data to kernel through ACPI table
by Vidya Gopalakrishnan (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Cliff Huang, Karthik Ramasubramanian, Lance Zhao, Sangram K Y, Sowmya Aralguppe, Subrata Banik, Tim Wawrzynczak, Vinay Kumar. Vidya Gopalakrishnan has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/84570?usp=email ) Change subject: mb/google/brox: Pass PL4 address and data to kernel through ACPI table ...................................................................... Patch Set 4: (2 comments) Patchset: PS4: The patch is to pass the PL4 value to kernel, which will then write it to the MSR. DPTF framework should not be used for this info passing since it is not related to DPTF. Need to find a better way to pass info from CB to Kernel File src/include/acpi/acpigen_dptf.h: https://review.coreboot.org/c/coreboot/+/84570/comment/27e53cfd_65855dc8?us… : PS4, Line 156: PL4 is not controlled by DPTF. This value is just passed to kernel that resets PL4 to default value when battery has charged enough. It will be better to decouple this from DPTF framework and avoid modifying DPTF structures for non-DPTF data -- To view, visit https://review.coreboot.org/c/coreboot/+/84570?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I503178487740f5d32bd1d9523ee94c732f0583aa Gerrit-Change-Number: 84570 Gerrit-PatchSet: 4 Gerrit-Owner: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Sangram K Y <sangram.k.y(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Vidya Gopalakrishnan <vidya.gopalakrishnan(a)intel.com> Gerrit-Reviewer: Vinay Kumar <vinay.kumar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Vinay Kumar <vinay.kumar(a)intel.com> Gerrit-Attention: Sangram K Y <sangram.k.y(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 01 Oct 2024 09:55:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/starlabs/starbook/cml: Remove PMC GPIO routing
by Sean Rhodes (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Paul Menzel. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84265?usp=email ) Change subject: mb/starlabs/starbook/cml: Remove PMC GPIO routing ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84265/comment/7d03ed2b_13adbfc9?us… : PS1, Line 9: These aren't used so remove them > Please add a dot/period at the end of sentences. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84265?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6b9cf29843047bff9a37f82b899ff1d10b206888 Gerrit-Change-Number: 84265 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 01 Oct 2024 09:53:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: drivers/tpm: Remove unused 2nd argument in FUNC method
by Michał Kopeć (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Paul Menzel, Sean Rhodes. Michał Kopeć has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84605?usp=email ) Change subject: drivers/tpm: Remove unused 2nd argument in FUNC method ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84605?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5e402579a2caff169e12253e5d9c2c493902ec7 Gerrit-Change-Number: 84605 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 01 Oct 2024 09:53:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: drivers/tpm: Remove unused 2nd argument in FUNC method
by Sean Rhodes (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Michał Kopeć, Paul Menzel. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84605?usp=email ) Change subject: drivers/tpm: Remove unused 2nd argument in FUNC method ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84605/comment/3f2033a2_9cb40c00?us… : PS2, Line 7: Fix FUNC Method > Please be more specific. Maybe: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84605?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5e402579a2caff169e12253e5d9c2c493902ec7 Gerrit-Change-Number: 84605 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Comment-Date: Tue, 01 Oct 2024 09:53:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: drivers/tpm: Use fieldlist for dynamic field creation
by Sean Rhodes (Code Review) 01 Oct '24

01 Oct '24

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84606?usp=email to look at the new patch set (#2). Change subject: drivers/tpm: Use fieldlist for dynamic field creation ...................................................................... drivers/tpm: Use fieldlist for dynamic field creation Define TPPF field dynamically in the PPOP OpRegion, this ensures that the offset stored in Local0 is used correctly. This fixes: CreateByteField (PPOP, Local0, TPPF) Error 6058 - Invalid type ^ ([Region] found, CreateByteField operator requires [Integer|String|Buffer]) Change-Id: If80bb5bf69562f8b904c1b315e95a0b5627efbc4 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/drivers/tpm/ppi.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/84606/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84606?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If80bb5bf69562f8b904c1b315e95a0b5627efbc4 Gerrit-Change-Number: 84606 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: drivers/tpm: Remove unused 2nd argument in FUNC method
by Sean Rhodes (Code Review) 01 Oct '24

01 Oct '24

Attention is currently required from: Michał Kopeć, Sean Rhodes. Hello Michał Kopeć, Nicholas Sudsgaard, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84605?usp=email to look at the new patch set (#3). Change subject: drivers/tpm: Remove unused 2nd argument in FUNC method ...................................................................... drivers/tpm: Remove unused 2nd argument in FUNC method The method "FUNC" allows 1 argument, so remove the incorrectly referenced and unused second arguemnt. This fixes: ToInteger (Arg1, Local1) Error 6006 - ^ Method argument is not initialized (Arg1) Change-Id: If5e402579a2caff169e12253e5d9c2c493902ec7 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/drivers/tpm/ppi.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/84605/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/84605?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5e402579a2caff169e12253e5d9c2c493902ec7 Gerrit-Change-Number: 84605 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com>

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coreboot-gerrit October 2024