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Change subject: soc/intel/common/gpio: add function to lock GPIO configuration
......................................................................
soc/intel/common/gpio: add function to lock GPIO configuration
gpio_padbased_lock_override() takes the MB gpio table and configuration
exception gpio list as arguments. MB gpio needs to provide the lock
exception list or use none for the list. This function should be called
after MB gpio table is overridden with GPIO fw_config tables.
NOTE: The SOC gpio structure does not distinguish GPP_[n] and non
GPP_[n] pads. Therefore, we only apply lock on pads in the MB gpio
table. In additon, this won't lock the TX output, which is set via
different registers.
BUG=none
TEST=This cannot be tested directly and requires MB gpio.c and
mainboard.c changes to use this added function.
Signed-off-by: Cliff Huang <cliff.huang(a)intel.com>
Change-Id: Iabe4e4b1d282a5f6cae8f330100c9139e0c2691d
---
M src/soc/intel/common/block/gpio/gpio.c
M src/soc/intel/common/block/include/intelblocks/gpio.h
2 files changed, 23 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/84901/3
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I'd like you to reexamine a change. Please visit
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The following approvals got outdated and were removed:
Code-Review+1 by Jérémy Compostella
Change subject: mb/google/fatcat: support ISH
......................................................................
mb/google/fatcat: support ISH
Enable ISH PCI device and update gpio GPP_D05, GPP_D06 configuration.
BUG=b:370984186
TEST=verified lspci shows ISH and ISH UART shows ISH firmware log on fatcat
Change-Id: I2b6eb39fe7b07fcabc255d66df4aa0aa2865df79
Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com>
---
M src/mainboard/google/fatcat/Kconfig
M src/mainboard/google/fatcat/variants/fatcat/gpio.c
M src/mainboard/google/fatcat/variants/fatcat/overridetree.cb
3 files changed, 20 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/84739/3
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Change subject: soc/intel/common/gpio: add function to lock GPIO configuration
......................................................................
Patch Set 2: Code-Review+1
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Change subject: soc/amd/common/psp_smi_flash: refactor SPI controller busy check
......................................................................
Patch Set 1: Code-Review+2
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Change subject: vendorcode/intel: Add edk2-stable202305 support
......................................................................
Patch Set 6: Code-Review+1
(1 comment)
Patchset:
PS6:
I am not sure what the process with pulling these changes. But functionally these changes look good to me.
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Change subject: mb/google/fatcat: Adjust EC host command range for Fatcat
......................................................................
Patch Set 1: Code-Review+1
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Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84920?usp=email )
Change subject: soc/amd/common/psp_smi_flash: refactor SPI controller busy check
......................................................................
soc/amd/common/psp_smi_flash: refactor SPI controller busy check
Since the functions that call 'spi_controller_available' end up checking
if the SPI controller is busy, refactor the function into
'spi_controller_busy' to simplify the logic on the caller's side. Also
move printing of the notice that the SPI controller is busy to
'spi_controller_busy' to not have that duplicated in caller.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: Ibc21ab6eacf07c4adffdb4658142c2f9dfcbf2a1
---
M src/soc/amd/common/block/psp/psp_smi_flash.c
1 file changed, 11 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/84920/1
diff --git a/src/soc/amd/common/block/psp/psp_smi_flash.c b/src/soc/amd/common/block/psp/psp_smi_flash.c
index ca59553..abddcdf 100644
--- a/src/soc/amd/common/block/psp/psp_smi_flash.c
+++ b/src/soc/amd/common/block/psp/psp_smi_flash.c
@@ -92,9 +92,14 @@
return MBOX_PSP_SUCCESS;
}
-static bool spi_controller_available(void)
+static bool spi_controller_busy(void)
{
- return !(spi_read8(SPI_MISC_CNTRL) & SPI_SEMAPHORE_DRIVER_LOCKED);
+ const bool busy = (spi_read8(SPI_MISC_CNTRL) & SPI_SEMAPHORE_DRIVER_LOCKED);
+
+ if (busy)
+ printk(BIOS_NOTICE, "PSP: SPI controller busy\n");
+
+ return busy;
}
enum mbox_p2c_status psp_smi_spi_get_info(struct mbox_default_buffer *buffer)
@@ -113,8 +118,7 @@
if (!is_valid_psp_spi_info(cmd_buf))
return MBOX_PSP_COMMAND_PROCESS_ERROR;
- if (!spi_controller_available()) {
- printk(BIOS_NOTICE, "PSP: SPI controller busy\n");
+ if (spi_controller_busy()) {
return MBOX_PSP_SPI_BUSY;
}
@@ -156,8 +160,7 @@
if (!is_valid_psp_spi_read_write(cmd_buf))
return MBOX_PSP_COMMAND_PROCESS_ERROR;
- if (!spi_controller_available()) {
- printk(BIOS_NOTICE, "PSP: SPI controller busy\n");
+ if (spi_controller_busy()) {
return MBOX_PSP_SPI_BUSY;
}
@@ -205,8 +208,7 @@
if (!is_valid_psp_spi_read_write(cmd_buf))
return MBOX_PSP_COMMAND_PROCESS_ERROR;
- if (!spi_controller_available()) {
- printk(BIOS_NOTICE, "PSP: SPI controller busy\n");
+ if (spi_controller_busy()) {
return MBOX_PSP_SPI_BUSY;
}
@@ -253,8 +255,7 @@
if (!is_valid_psp_spi_erase(cmd_buf))
return MBOX_PSP_COMMAND_PROCESS_ERROR;
- if (!spi_controller_available()) {
- printk(BIOS_NOTICE, "PSP: SPI controller busy\n");
+ if (spi_controller_busy()) {
return MBOX_PSP_SPI_BUSY;
}
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Julius Werner has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/84891?usp=email )
Change subject: util/nvidia: Build test using C23
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
Same here, we shouldn't be updating C dialect in utilities that we aren't really actively maintaining.
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