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Change subject: mb/google/rex/var/karis: Toggle NVMe PWR pin to reset SSD
......................................................................
Patch Set 5:
This change is ready for review.
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Change subject: util/ifdtool: Refactor GPR0 Unlock Implemetation
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Patch Set 2:
(1 comment)
Patchset:
PS2:
> > Are you saying something in the PSR flow changes the descriptor during factory? Is there a bug wit […]
Ok, it looks like the latest update is that the genesis information is in SI_ME, not SI_DESC? So then it's fine to flash the locked descriptor?
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Change subject: util/release: Remove makefile.inc references from genrelnotes
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Patch Set 4: Code-Review+2
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Change subject: mb/google/puff: Delegate I2C device configuration to overridetree
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Patch Set 2: Code-Review+2
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Change subject: mb/google/brya: Correct EC-is-trusted logic
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Patch Set 2:
(1 comment)
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PS2:
Add some ODM to test the nissa board.
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Change subject: soc/intel: Unify the definition of TCO registers
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Patch Set 9: Code-Review+1
(1 comment)
File src/southbridge/intel/common/tco.h:
https://review.coreboot.org/c/coreboot/+/80005/comment/699d562e_8c4fb3b7 :
PS9, Line 15: #define PMBASE_TCO_OFFSET 0x60
Can not be common?
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Change subject: mainboard: Use write{64,32,16,8}p and read{64,32,16,8}p
......................................................................
Patch Set 1:
(1 comment)
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PS1:
Looks like need casting in this patch.
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Change subject: soc/intel: Use write{64,32,16,8}p and read{64,32,16,8}p
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Patch Set 1: Code-Review+2
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