coreboot-gerrit January 2024

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[S] Change in coreboot[main]: mb/google/nissa/var/anraggar: Add FW_CONFIG probe for mipi camera
by Weimin Wu (Code Review) 08 Jan '24

08 Jan '24

Attention is currently required from: Eric Lai, Nick Vaccaro, Subrata Banik. Weimin Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79802?usp=email ) Change subject: mb/google/nissa/var/anraggar: Add FW_CONFIG probe for mipi camera ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/79802?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifa8649a603c59946b530abd315113b405ceaf35a Gerrit-Change-Number: 79802 Gerrit-PatchSet: 1 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 08 Jan 2024 13:07:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/nissa/var/craaskov: Implement touchscreen power sequencing
by Felix Held (Code Review) 08 Jan '24

08 Jan '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79764?usp=email ) Change subject: mb/google/nissa/var/craaskov: Implement touchscreen power sequencing ...................................................................... mb/google/nissa/var/craaskov: Implement touchscreen power sequencing For brya variants with a touchscreen, drive the enable GPIO high starting in romstage while holding in reset, then disable the reset GPIO in ramstage (done in the baseboard). BUG=b:317746281 TEST=emerge-nissa coreboot chromeos-bootimage Change-Id: I3ca2e2d12a86eaae9e37870a2541c0287e354690 Signed-off-by: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79764 Reviewed-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Reviewed-by: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/craaskov/Makefile.inc M src/mainboard/google/brya/variants/craaskov/gpio.c 2 files changed, 16 insertions(+), 0 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved Ian Feng: Looks good to me, approved Dtrain Hsu: Looks good to me, approved Eric Lai: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/brya/variants/craaskov/Makefile.inc b/src/mainboard/google/brya/variants/craaskov/Makefile.inc index 7822c45..d3f2f68 100644 --- a/src/mainboard/google/brya/variants/craaskov/Makefile.inc +++ b/src/mainboard/google/brya/variants/craaskov/Makefile.inc @@ -1,6 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later bootblock-y += gpio.c +romstage-y += gpio.c + ramstage-y += gpio.c ramstage-y += variant.c ramstage-$(CONFIG_FW_CONFIG) += fw_config.c diff --git a/src/mainboard/google/brya/variants/craaskov/gpio.c b/src/mainboard/google/brya/variants/craaskov/gpio.c index 8b1446d..0d280ce 100644 --- a/src/mainboard/google/brya/variants/craaskov/gpio.c +++ b/src/mainboard/google/brya/variants/craaskov/gpio.c @@ -63,6 +63,14 @@ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), }; +static const struct pad_config romstage_gpio_table[] = { + /* Enable touchscreen, hold in reset */ + /* C0 : SMBCLK ==> EN_PP3300_TCHSCR */ + PAD_CFG_GPO(GPP_C0, 1, DEEP), + /* C1 : SMBDATA ==> USI_RST_L */ + PAD_CFG_GPO(GPP_C1, 0, DEEP), +}; + const struct pad_config *variant_gpio_override_table(size_t *num) { *num = ARRAY_SIZE(override_gpio_table); @@ -74,3 +82,9 @@ *num = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } + +const struct pad_config *variant_romstage_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(romstage_gpio_table); + return romstage_gpio_table; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/79764?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3ca2e2d12a86eaae9e37870a2541c0287e354690 Gerrit-Change-Number: 79764 Gerrit-PatchSet: 4 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kenny Pan <kennypan(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: util/ifdtool: Add support for extended region read/write access
by Felix Held (Code Review) 08 Jan '24

08 Jan '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79790?usp=email ) Change subject: util/ifdtool: Add support for extended region read/write access ...................................................................... util/ifdtool: Add support for extended region read/write access Platforms from CNL onwards support up to 16 flash regions, not 12. The permissions for regions [15:12] are stored in extended region read/write access fields in the FLMSTR registers. Currently ifdtool treats these fields as reserved, so they're not modified when locking or unlocking. Add support for extended regions so that they are locked/unlocked by the --lock/--unlock options. This will make the locked/unlocked descriptors generated by ifdtool match those generated by mFIT. BUG=b:270275115 TEST=Without this change: `ifdtool -lr -p adl` on unlocked image: Before: 00000080 ff ff ff ff ff ff ff ff ff ff ff ff 00 00 00 00 00000090 ff ff ff ff After: 00000080 ff 07 20 00 ff 05 40 00 ff 00 00 00 00 00 00 00 00000090 ff 00 00 00 `ifdtool -u -p adl` on locked image: Before: 00000080 00 07 20 00 00 05 40 00 00 00 00 00 00 00 00 00 00000090 00 00 00 00 After: 00000080 00 ff ff ff 00 ff ff ff 00 ff ff ff 00 00 00 00 00000090 00 ff ff ff With this change: `ifdtool -lr -p adl` on unlocked image: Before: 00000080 ff ff ff ff ff ff ff ff ff ff ff ff 00 00 00 00 00000090 ff ff ff ff After: 00000080 00 07 20 00 00 05 40 00 00 00 00 00 00 00 00 00 00000090 00 00 00 00 `ifdtool -u -p adl` on locked image: Before: 00000080 00 07 20 00 00 05 40 00 00 00 00 00 00 00 00 00 00000090 00 00 00 00 After: 00000080 ff ff ff ff ff ff ff ff ff ff ff ff 00 00 00 00 00000090 ff ff ff ff Change-Id: Iaa43524d91c399a996ade56f2f613b4110a44aad Signed-off-by: Reka Norman <rekanorman(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79790 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M util/ifdtool/ifdtool.c 1 file changed, 60 insertions(+), 10 deletions(-) Approvals: Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index 7d69bcf..99a83e5 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -1329,6 +1329,36 @@ return !!((region.base < region.limit) && (region.size > 0)); } +/* + * Platforms from CNL onwards support up to 16 flash regions, not 12. The + * permissions for regions [15:12] are stored in extended region read/write + * access fields in the FLMSTR registers. + * + * FLMSTR with extended regions: + * 31:20 Region Write Access + * 19:8 Region Read Access + * 7:4 Extended Region Write Access + * 3:0 Extended Region Read Access + * + * FLMSTR without extended regions: + * 31:20 Region Write Access + * 19:8 Region Read Access + * 7:0 Reserved + */ +static bool platform_has_extended_regions(void) +{ + switch (platform) { + case PLATFORM_CNL: + case PLATFORM_JSL: + case PLATFORM_TGL: + case PLATFORM_ADL: + case PLATFORM_MTL: + return true; + default: + return false; + } +} + static void lock_descriptor(const char *filename, char *image, int size) { int wr_shift, rd_shift; @@ -1341,11 +1371,21 @@ wr_shift = FLMSTR_WR_SHIFT_V2; rd_shift = FLMSTR_RD_SHIFT_V2; - /* Clear non-reserved bits */ - fmba->flmstr1 &= 0xff; - fmba->flmstr2 &= 0xff; - fmba->flmstr3 &= 0xff; - fmba->flmstr5 &= 0xff; + /* + * Clear all read/write access bits. See comment on + * platform_has_extended_regions() for bitfields. + */ + if (platform_has_extended_regions()) { + fmba->flmstr1 = 0; + fmba->flmstr2 = 0; + fmba->flmstr3 = 0; + fmba->flmstr5 = 0; + } else { + fmba->flmstr1 &= 0xff; + fmba->flmstr2 &= 0xff; + fmba->flmstr3 &= 0xff; + fmba->flmstr5 &= 0xff; + } } else { wr_shift = FLMSTR_WR_SHIFT_V1; rd_shift = FLMSTR_RD_SHIFT_V1; @@ -1482,11 +1522,21 @@ exit(EXIT_FAILURE); if (ifd_version >= IFD_VERSION_2) { - /* Access bits for each region are read: 19:8 write: 31:20 */ - fmba->flmstr1 = 0xffffff00 | (fmba->flmstr1 & 0xff); - fmba->flmstr2 = 0xffffff00 | (fmba->flmstr2 & 0xff); - fmba->flmstr3 = 0xffffff00 | (fmba->flmstr3 & 0xff); - fmba->flmstr5 = 0xffffff00 | (fmba->flmstr5 & 0xff); + /* + * Set all read/write access bits. See comment on + * platform_has_extended_regions() for bitfields. + */ + if (platform_has_extended_regions()) { + fmba->flmstr1 = 0xffffffff; + fmba->flmstr2 = 0xffffffff; + fmba->flmstr3 = 0xffffffff; + fmba->flmstr5 = 0xffffffff; + } else { + fmba->flmstr1 = 0xffffff00 | (fmba->flmstr1 & 0xff); + fmba->flmstr2 = 0xffffff00 | (fmba->flmstr2 & 0xff); + fmba->flmstr3 = 0xffffff00 | (fmba->flmstr3 & 0xff); + fmba->flmstr5 = 0xffffff00 | (fmba->flmstr5 & 0xff); + } } else { fmba->flmstr1 = 0xffff0000; fmba->flmstr2 = 0xffff0000; -- To view, visit https://review.coreboot.org/c/coreboot/+/79790?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaa43524d91c399a996ade56f2f613b4110a44aad Gerrit-Change-Number: 79790 Gerrit-PatchSet: 2 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: mb/google/nissa/var/anraggar: Add FW_CONFIG probe for mipi camera
by Weimin Wu (Code Review) 08 Jan '24

08 Jan '24

Weimin Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79802?usp=email ) Change subject: mb/google/nissa/var/anraggar: Add FW_CONFIG probe for mipi camera ...................................................................... mb/google/nissa/var/anraggar: Add FW_CONFIG probe for mipi camera Due to some without mipi camera SKUs can't entering S0i3. BUG=b:317670018 TEST=suspend_stress_test -c 1 Change-Id: Ifa8649a603c59946b530abd315113b405ceaf35a Signed-off-by: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/anraggar/overridetree.cb 1 file changed, 25 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/79802/1 diff --git a/src/mainboard/google/brya/variants/anraggar/overridetree.cb b/src/mainboard/google/brya/variants/anraggar/overridetree.cb index a95c763..8fe4316 100644 --- a/src/mainboard/google/brya/variants/anraggar/overridetree.cb +++ b/src/mainboard/google/brya/variants/anraggar/overridetree.cb @@ -1,3 +1,12 @@ +fw_config + field CAMERA 12 13 + option UF_720P_WF 0 + option UF_1080P 1 + option UF_720P 2 + option UF_1080P_WF 3 + end +end + chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" @@ -210,7 +219,10 @@ register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used register "cio2_lane_endpoint[0]" = ""^I2C2.CAM0"" register "cio2_prt[0]" = "1" - device generic 0 on end + device generic 0 on + probe CAMERA UF_720P_WF + probe CAMERA UF_1080P_WF + end end end device ref i2c1 on @@ -281,7 +293,10 @@ register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)" register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" - device i2c 36 on end + device i2c 36 on + probe CAMERA UF_720P_WF + probe CAMERA UF_1080P_WF + end end chip drivers/intel/mipi_camera register "acpi_uid" = "2" @@ -303,7 +318,10 @@ register "off_seq.ops_cnt" = "1" register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" - device i2c 0C on end + device i2c 0C on + probe CAMERA UF_720P_WF + probe CAMERA UF_1080P_WF + end end chip drivers/intel/mipi_camera register "acpi_uid" = "1" @@ -317,7 +335,10 @@ register "nvm_width" = "0x10" register "nvm_compat" = ""atmel,24c64"" - device i2c 50 on end + device i2c 50 on + probe CAMERA UF_720P_WF + probe CAMERA UF_1080P_WF + end end end device ref i2c3 on -- To view, visit https://review.coreboot.org/c/coreboot/+/79802?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifa8649a603c59946b530abd315113b405ceaf35a Gerrit-Change-Number: 79802 Gerrit-PatchSet: 1 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: nb/intel/gm45/raminit: Use read32p()
by Felix Held (Code Review) 08 Jan '24

08 Jan '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/77971?usp=email ) Change subject: nb/intel/gm45/raminit: Use read32p() ...................................................................... nb/intel/gm45/raminit: Use read32p() Built roda/rk9 with BUILD_TIMELESS=1 and the resulting coreboot.rom remains identical. Change-Id: Ib1e7144eebf8148c4eb5cc0e7bc03ae3d7281092 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77971 Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/northbridge/intel/gm45/raminit.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Felix Singer: Looks good to me, approved build bot (Jenkins): Verified Felix Held: Looks good to me, approved diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c index a998d77..b7e0139 100644 --- a/src/northbridge/intel/gm45/raminit.c +++ b/src/northbridge/intel/gm45/raminit.c @@ -1965,7 +1965,7 @@ jedec_command(rankaddr, DCC_CMD_ABP, 0); jedec_command(rankaddr, DCC_CMD_CBR, 0); udelay(1); - read32((void *)(rankaddr)); + read32p(rankaddr); jedec_command(rankaddr, DCC_SET_MREG, WR | CAS | BTinterleaved | BL8); jedec_command(rankaddr, DCC_SET_EREGx(1), OCDdefault | ODT_150OHMS); -- To view, visit https://review.coreboot.org/c/coreboot/+/77971?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib1e7144eebf8148c4eb5cc0e7bc03ae3d7281092 Gerrit-Change-Number: 77971 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: nb/intel/gm45/raminit: Use read32p()
by Felix Held (Code Review) 08 Jan '24

08 Jan '24

Attention is currently required from: Arthur Heymans, Elyes Haouas, Felix Singer. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77971?usp=email ) Change subject: nb/intel/gm45/raminit: Use read32p() ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/77971?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib1e7144eebf8148c4eb5cc0e7bc03ae3d7281092 Gerrit-Change-Number: 77971 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Mon, 08 Jan 2024 13:03:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/intel/mtlrvp: streamline Chrome EC configs
by Deepti Deshatty (Code Review) 08 Jan '24

08 Jan '24

Attention is currently required from: Balaji Manigandan, Eric Lai, Felix Singer, Kapil Porwal, Krishna P Bhat D, Paul Menzel, Vijay P Hiremath. Deepti Deshatty has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79211?usp=email ) Change subject: mb/intel/mtlrvp: streamline Chrome EC configs ...................................................................... Patch Set 11: (2 comments) File src/mainboard/intel/mtlrvp/Kconfig: https://review.coreboot.org/c/coreboot/+/79211/comment/2c225aa3_cc3c121f : PS10, Line 118: config MTL_CHROME_EC_SHARED_SPI : bool "Chrome EC with external Shared SPI flash" : select MAINBOARD_USES_IFD_EC_REGION > move this into CB:79824 Done https://review.coreboot.org/c/coreboot/+/79211/comment/e531cefb_d9feb2ce : PS10, Line 129: || MTL_CHROME_EC_SHARED_SPI > move this into CB:79824 Done -- To view, visit https://review.coreboot.org/c/coreboot/+/79211?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0b85cc48d5cefadb52edbb27bf6cf370b27c395f Gerrit-Change-Number: 79211 Gerrit-PatchSet: 11 Gerrit-Owner: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Comment-Date: Mon, 08 Jan 2024 11:52:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/intel/mtlrvp: define a new config for Chrome EC
by Deepti Deshatty (Code Review) 08 Jan '24

08 Jan '24

Attention is currently required from: Balaji Manigandan, Deepti Deshatty, Deepti Deshatty, Eric Lai, Krishna P Bhat D, Vijay P Hiremath. Hello Balaji Manigandan, Deepti Deshatty, Eric Lai, Krishna P Bhat D, Subrata Banik, Vijay P Hiremath, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79824?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/intel/mtlrvp: define a new config for Chrome EC ...................................................................... mb/intel/mtlrvp: define a new config for Chrome EC Introduce new config MTL_CHROME_EC_SHARED_SPI, tailored for Chrome ECs utilizing an external shared SPI flash. BUG=b:289783489 TEST=emerge-rex coreboot chromeos-bootimage is successful Cq-Depend: chrome-internal:6691498 Cq-Depend: chrome-internal:6741356 Change-Id: I462c34c5adaefa37c652de293152243c58bad7c5 Signed-off-by: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> --- M src/mainboard/intel/mtlrvp/Kconfig 1 file changed, 7 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/79824/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/79824?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I462c34c5adaefa37c652de293152243c58bad7c5 Gerrit-Change-Number: 79824 Gerrit-PatchSet: 4 Gerrit-Owner: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: mb/intel/mtlrvp: define a new config for Chrome EC
by Subrata Banik (Code Review) 08 Jan '24

08 Jan '24

Attention is currently required from: Balaji Manigandan, Deepti Deshatty, Eric Lai, Krishna P Bhat D, Vijay P Hiremath. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79824?usp=email ) Change subject: mb/intel/mtlrvp: define a new config for Chrome EC ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79824?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I462c34c5adaefa37c652de293152243c58bad7c5 Gerrit-Change-Number: 79824 Gerrit-PatchSet: 2 Gerrit-Owner: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> Gerrit-Attention: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Comment-Date: Mon, 08 Jan 2024 11:48:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/intel/mtlrvp: define a new config for Chrome EC
by Deepti Deshatty (Code Review) 08 Jan '24

08 Jan '24

Attention is currently required from: Balaji Manigandan, Eric Lai, Krishna P Bhat D, Subrata Banik, Vijay P Hiremath. Hello Balaji Manigandan, Deepti Deshatty, Eric Lai, Krishna P Bhat D, Subrata Banik, Vijay P Hiremath, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79824?usp=email to look at the new patch set (#3). Change subject: mb/intel/mtlrvp: define a new config for Chrome EC ...................................................................... mb/intel/mtlrvp: define a new config for Chrome EC Introduce new config MTL_CHROME_EC_SHARED_SPI, tailored for Chrome ECs utilizing an external shared SPI flash. BUG=b:289783489 TEST=emerge-rex coreboot chromeos-bootimage is successful Cq-Depend: chrome-internal:6691498 Cq-Depend: chrome-internal:6741356 Change-Id: I462c34c5adaefa37c652de293152243c58bad7c5 Signed-off-by: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> --- M src/mainboard/intel/mtlrvp/Kconfig 1 file changed, 7 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/79824/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/79824?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I462c34c5adaefa37c652de293152243c58bad7c5 Gerrit-Change-Number: 79824 Gerrit-PatchSet: 3 Gerrit-Owner: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> Gerrit-Attention: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-MessageType: newpatchset

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