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Change subject: soc/intel/xeon_sp: Support multiple PCI segment groups
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> Need to give a default value for CONFIG_ECAM_SEGMENT_COUNT? […]
After I set CONFIG_ECAM_SEGMENT_COUNT to 1, I see build error for AC:
rc/soc/intel/xeon_sp/spr/ioat.c: In function 'create_ioat_domain':
src/soc/intel/xeon_sp/spr/ioat.c:51:12: error: 'struct bus' has no member named 'segment'
51 | bus->segment = upstream->segment;
| ^~
src/soc/intel/xeon_sp/spr/ioat.c:51:32: error: 'struct bus' has no member named 'segment'
51 | bus->segment = upstream->segment;
| ^~
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Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80054?usp=email )
Change subject: mb/protectli/vault_cml: Use chipset dt reference names
......................................................................
mb/protectli/vault_cml: Use chipset dt reference names
Use the references from the chipset devicetree as this makes the
comments superfluous.
Change-Id: I76ec42fccfa42bbe3943e048968a76eec3584ee8
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/protectli/vault_cml/devicetree.cb
1 file changed, 53 insertions(+), 53 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/80054/1
diff --git a/src/mainboard/protectli/vault_cml/devicetree.cb b/src/mainboard/protectli/vault_cml/devicetree.cb
index dd04aa9..740c3af 100644
--- a/src/mainboard/protectli/vault_cml/devicetree.cb
+++ b/src/mainboard/protectli/vault_cml/devicetree.cb
@@ -141,57 +141,57 @@
device cpu_cluster 0 on end
device domain 0 on
- device pci 00.0 on end # Host Bridge
- device pci 02.0 on end # Integrated Graphics Device
- device pci 04.0 on end # SA Thermal device
- device pci 08.0 off end # Gaussian Mixture Model
- device pci 12.0 on end # Thermal Subsystem
- device pci 12.5 off end # UFS SCS
- device pci 12.6 off end # GSPI #2
- device pci 14.0 on end # USB xHCI
- device pci 14.1 off end # USB xDCI (OTG)
- device pci 14.5 off end # SDCard
- device pci 15.0 off end # I2C #0
- device pci 15.1 off end # I2C #1
- device pci 15.2 off end # I2C #2
- device pci 15.3 off end # I2C #3
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 off end # Management Engine KT Redirection
- device pci 16.4 off end # Management Engine Interface 3
- device pci 16.5 off end # Management Engine Interface 4
- device pci 17.0 on end # SATA
- device pci 19.0 off end # I2C #4
- device pci 19.1 off end # I2C #5
- device pci 19.2 off end # UART #2
- device pci 1a.0 on end # eMMC
- device pci 1c.0 off end # PCI Express Port 1
- device pci 1c.1 off end # PCI Express Port 2
- device pci 1c.2 off end # PCI Express Port 3
- device pci 1c.3 off end # PCI Express Port 4
- device pci 1c.4 on end # PCI Express Port 5 LAN1
- device pci 1c.5 on end # PCI Express Port 6 LAN2
- device pci 1c.6 on end # PCI Express Port 7 LAN3
- device pci 1c.7 on end # PCI Express Port 8 LAN4
- device pci 1d.0 on end # PCI Express Port 9 LAN5
- device pci 1d.1 on end # PCI Express Port 10 LAN6
- device pci 1d.2 off end # PCI Express Port 11
- device pci 1d.3 on end # PCI Express Port 12 M.2 WiFi
+ device ref system_agent on end
+ device ref igpu on end
+ device ref dptf on end
+ device ref gna off end
+ device ref thermal on end
+ device ref ufs off end
+ device ref gspi2 off end
+ device ref xhci on end
+ device ref xdci off end
+ device ref sdxc off end
+ device ref i2c0 off end
+ device ref i2c1 off end
+ device ref i2c2 off end
+ device ref i2c3 off end
+ device ref heci1 on end
+ device ref heci2 off end
+ device ref csme_ider off end
+ device ref csme_ktr off end
+ device ref heci3 off end
+ device ref heci4 off end
+ device ref sata on end
+ device ref i2c4 off end
+ device ref i2c5 off end
+ device ref uart2 off end
+ device ref emmc on end
+ device ref pcie_rp1 off end
+ device ref pcie_rp2 off end
+ device ref pcie_rp3 off end
+ device ref pcie_rp4 off end
+ device ref pcie_rp5 on end # LAN1
+ device ref pcie_rp6 on end # LAN2
+ device ref pcie_rp7 on end # LAN3
+ device ref pcie_rp8 on end # LAN4
+ device ref pcie_rp9 on end # LAN5
+ device ref pcie_rp10 on end # LAN6
+ device ref pcie_rp11 off end
+ device ref pcie_rp12 on end
smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther"
"M.2/E 2230 (M2_WIFI2)" "SlotDataBusWidth1X"
- device pci 1d.4 on # PCI Express Port 13 NVMe
+ device ref pcie_rp13 on # NVMe
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther"
"M.2/M 2280 (J1)" "SlotDataBusWidth4X"
end
- device pci 1d.5 off end # PCI Express Port 14
- device pci 1d.6 off end # PCI Express Port 15
- device pci 1d.7 off end # PCI Express Port 16
- device pci 1e.0 off end # UART #0
- device pci 1e.1 off end # UART #1
- device pci 1e.2 off end # GSPI #0
- device pci 1e.3 off end # GSPI #1
- device pci 1f.0 on
+ device ref pcie_rp14 off end
+ device ref pcie_rp15 off end
+ device ref pcie_rp16 off end
+ device ref uart0 off end
+ device ref uart1 off end
+ device ref gspi0 off end
+ device ref gspi1 off end
+ device ref lpc_espi on
chip superio/ite/it8784e
register "TMPIN1.mode" = "THERMAL_RESISTOR"
register "TMPIN2.mode" = "THERMAL_MODE_DISABLED"
@@ -231,12 +231,12 @@
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
- end # LPC Interface
- device pci 1f.1 hidden end # P2SB
- device pci 1f.2 hidden end # Power Management Controller
- device pci 1f.3 on end # Intel HDA
- device pci 1f.4 on end # SMBus
- device pci 1f.5 on end # PCH SPI
- device pci 1f.6 off end # GbE
+ end
+ device ref p2sb hidden end
+ device ref pmc hidden end
+ device ref hda on end
+ device ref smbus on end
+ device ref fast_spi on end
+ device ref gbe off end
end
end
--
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Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79878?usp=email )
Change subject: soc/intel/xeon_sp: Support multiple PCI segment groups
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
Need to give a default value for CONFIG_ECAM_SEGMENT_COUNT?
src/soc/intel/xeon_sp/spr/soc_util.c:150:22: error: 'CONFIG_ECAM_SEGMENT_COUNT' undeclared (first use in this function); did you mean 'CONFIG_IRQ_SLOT_COUNT'?
150 | assert(seg < CONFIG_ECAM_SEGMENT_COUNT);
| ^~~~~~~~~~~~~~~~~~~~~~~~~
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Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80053?usp=email )
Change subject: mb/dell/snb_ivb_workst: Remove superfluous comments about PCI devices
......................................................................
mb/dell/snb_ivb_workst: Remove superfluous comments about PCI devices
Since all devicetrees from dell/snb_ivb_workstation are using the
reference names for PCI devices now, remove the equivalent comments
documenting their function.
Change-Id: Iac70aa25dd324e1ed5fa0bb995eb995ec3545715
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb
M src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb
M src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb
3 files changed, 37 insertions(+), 37 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/80053/1
diff --git a/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb b/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb
index bf04692..28c8d05 100644
--- a/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb
+++ b/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb
@@ -7,12 +7,12 @@
end
device domain 0 on
- device ref host_bridge on end # Host bridge Host bridge
- device ref peg10 on # PEG1 (blue slot1)
+ device ref host_bridge on end
+ device ref peg10 on # blue slot1
smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthLong" "SLOT1" "SlotDataBusWidth16X"
end
- device ref igd on end # Internal graphics VGA controller
- device ref peg60 off end # PEG2
+ device ref igd on end
+ device ref peg60 off end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "gpe0_en" = "0x00002a46"
@@ -30,25 +30,25 @@
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x08040201"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref mei1 off end # Management Engine Interface 1
- device ref mei2 off end # Management Engine Interface 2
- device ref me_ide_r off end # Management Engine IDE-R
- device ref me_kt off end # Management Engine KT
- device ref gbe on end # Intel Gigabit Ethernet
- device ref ehci2 on end # USB2 EHCI #2
- device ref hda on end # High Definition Audio controller
- device ref pcie_rp1 off end # PCIe Port #1
- device ref pcie_rp2 off end # PCIe Port #2
- device ref pcie_rp3 off end # PCIe Port #3
- device ref pcie_rp4 off end # PCIe Port #4
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref ehci1 on end # USB2 EHCI #1
- device ref pci_bridge off end # PCI bridge
- device ref lpc on # LPC bridge
+ device ref xhci on end
+ device ref mei1 off end
+ device ref mei2 off end
+ device ref me_ide_r off end
+ device ref me_kt off end
+ device ref gbe on end
+ device ref ehci2 on end
+ device ref hda on end
+ device ref pcie_rp1 off end
+ device ref pcie_rp2 off end
+ device ref pcie_rp3 off end
+ device ref pcie_rp4 off end
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref ehci1 on end
+ device ref pci_bridge off end
+ device ref lpc on
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
@@ -78,10 +78,10 @@
device pnp 2e.11 off end # PP
end
end
- device ref sata1 on end # SATA Controller 1
- device ref smbus on end # SMBus
- device ref sata2 off end # SATA Controller 2
- device ref thermal on end # Thermal
+ device ref sata1 on end
+ device ref smbus on end
+ device ref sata2 off end
+ device ref thermal on end
end
end
end
diff --git a/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb b/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb
index c17593a..a59d57c 100644
--- a/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb
+++ b/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb
@@ -3,12 +3,12 @@
subsystemid 0x1028 0x052c inherit
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "sata_port_map" = "0x7"
- device ref pcie_rp5 on # PCIe Port #5
+ device ref pcie_rp5 on
smbios_slot_desc "SlotTypePciExpressGen2X16" "SlotLengthLong" "SLOT2" "SlotDataBusWidth4X"
end
- device ref pcie_rp6 on end # PCIe Port #6
- device ref pcie_rp7 on end # PCIe Port #7
- device ref pcie_rp8 on end # PCIe Port #8
+ device ref pcie_rp6 on end
+ device ref pcie_rp7 on end
+ device ref pcie_rp8 on end
end
end
end
diff --git a/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb b/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb
index fbc21d8..bbc1bf9 100644
--- a/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb
+++ b/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb
@@ -4,16 +4,16 @@
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "sata_port_map" = "0xf"
- device ref pcie_rp3 on # PCIe Port #3
+ device ref pcie_rp3 on
smbios_slot_desc "SlotTypePciExpressGen2X1" "SlotLengthShort" "SLOT2" "SlotDataBusWidth1X"
end
- device ref pcie_rp5 on # PCIe Port #5
+ device ref pcie_rp5 on
smbios_slot_desc "SlotTypePciExpressGen2X16" "SlotLengthLong" "SLOT4" "SlotDataBusWidth4X"
end
- device ref pcie_rp6 on end # PCIe Port #6
- device ref pcie_rp7 on end # PCIe Port #7
- device ref pcie_rp8 on end # PCIe Port #8
- device ref pci_bridge on # PCI bridge
+ device ref pcie_rp6 on end
+ device ref pcie_rp7 on end
+ device ref pcie_rp8 on end
+ device ref pci_bridge on
smbios_slot_desc "SlotTypePci" "SlotLengthLong" "SLOT3" "SlotDataBusWidth32Bit"
end
end
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Change subject: mb/dell/snb_ivb_workst: Convert remaining PCI numbers into references
......................................................................
mb/dell/snb_ivb_workst: Convert remaining PCI numbers into references
Change-Id: I9c6d931d5d5650eb5818116050f9f599a815c315
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb
M src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb
2 files changed, 10 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/80052/1
diff --git a/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb b/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb
index bfe453f..c17593a 100644
--- a/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb
+++ b/src/mainboard/dell/snb_ivb_workstations/variants/optiplex_9010_sff/overridetree.cb
@@ -3,12 +3,12 @@
subsystemid 0x1028 0x052c inherit
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "sata_port_map" = "0x7"
- device pci 1c.4 on # PCIe Port #5
+ device ref pcie_rp5 on # PCIe Port #5
smbios_slot_desc "SlotTypePciExpressGen2X16" "SlotLengthLong" "SLOT2" "SlotDataBusWidth4X"
end
- device pci 1c.5 on end # PCIe Port #6
- device pci 1c.6 on end # PCIe Port #7
- device pci 1c.7 on end # PCIe Port #8
+ device ref pcie_rp6 on end # PCIe Port #6
+ device ref pcie_rp7 on end # PCIe Port #7
+ device ref pcie_rp8 on end # PCIe Port #8
end
end
end
diff --git a/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb b/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb
index 81133ee..fbc21d8 100644
--- a/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb
+++ b/src/mainboard/dell/snb_ivb_workstations/variants/precision_t1650/overridetree.cb
@@ -4,16 +4,16 @@
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "sata_port_map" = "0xf"
- device pci 1c.2 on # PCIe Port #3
+ device ref pcie_rp3 on # PCIe Port #3
smbios_slot_desc "SlotTypePciExpressGen2X1" "SlotLengthShort" "SLOT2" "SlotDataBusWidth1X"
end
- device pci 1c.4 on # PCIe Port #5
+ device ref pcie_rp5 on # PCIe Port #5
smbios_slot_desc "SlotTypePciExpressGen2X16" "SlotLengthLong" "SLOT4" "SlotDataBusWidth4X"
end
- device pci 1c.5 on end # PCIe Port #6
- device pci 1c.6 on end # PCIe Port #7
- device pci 1c.7 on end # PCIe Port #8
- device pci 1e.0 on # PCI bridge
+ device ref pcie_rp6 on end # PCIe Port #6
+ device ref pcie_rp7 on end # PCIe Port #7
+ device ref pcie_rp8 on end # PCIe Port #8
+ device ref pci_bridge on # PCI bridge
smbios_slot_desc "SlotTypePci" "SlotLengthLong" "SLOT3" "SlotDataBusWidth32Bit"
end
end
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Gerrit-Change-Id: I9c6d931d5d5650eb5818116050f9f599a815c315
Gerrit-Change-Number: 80052
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-MessageType: newchange
Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80051?usp=email )
Change subject: mb/starlabs/starbook/cml: Use chipset dt reference names
......................................................................
mb/starlabs/starbook/cml: Use chipset dt reference names
Use the references from the chipset devicetree as this makes the
comments superfluous.
Change-Id: Ia004de6606a1685822d5567123887c60d89e3119
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/starlabs/starbook/variants/cml/devicetree.cb
1 file changed, 49 insertions(+), 49 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/80051/1
diff --git a/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb b/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb
index 9a71015..5757439 100644
--- a/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb
+++ b/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb
@@ -53,15 +53,15 @@
device cpu_cluster 0 on end
device domain 0 on
- device pci 00.0 on end # Host Bridge
- device pci 02.0 on end # Integrated Graphics Device
- device pci 04.0 on # SA Thermal Device
+ device ref system_agent on end
+ device ref igpu on end
+ device ref dptf on
register "Device4Enable" = "1"
end
- device pci 12.0 off end # Thermal Subsystem
- device pci 12.5 off end # UFS SCS
- device pci 12.6 off end # GSPI #2
- device pci 14.0 on # USB xHCI
+ device ref thermal off end
+ device ref ufs off end
+ device ref gspi2 off end
+ device ref xhci on
# Motherboard USB Type C
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
@@ -83,16 +83,16 @@
# Internal Bluetooth
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"
end
- device pci 14.1 off end # USB xDCI (OTG)
- device pci 14.2 on end # SRAM
- device pci 14.3 on # CNVi
+ device ref xdci off end
+ device ref shared_sram on end
+ device ref cnvi_wifi on
chip drivers/wifi/generic
register "wake" = "GPE0_PME_B0"
device generic 0 on end
end
end
- device pci 14.5 off end # SDCard
- device pci 15.0 on # I2C0
+ device ref sdxc off end
+ device ref i2c0 on
chip drivers/i2c/hid
register "generic.hid" = ""STAR0001""
register "generic.desc" = ""Touchpad""
@@ -102,34 +102,34 @@
device i2c 2c on end
end
end
- device pci 15.1 off end # I2C1
- device pci 15.2 off end # I2C2
- device pci 15.3 off end # I2C3
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 off end # Management Engine KT Redirection
- device pci 16.4 off end # Management Engine Interface 3
- device pci 16.5 off end # Management Engine Interface 4
- device pci 17.0 on # SATA
+ device ref i2c1 off end
+ device ref i2c2 off end
+ device ref i2c3 off end
+ device ref heci1 on end
+ device ref heci2 off end
+ device ref csme_ider off end
+ device ref csme_ktr off end
+ device ref heci3 off end
+ device ref heci4 off end
+ device ref sata on
register "SataSalpSupport" = "1"
# Port 1
register "SataPortsEnable[1]" = "1"
register "SataPortsDevSlp[1]" = "1"
end
- device pci 19.0 on end # I2C4
- device pci 19.1 off end # I2C5
- device pci 19.2 on end # UART #2
- device pci 1a.0 off end # eMMC
- device pci 1c.0 off end # PCI Express Port 1
- device pci 1c.1 off end # PCI Express Port 2
- device pci 1c.2 off end # PCI Express Port 3
- device pci 1c.3 off end # PCI Express Port 4
- device pci 1c.4 off end # PCI Express Port 5
- device pci 1c.5 off end # PCI Express Port 6
- device pci 1c.6 off end # PCI Express Port 7
- device pci 1c.7 off end # PCI Express Port 8
- device pci 1d.0 on # PCI Express Port 9 (SSD x4)
+ device ref i2c4 on end
+ device ref i2c5 off end
+ device ref uart2 on end
+ device ref emmc off end
+ device ref pcie_rp1 off end
+ device ref pcie_rp2 off end
+ device ref pcie_rp3 off end
+ device ref pcie_rp4 off end
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref pcie_rp9 on # SSD x4
register "PcieRpSlotImplemented[8]" = "1"
register "PcieRpEnable[8]" = "1"
register "PcieRpLtrEnable[8]" = "1"
@@ -137,14 +137,14 @@
register "PcieClkSrcClkReq[1]" = "1"
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X"
end
- device pci 1d.1 off end # PCI Express Port 10
- device pci 1d.2 off end # PCI Express Port 11
- device pci 1d.3 off end # PCI Express Port 12
- device pci 1e.0 off end # UART #0
- device pci 1e.1 off end # UART #1
- device pci 1e.2 off end # GSPI #0
- device pci 1e.3 off end # GSPI #1
- device pci 1f.0 on # LPC Interface
+ device ref pcie_rp10 off end
+ device ref pcie_rp11 off end
+ device ref pcie_rp12 off end
+ device ref uart0 off end
+ device ref uart1 off end
+ device ref gspi0 off end
+ device ref gspi1 off end
+ device ref lpc_espi on
register "gen1_dec" = "0x000c0681"
register "gen2_dec" = "0x000c1641"
register "gen3_dec" = "0x00fc0201"
@@ -174,14 +174,14 @@
device pnp 4e.19 off end # Power Management Channel 5
end
end
- device pci 1f.1 on end # P2SB
- device pci 1f.2 hidden end # Power Management Controller
- device pci 1f.3 on # Intel HDA
+ device ref p2sb on end
+ device ref pmc hidden end
+ device ref hda on
register "PchHdaAudioLinkHda" = "1"
end
- device pci 1f.4 on end # SMBus
- device pci 1f.5 on end # PCH SPI
- device pci 1f.6 off end # GbE
+ device ref smbus on end
+ device ref fast_spi on end
+ device ref gbe off end
end
chip drivers/crb
device mmio 0xfed40000 on end
--
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ia004de6606a1685822d5567123887c60d89e3119
Gerrit-Change-Number: 80051
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-MessageType: newchange
Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80050?usp=email )
Change subject: mb/prodrive/hermes: Use chipset dt reference names
......................................................................
mb/prodrive/hermes: Use chipset dt reference names
Use the references from the chipset devicetree as this makes the
comments superfluous.
Change-Id: I81dd67fd200768942fe355180b75db0746cda8ea
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/prodrive/hermes/devicetree.cb
1 file changed, 41 insertions(+), 41 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/80050/1
diff --git a/src/mainboard/prodrive/hermes/devicetree.cb b/src/mainboard/prodrive/hermes/devicetree.cb
index 024b97d..ea9f673 100644
--- a/src/mainboard/prodrive/hermes/devicetree.cb
+++ b/src/mainboard/prodrive/hermes/devicetree.cb
@@ -139,44 +139,44 @@
device cpu_cluster 0 on end
device domain 0 on
- device pci 00.0 on end # Host Bridge
- device pci 01.0 on # PEG x8 / Slot 2
+ device ref system_agent on end
+ device ref peg0 on # x8 / Slot 2
smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "SLOT2" "SlotDataBusWidth8X"
end
- device pci 01.1 on # PEG x4 or x8 / Slot 6
+ device ref peg1 on # x4 or x8 / Slot 6
smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "SLOT6" "SlotDataBusWidth4X"
end
- device pci 01.2 on # PEG x4 or disabled / Slot 4
+ device ref peg2 on # x4 or disabled / Slot 4
smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "SLOT4" "SlotDataBusWidth4X"
end
- device pci 02.0 on end # Integrated Graphics Device
- device pci 04.0 on end # SA Thermal device
- device pci 08.0 on end # Gaussian Mixture
- device pci 12.0 on end # Thermal Subsystem
- device pci 14.0 on end # USB xHCI
- device pci 14.1 off end # USB xDCI (OTG)
- device pci 14.2 on end # RAM controller
- device pci 14.3 on
+ device ref igpu on end
+ device ref dptf on end
+ device ref gna on end
+ device ref thermal on end
+ device ref xhci on end
+ device ref xdci off end
+ device ref shared_sram on end
+ device ref cnvi_wifi on
chip drivers/wifi/generic
register "wake" = "PME_B0_EN_BIT"
device generic 0 on end
end
- end # CNVi wifi
- device pci 14.5 off end # SDCard
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 on end # Management Engine Interface 2
- device pci 16.4 off end # Management Engine Interface 3
- device pci 17.0 on end # SATA
+ end
+ device ref sdxc off end
+ device ref heci1 on end
+ device ref heci2 on end
+ device ref heci3 off end
+ device ref sata on end
# This device does not have any function on CNP-H, but it needs
# to be here so that the resource allocator is aware of UART 2.
- device pci 19.0 hidden end
- device pci 19.2 hidden
+ device ref i2c4 hidden end
+ device ref uart2 hidden # in ACPI mode
chip soc/intel/common/block/uart
register "devid" = "PCI_DID_INTEL_CNP_H_UART2"
device generic 0 hidden end
end
- end # UART #2, in ACPI mode
- device pci 1b.4 on # PCIe root port 21 (Slot 1)
+ end
+ device ref pcie_rp21 on
smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "SLOT1" "SlotDataBusWidth4X"
register "PcieRpEnable[20]" = "1"
register "PcieRpLtrEnable[20]" = "1"
@@ -185,7 +185,7 @@
register "PcieRpAdvancedErrorReporting[20]" = "1"
register "PcieRpAspm[20]" = "AspmDisabled"
end
- device pci 1c.0 on # PCIe root port 1 (Slot 3)
+ device ref pcie_rp1 on
smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "SLOT3" "SlotDataBusWidth4X"
register "PcieRpEnable[0]" = "1"
register "PcieRpLtrEnable[0]" = "1"
@@ -194,48 +194,48 @@
register "PcieRpAdvancedErrorReporting[0]" = "1"
register "PcieRpAspm[0]" = "AspmDisabled"
end
- device pci 1c.4 on # PCIe root port 5 (PHY 3)
+ device ref pcie_rp5 on # PHY 3
register "PcieRpEnable[4]" = "1"
register "PcieRpLtrEnable[4]" = "1"
device pci 00.0 on
smbios_dev_info 3
end
end
- device pci 1c.5 on # PCIe root port 6 (PHY 4)
+ device ref pcie_rp6 on # PHY 4
register "PcieRpEnable[5]" = "1"
register "PcieRpLtrEnable[5]" = "1"
device pci 00.0 on
smbios_dev_info 4
end
end
- device pci 1c.6 on # PCIe root port 7 (PHY 2)
+ device ref pcie_rp7 on # PHY 2
register "PcieRpEnable[6]" = "1"
register "PcieRpLtrEnable[6]" = "1"
device pci 00.0 on
smbios_dev_info 2
end
end
- device pci 1c.7 on # PCIe root port 8 (PHY 1)
+ device ref pcie_rp8 on # PHY 1
register "PcieRpEnable[7]" = "1"
register "PcieRpLtrEnable[7]" = "1"
device pci 00.0 on
smbios_dev_info 1
end
end
- device pci 1d.0 on # PCIe root port 9 (M2 M)
+ device ref pcie_rp9 on
smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "M2 M" "SlotDataBusWidth4X"
register "PcieRpEnable[8]" = "1"
register "PcieRpLtrEnable[8]" = "1"
register "PcieRpSlotImplemented[8]" = "1"
end
- device pci 1d.5 on # PCIe root port 14 (PHY 0)
+ device ref pcie_rp14 on # PHY 0
register "PcieRpEnable[13]" = "1"
register "PcieRpLtrEnable[13]" = "1"
device pci 00.0 on
smbios_dev_info 0
end
end
- device pci 1d.6 on # PCIe root port 15 (BMC)
+ device ref pcie_rp15 on # BMC
device pci 00.0 on # Aspeed PCI Bridge
device pci 00.0 on end # Aspeed 2500 VGA
end
@@ -243,26 +243,26 @@
register "PcieRpLtrEnable[14]" = "1"
register "PcieRpSlotImplemented[14]" = "1"
end
- device pci 1d.7 on # PCIe root port 16 (M.2 E/CNVi)
+ device ref pcie_rp16 on # M.2 E/CNVi
# Disabled when CNVi is present
register "PcieRpEnable[15]" = "1"
register "PcieRpLtrEnable[15]" = "1"
register "PcieRpSlotImplemented[15]" = "1"
end
- device pci 1e.0 on end # UART #0
- device pci 1e.1 on end # UART #1
- device pci 1e.2 off end # GSPI #0
- device pci 1e.3 off end # GSPI #1
- device pci 1f.0 on # LPC Interface
+ device ref uart0 on end
+ device ref uart1 on end
+ device ref gspi0 off end
+ device ref gspi1 off end
+ device ref lpc_espi on
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
# AST2500, but not enabled to decode LPC cycles
end
- device pci 1f.1 on end # P2SB
- device pci 1f.2 hidden end # Power Management Controller
- device pci 1f.3 on end # Intel HDA
- device pci 1f.4 on end # SMBus
- device pci 1f.5 on end # PCH SPI
+ device ref p2sb on end
+ device ref pmc hidden end
+ device ref hda on end
+ device ref smbus on end
+ device ref fast_spi on end
end
end
--
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I81dd67fd200768942fe355180b75db0746cda8ea
Gerrit-Change-Number: 80050
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-MessageType: newchange
Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80049?usp=email )
Change subject: mb/hp/snb_ivb_laptops: Remove superfluous comments about PCI devices
......................................................................
mb/hp/snb_ivb_laptops: Remove superfluous comments about PCI devices
Since all devicetrees from hp/snb_ivb_desktops are using the reference
names for PCI devices now, remove the equivalent comments documenting
their function.
Change-Id: I42b680f753fb2ed8bc0ae8b5bfb20ee8a7cf8bdb
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/hp/snb_ivb_laptops/devicetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
11 files changed, 129 insertions(+), 129 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/80049/1
diff --git a/src/mainboard/hp/snb_ivb_laptops/devicetree.cb b/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
index 42dc4bd..e051512 100644
--- a/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
@@ -19,7 +19,7 @@
device domain 0 on
- device ref host_bridge on end # Host bridge
+ device ref host_bridge on end
chip southbridge/intel/bd82x6x # Intel Cougar or Panther Point PCH
register "pcie_port_coalesce" = "true"
@@ -27,24 +27,24 @@
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0"
- device ref mei1 on end # Management Engine Interface 1
- device ref mei2 off end # Management Engine Interface 2
- device ref me_ide_r off end # Management Engine IDE-R
- device ref me_kt off end # Management Engine KT
- device ref gbe on end # Intel Gigabit Ethernet
- device ref ehci2 on end # USB2 EHCI #2
- device ref hda on end # HD Audio controller
- device ref ehci1 on end # USB2 EHCI #1
- device ref pci_bridge off end # PCI bridge
- device ref lpc on # LPC bridge
+ device ref mei1 on end
+ device ref mei2 off end
+ device ref me_ide_r off end
+ device ref me_kt off end
+ device ref gbe on end
+ device ref ehci2 on end
+ device ref hda on end
+ device ref ehci1 on end
+ device ref pci_bridge off end
+ device ref lpc on
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
- device ref sata1 on end # SATA Controller 1
- device ref smbus on end # SMBus
- device ref sata2 off end # SATA Controller 2
- device ref thermal off end # Thermal
+ device ref sata1 on end
+ device ref smbus on end
+ device ref sata2 off end
+ device ref thermal off end
end
end
end
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
index 433d798..8e9688f 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x1815 inherit
- device ref peg10 off end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -24,17 +24,17 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref mei1 on end # Management Engine KT
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 off end # PCIe Port #2
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
- device ref pcie_rp4 on end # PCIe Port #4, WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref xhci on end
+ device ref mei1 on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 off end
+ device ref pcie_rp3 on end # SD/MMC
+ device ref pcie_rp4 on end # WLAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
index a7b36e8..c73786a 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x162b inherit
- device ref peg10 off end # PEG
- device ref igd on end # iGPU
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -21,24 +21,24 @@
# HDD(0), ODD(1), eSATA(4), dock eSATA(5)
register "sata_port_map" = "0x33"
- device ref pcie_rp1 off end # PCIe Port #1
- device ref pcie_rp2 on # PCIe Port #2, ExpressCard
+ device ref pcie_rp1 off end
+ device ref pcie_rp2 on
smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort"
"ExpressCard Slot" "SlotDataBusWidth1X"
end
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC Host Controller
- device ref pcie_rp4 on # PCIe Port #4, WLAN
+ device ref pcie_rp3 on end # SD/MMC Host Controller
+ device ref pcie_rp4 on # WLAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthShort" "Mini PCIe" "SlotDataBusWidth1X"
end
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 on # PCIe Port #7, WWAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 on # WWAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthLong" "Mini PCIe" "SlotDataBusWidth1X"
end
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
index ced850a..b1cc9fe 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x17df inherit
- device ref peg10 off end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -23,16 +23,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
- device ref pcie_rp4 on end # PCIe Port #4, WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref xhci on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end # ExpressCard
+ device ref pcie_rp3 on end # SD/MMC
+ device ref pcie_rp4 on end # WLAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
index bd976bc..8299cce 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x162a inherit
- device ref peg10 off end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -20,15 +20,15 @@
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "sata_port_map" = "0x21"
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end # ExpressCard
+ device ref pcie_rp3 on end # SD/MMC
device ref pcie_rp4 on end # WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 on end # PCIe Port #7, WWAN
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 on end # WWAN
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
index 8d4d23f..b87c80a 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x161c inherit
- device ref peg10 on end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 on end # discrete graphics
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -21,16 +21,16 @@
# HDD(0), ODD(1), docking(3,5), eSATA(4)
register "sata_port_map" = "0x3b"
- device ref me_kt on end # Management Engine KT
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
- device ref pcie_rp4 on end # PCIe Port #4, WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 on end # PCIe Port #7, WWAN
- device ref pcie_rp8 on end # PCIe Port #8, NEC USB 3.0 Host Controller
- device ref lpc on # LPC bridge
+ device ref me_kt on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end # ExpressCard
+ device ref pcie_rp3 on end # SD/MMC
+ device ref pcie_rp4 on end # WLAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 on end # WWAN
+ device ref pcie_rp8 on end # NEC USB 3.0 Host Controller
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
index 653c5ab..b02b2f9 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x179b inherit
- device ref peg10 on end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 on end # discrete graphics
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -24,17 +24,17 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref me_kt on end # Management Engine KT
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
- device ref pcie_rp4 on end # PCIe Port #4, WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref xhci on end
+ device ref me_kt on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end # ExpressCard
+ device ref pcie_rp3 on end # SD/MMC
+ device ref pcie_rp4 on end # WLAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
index 548a70f..d30f179 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
@@ -5,11 +5,11 @@
device domain 0 on
subsystemid 0x103c 0x176c inherit
- device ref peg10 on # PCIe Bridge for discrete graphics
+ device ref peg10 on # discrete graphics
device pci 00.0 on end # GPU
device pci 00.1 on end # HDMI Audio on GPU
end
- device ref igd off end # Internal graphics
+ device ref igd off end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "docking_supported" = "0"
@@ -25,16 +25,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on end # PCIe Port #2
+ device ref xhci on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end
device ref pcie_rp3 on end # Media Card and FireWire host controller
device ref pcie_rp4 on end # Wireless LAN Adapter
device ref pcie_rp5 on end # SATA Controller 2 for dock
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
index 2f38cb6..1e690b5 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x18df inherit
- device ref peg10 off end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -23,16 +23,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 off end # PCIe Port #2
- device ref pcie_rp3 on end # PCIe Port #3 SDHCI
- device ref pcie_rp4 on end # PCIe Port #4 WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref xhci on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 off end
+ device ref pcie_rp3 on end # SDHCI
+ device ref pcie_rp4 on end # WLAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
index 16551d2..b76fe5b 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
@@ -6,8 +6,8 @@
device domain 0 on
subsystemid 0x103c 0x1621 inherit
- device ref peg10 off end # PEG
- device ref igd on end # iGPU
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "gen1_dec" = "0x007c0201"
@@ -20,20 +20,20 @@
# FIXME: ports 3, 5 are untested
register "sata_port_map" = "0x3b"
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on # PCIe Port #2, ExpressCard
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on
smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort"
"ExpressCard Slot" "SlotDataBusWidth1X"
end
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC and FireWire
- device ref pcie_rp4 on # PCIe Port #4, WLAN
+ device ref pcie_rp3 on end # SD/MMC and FireWire
+ device ref pcie_rp4 on # WLAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthShort" "Mini PCIe" "SlotDataBusWidth1X"
end
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 on end # PCIe Port #7, WWAN
- device ref pcie_rp8 off end # PCIe Port #8
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 on end # WWAN
+ device ref pcie_rp8 off end
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
index 6701733..2e36371 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x18f8 inherit
- device ref peg10 off end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -23,16 +23,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 off end # PCIe Port #2
- device ref pcie_rp3 on end # PCIe Port #3
- device ref pcie_rp4 on end # PCIe Port #4
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref xhci on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 off end
+ device ref pcie_rp3 on end
+ device ref pcie_rp4 on end
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
--
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I42b680f753fb2ed8bc0ae8b5bfb20ee8a7cf8bdb
Gerrit-Change-Number: 80049
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-MessageType: newchange
Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80048?usp=email )
Change subject: mb/hp/snb_ivb_laptops: Convert remaining PCI numbers into references
......................................................................
mb/hp/snb_ivb_laptops: Convert remaining PCI numbers into references
Change-Id: I58e5dfa57856e80d1a5e4a6fab0b2523301fa8f2
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
10 files changed, 119 insertions(+), 119 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/80048/1
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
index 8f35eee..433d798 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x1815 inherit
- device pci 01.0 off end # PCIe Bridge for discrete graphics
- device pci 02.0 on end # Internal graphics
+ device ref peg10 off end # PCIe Bridge for discrete graphics
+ device ref igd on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -24,17 +24,17 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device pci 14.0 on end # USB 3.0 Controller
- device pci 16.0 on end # Management Engine KT
- device pci 1c.0 on end # PCIe Port #1
- device pci 1c.1 off end # PCIe Port #2
- device pci 1c.2 on end # PCIe Port #3, SD/MMC
- device pci 1c.3 on end # PCIe Port #4, WLAN
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 off end # PCIe Port #7
- device pci 1c.7 off end # PCIe Port #8
- device pci 1f.0 on # LPC bridge
+ device ref xhci on end # USB 3.0 Controller
+ device ref mei1 on end # Management Engine KT
+ device ref pcie_rp1 on end # PCIe Port #1
+ device ref pcie_rp2 off end # PCIe Port #2
+ device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
+ device ref pcie_rp4 on end # PCIe Port #4, WLAN
+ device ref pcie_rp5 off end # PCIe Port #5
+ device ref pcie_rp6 off end # PCIe Port #6
+ device ref pcie_rp7 off end # PCIe Port #7
+ device ref pcie_rp8 off end # PCIe Port #8
+ device ref lpc on # LPC bridge
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
index d69a21e..a7b36e8 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x162b inherit
- device pci 01.0 off end # PEG
- device pci 02.0 on end # iGPU
+ device ref peg10 off end # PEG
+ device ref igd on end # iGPU
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -21,24 +21,24 @@
# HDD(0), ODD(1), eSATA(4), dock eSATA(5)
register "sata_port_map" = "0x33"
- device pci 1c.0 off end # PCIe Port #1
- device pci 1c.1 on # PCIe Port #2, ExpressCard
+ device ref pcie_rp1 off end # PCIe Port #1
+ device ref pcie_rp2 on # PCIe Port #2, ExpressCard
smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort"
"ExpressCard Slot" "SlotDataBusWidth1X"
end
- device pci 1c.2 on end # PCIe Port #3, SD/MMC Host Controller
- device pci 1c.3 on # PCIe Port #4, WLAN
+ device ref pcie_rp3 on end # PCIe Port #3, SD/MMC Host Controller
+ device ref pcie_rp4 on # PCIe Port #4, WLAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthShort" "Mini PCIe" "SlotDataBusWidth1X"
end
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 on # PCIe Port #7, WWAN
+ device ref pcie_rp5 off end # PCIe Port #5
+ device ref pcie_rp6 off end # PCIe Port #6
+ device ref pcie_rp7 on # PCIe Port #7, WWAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthLong" "Mini PCIe" "SlotDataBusWidth1X"
end
- device pci 1c.7 off end # PCIe Port #8
- device pci 1f.0 on # LPC bridge
+ device ref pcie_rp8 off end # PCIe Port #8
+ device ref lpc on # LPC bridge
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
index d89492f..ced850a 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x17df inherit
- device pci 01.0 off end # PCIe Bridge for discrete graphics
- device pci 02.0 on end # Internal graphics
+ device ref peg10 off end # PCIe Bridge for discrete graphics
+ device ref igd on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -23,16 +23,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device pci 14.0 on end # USB 3.0 Controller
- device pci 1c.0 on end # PCIe Port #1
- device pci 1c.1 on end # PCIe Port #2, ExpressCard
- device pci 1c.2 on end # PCIe Port #3, SD/MMC
- device pci 1c.3 on end # PCIe Port #4, WLAN
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 off end # PCIe Port #7
- device pci 1c.7 off end # PCIe Port #8
- device pci 1f.0 on # LPC bridge
+ device ref xhci on end # USB 3.0 Controller
+ device ref pcie_rp1 on end # PCIe Port #1
+ device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
+ device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
+ device ref pcie_rp4 on end # PCIe Port #4, WLAN
+ device ref pcie_rp5 off end # PCIe Port #5
+ device ref pcie_rp6 off end # PCIe Port #6
+ device ref pcie_rp7 off end # PCIe Port #7
+ device ref pcie_rp8 off end # PCIe Port #8
+ device ref lpc on # LPC bridge
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
index d911112..bd976bc 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x162a inherit
- device pci 01.0 off end # PCIe Bridge for discrete graphics
- device pci 02.0 on end # Internal graphics
+ device ref peg10 off end # PCIe Bridge for discrete graphics
+ device ref igd on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -20,15 +20,15 @@
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "sata_port_map" = "0x21"
- device pci 1c.0 on end # PCIe Port #1
- device pci 1c.1 on end # PCIe Port #2, ExpressCard
- device pci 1c.2 on end # PCIe Port #3, SD/MMC
- device pci 1c.3 on end # WLAN
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 on end # PCIe Port #7, WWAN
- device pci 1c.7 off end # PCIe Port #8
- device pci 1f.0 on # LPC bridge
+ device ref pcie_rp1 on end # PCIe Port #1
+ device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
+ device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
+ device ref pcie_rp4 on end # WLAN
+ device ref pcie_rp5 off end # PCIe Port #5
+ device ref pcie_rp6 off end # PCIe Port #6
+ device ref pcie_rp7 on end # PCIe Port #7, WWAN
+ device ref pcie_rp8 off end # PCIe Port #8
+ device ref lpc on # LPC bridge
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
index 02dc6a4..8d4d23f 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x161c inherit
- device pci 01.0 on end # PCIe Bridge for discrete graphics
- device pci 02.0 on end # Internal graphics
+ device ref peg10 on end # PCIe Bridge for discrete graphics
+ device ref igd on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -21,16 +21,16 @@
# HDD(0), ODD(1), docking(3,5), eSATA(4)
register "sata_port_map" = "0x3b"
- device pci 16.3 on end # Management Engine KT
- device pci 1c.0 on end # PCIe Port #1
- device pci 1c.1 on end # PCIe Port #2, ExpressCard
- device pci 1c.2 on end # PCIe Port #3, SD/MMC
- device pci 1c.3 on end # PCIe Port #4, WLAN
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 on end # PCIe Port #7, WWAN
- device pci 1c.7 on end # PCIe Port #8, NEC USB 3.0 Host Controller
- device pci 1f.0 on # LPC bridge
+ device ref me_kt on end # Management Engine KT
+ device ref pcie_rp1 on end # PCIe Port #1
+ device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
+ device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
+ device ref pcie_rp4 on end # PCIe Port #4, WLAN
+ device ref pcie_rp5 off end # PCIe Port #5
+ device ref pcie_rp6 off end # PCIe Port #6
+ device ref pcie_rp7 on end # PCIe Port #7, WWAN
+ device ref pcie_rp8 on end # PCIe Port #8, NEC USB 3.0 Host Controller
+ device ref lpc on # LPC bridge
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
index 729db13..653c5ab 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x179b inherit
- device pci 01.0 on end # PCIe Bridge for discrete graphics
- device pci 02.0 on end # Internal graphics
+ device ref peg10 on end # PCIe Bridge for discrete graphics
+ device ref igd on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -24,17 +24,17 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device pci 14.0 on end # USB 3.0 Controller
- device pci 16.3 on end # Management Engine KT
- device pci 1c.0 on end # PCIe Port #1
- device pci 1c.1 on end # PCIe Port #2, ExpressCard
- device pci 1c.2 on end # PCIe Port #3, SD/MMC
- device pci 1c.3 on end # PCIe Port #4, WLAN
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 off end # PCIe Port #7
- device pci 1c.7 off end # PCIe Port #8
- device pci 1f.0 on # LPC bridge
+ device ref xhci on end # USB 3.0 Controller
+ device ref me_kt on end # Management Engine KT
+ device ref pcie_rp1 on end # PCIe Port #1
+ device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
+ device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
+ device ref pcie_rp4 on end # PCIe Port #4, WLAN
+ device ref pcie_rp5 off end # PCIe Port #5
+ device ref pcie_rp6 off end # PCIe Port #6
+ device ref pcie_rp7 off end # PCIe Port #7
+ device ref pcie_rp8 off end # PCIe Port #8
+ device ref lpc on # LPC bridge
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
index 02ee795..548a70f 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
@@ -5,11 +5,11 @@
device domain 0 on
subsystemid 0x103c 0x176c inherit
- device pci 01.0 on # PCIe Bridge for discrete graphics
+ device ref peg10 on # PCIe Bridge for discrete graphics
device pci 00.0 on end # GPU
device pci 00.1 on end # HDMI Audio on GPU
end
- device pci 02.0 off end # Internal graphics
+ device ref igd off end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "docking_supported" = "0"
@@ -25,16 +25,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device pci 14.0 on end # USB 3.0 Controller
- device pci 1c.0 on end # PCIe Port #1
- device pci 1c.1 on end # PCIe Port #2
- device pci 1c.2 on end # Media Card and FireWire host controller
- device pci 1c.3 on end # Wireless LAN Adapter
- device pci 1c.4 on end # SATA Controller 2 for dock
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 off end # PCIe Port #7
- device pci 1c.7 off end # PCIe Port #8
- device pci 1f.0 on # LPC bridge
+ device ref xhci on end # USB 3.0 Controller
+ device ref pcie_rp1 on end # PCIe Port #1
+ device ref pcie_rp2 on end # PCIe Port #2
+ device ref pcie_rp3 on end # Media Card and FireWire host controller
+ device ref pcie_rp4 on end # Wireless LAN Adapter
+ device ref pcie_rp5 on end # SATA Controller 2 for dock
+ device ref pcie_rp6 off end # PCIe Port #6
+ device ref pcie_rp7 off end # PCIe Port #7
+ device ref pcie_rp8 off end # PCIe Port #8
+ device ref lpc on # LPC bridge
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
index 1eb9c4c..2f38cb6 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x18df inherit
- device pci 01.0 off end # PCIe Bridge for discrete graphics
- device pci 02.0 on end # Internal graphics
+ device ref peg10 off end # PCIe Bridge for discrete graphics
+ device ref igd on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -23,16 +23,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device pci 14.0 on end # USB 3.0 Controller
- device pci 1c.0 on end # PCIe Port #1
- device pci 1c.1 off end # PCIe Port #2
- device pci 1c.2 on end # PCIe Port #3 SDHCI
- device pci 1c.3 on end # PCIe Port #4 WLAN
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 off end # PCIe Port #7
- device pci 1c.7 off end # PCIe Port #8
- device pci 1f.0 on # LPC bridge
+ device ref xhci on end # USB 3.0 Controller
+ device ref pcie_rp1 on end # PCIe Port #1
+ device ref pcie_rp2 off end # PCIe Port #2
+ device ref pcie_rp3 on end # PCIe Port #3 SDHCI
+ device ref pcie_rp4 on end # PCIe Port #4 WLAN
+ device ref pcie_rp5 off end # PCIe Port #5
+ device ref pcie_rp6 off end # PCIe Port #6
+ device ref pcie_rp7 off end # PCIe Port #7
+ device ref pcie_rp8 off end # PCIe Port #8
+ device ref lpc on # LPC bridge
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
index 3289588..16551d2 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
@@ -6,8 +6,8 @@
device domain 0 on
subsystemid 0x103c 0x1621 inherit
- device pci 01.0 off end # PEG
- device pci 02.0 on end # iGPU
+ device ref peg10 off end # PEG
+ device ref igd on end # iGPU
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "gen1_dec" = "0x007c0201"
@@ -20,21 +20,21 @@
# FIXME: ports 3, 5 are untested
register "sata_port_map" = "0x3b"
- device pci 1c.0 on end # PCIe Port #1
- device pci 1c.1 on # PCIe Port #2, ExpressCard
+ device ref pcie_rp1 on end # PCIe Port #1
+ device ref pcie_rp2 on # PCIe Port #2, ExpressCard
smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort"
"ExpressCard Slot" "SlotDataBusWidth1X"
end
- device pci 1c.2 on end # PCIe Port #3, SD/MMC and FireWire
- device pci 1c.3 on # PCIe Port #4, WLAN
+ device ref pcie_rp3 on end # PCIe Port #3, SD/MMC and FireWire
+ device ref pcie_rp4 on # PCIe Port #4, WLAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthShort" "Mini PCIe" "SlotDataBusWidth1X"
end
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 on end # PCIe Port #7, WWAN
- device pci 1c.7 off end # PCIe Port #8
- device pci 1f.0 on
+ device ref pcie_rp5 off end # PCIe Port #5
+ device ref pcie_rp6 off end # PCIe Port #6
+ device ref pcie_rp7 on end # PCIe Port #7, WWAN
+ device ref pcie_rp8 off end # PCIe Port #8
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
index 68b6daa..6701733 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x18f8 inherit
- device pci 01.0 off end # PCIe Bridge for discrete graphics
- device pci 02.0 on end # Internal graphics
+ device ref peg10 off end # PCIe Bridge for discrete graphics
+ device ref igd on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -23,16 +23,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device pci 14.0 on end # USB 3.0 Controller
- device pci 1c.0 on end # PCIe Port #1
- device pci 1c.1 off end # PCIe Port #2
- device pci 1c.2 on end # PCIe Port #3
- device pci 1c.3 on end # PCIe Port #4
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 off end # PCIe Port #6
- device pci 1c.6 off end # PCIe Port #7
- device pci 1c.7 off end # PCIe Port #8
- device pci 1f.0 on # LPC bridge
+ device ref xhci on end # USB 3.0 Controller
+ device ref pcie_rp1 on end # PCIe Port #1
+ device ref pcie_rp2 off end # PCIe Port #2
+ device ref pcie_rp3 on end # PCIe Port #3
+ device ref pcie_rp4 on end # PCIe Port #4
+ device ref pcie_rp5 off end # PCIe Port #5
+ device ref pcie_rp6 off end # PCIe Port #6
+ device ref pcie_rp7 off end # PCIe Port #7
+ device ref pcie_rp8 off end # PCIe Port #8
+ device ref lpc on # LPC bridge
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
--
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I58e5dfa57856e80d1a5e4a6fab0b2523301fa8f2
Gerrit-Change-Number: 80048
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-MessageType: newchange
Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80047?usp=email )
Change subject: mb/hp/snb_ivb_desktops: Remove superfluous comments about PCI devices
......................................................................
mb/hp/snb_ivb_desktops: Remove superfluous comments about PCI devices
Since all devicetrees from hp/snb_ivb_desktops are using the reference
names for PCI devices now, remove the equivalent comments documenting
their function.
Change-Id: I0974052c6c18f54b588d296c5c5d11e930f0fcd7
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/hp/snb_ivb_desktops/devicetree.cb
M src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb
2 files changed, 34 insertions(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/80047/1
diff --git a/src/mainboard/hp/snb_ivb_desktops/devicetree.cb b/src/mainboard/hp/snb_ivb_desktops/devicetree.cb
index f02ff76..d1aa576 100644
--- a/src/mainboard/hp/snb_ivb_desktops/devicetree.cb
+++ b/src/mainboard/hp/snb_ivb_desktops/devicetree.cb
@@ -11,10 +11,10 @@
device domain 0 on
subsystemid 0x103c 0x1791 inherit
- device ref host_bridge on end # Host bridge Host bridge
- device ref peg10 on end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics VGA controller
- device ref peg60 off end # Extra x4 port on north bridge
+ device ref host_bridge on end
+ device ref peg10 on end
+ device ref igd on end
+ device ref peg60 off end
chip southbridge/intel/bd82x6x # Intel Series 7 PCH
register "docking_supported" = "0"
@@ -29,25 +29,25 @@
register "xhci_switchable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x0000000f"
- device ref xhci on end # xHCI
- device ref mei1 on end # Management Engine Interface 1
- device ref mei2 off end # Management Engine Interface 2
- device ref me_ide_r off end # Management Engine IDE-R
- device ref me_kt on end # Management Engine KT
- device ref gbe on end # Intel Gigabit Ethernet
- device ref ehci2 on end # USB2 EHCI #2
- device ref hda on end # High Definition Audio controller
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 off end # PCIe Port #2
- device ref pcie_rp3 off end # PCIe Port #3
- device ref pcie_rp4 off end # PCIe Port #4
- device ref pcie_rp5 on end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref ehci1 on end # USB2 EHCI #1
- device ref pci_bridge on end # PCI bridge
- device ref lpc on # LPC bridge PCI-LPC bridge
+ device ref xhci on end
+ device ref mei1 on end
+ device ref mei2 off end
+ device ref me_ide_r off end
+ device ref me_kt on end
+ device ref gbe on end
+ device ref ehci2 on end
+ device ref hda on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 off end
+ device ref pcie_rp3 off end
+ device ref pcie_rp4 off end
+ device ref pcie_rp5 on end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref ehci1 on end
+ device ref pci_bridge on end
+ device ref lpc on
chip superio/common
device pnp 2e.ff on # passes SIO base addr to SSDT gen
chip superio/nuvoton/npcd378
@@ -152,10 +152,10 @@
device pnp 4e.0 on end # TPM module
end
end
- device ref sata1 on end # SATA Controller 1
- device ref smbus on end # SMBus
- device ref sata2 off end # SATA Controller 2
- device ref thermal off end # Thermal
+ device ref sata1 on end
+ device ref smbus on end
+ device ref sata2 off end
+ device ref thermal off end
end
end
end
diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb b/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb
index 3634b90..b82ff8a 100644
--- a/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb
@@ -3,16 +3,16 @@
chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x1791 inherit
- device ref peg60 on end # Extra x4 port on north bridge
+ device ref peg60 on end
chip southbridge/intel/bd82x6x
register "sata_port_map" = "0x3f"
- device ref pcie_rp2 on end # PCIe Port #2
- device ref pcie_rp3 on end # PCIe Port #3
- device ref pcie_rp4 on end # PCIe Port #4
- device ref pcie_rp6 on end # PCIe Port #6
- device ref pcie_rp7 on end # PCIe Port #7
- device ref pcie_rp8 on end # PCIe Port #8
+ device ref pcie_rp2 on end
+ device ref pcie_rp3 on end
+ device ref pcie_rp4 on end
+ device ref pcie_rp6 on end
+ device ref pcie_rp7 on end
+ device ref pcie_rp8 on end
end
end
end
--
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I0974052c6c18f54b588d296c5c5d11e930f0fcd7
Gerrit-Change-Number: 80047
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-MessageType: newchange