Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80098?usp=email )
Change subject: device/device_util: Print full domain ID
......................................................................
device/device_util: Print full domain ID
Print the whole 32bit of the domain ID.
Change-Id: Iae0752f3ae8ed683d4f61c7a47d0dee223a1ba22
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/device/device_util.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/80098/1
diff --git a/src/device/device_util.c b/src/device/device_util.c
index c17b4c5..c4aedcc 100644
--- a/src/device/device_util.c
+++ b/src/device/device_util.c
@@ -192,7 +192,7 @@
dev->path.ioapic.ioapic_id);
break;
case DEVICE_PATH_DOMAIN:
- snprintf(buffer, sizeof(buffer), "DOMAIN: %04x",
+ snprintf(buffer, sizeof(buffer), "DOMAIN: %08x",
dev->path.domain.domain);
break;
case DEVICE_PATH_CPU_CLUSTER:
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Change subject: soc/intel/xeon_sp: Add generic function to locate devices
......................................................................
soc/intel/xeon_sp: Add generic function to locate devices
Provide a helper function to locate PCI devices on a given socket
by their PCI vendor and device IDs.
Change-Id: I266360588548ba579f46b228c4d5b3ae6e39a029
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/soc/intel/xeon_sp/chip_common.c
M src/soc/intel/xeon_sp/include/soc/chip_common.h
2 files changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/80094/2
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Change subject: soc/intel/xeon_sp: Attach more stacks
......................................................................
soc/intel/xeon_sp: Attach more stacks
Attach UBOX stacks as well and thus rename the function to
attack_stacks. In order to use PCI drivers for UBOX devices,
locating UBOX devices by vendor and device IDs and replacing device
access by specifying S:B:D:F numbers, add a PCI domain for the UBOX
stacks and let the PCI enumerator index all devices.
Since there are no PCI BARs on the UBOX bus the PCI locator doesn't
have to assign resources on those buses.
Once all PCI devices on the UBOX stack can be located without knowing
their UBOX bus number and PCI segment the Xeon-SP code can fully
enable the multi PCI segment group support.
Test: ibm/sbp1 (4S) is able to find all PCU devices by PCI ID.
Change-Id: I8f9d52dd117364a42de1c73d39cc86dafeaf2678
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/soc/intel/xeon_sp/chip_common.c
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/intel/xeon_sp/include/soc/chip_common.h
M src/soc/intel/xeon_sp/skx/chip.c
M src/soc/intel/xeon_sp/spr/chip.c
5 files changed, 63 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/80091/2
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YH Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80085?usp=email )
Change subject: mb/google/brox: enable WIFI_SAR
......................................................................
Patch Set 2: Code-Review+1
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The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: mb/google/brox: enable WIFI_SAR
......................................................................
mb/google/brox: enable WIFI_SAR
Add get_wifi_sar_cbfs_filename(). This function uses the FW_CONFIG
for WIFI to choose the right wifi_sar hex file. Below is the file
mapping:
wifi_sar_0.hex = wifi6
wifi_sar_1.hex = wifi7
BUG=b:319302319
BRANCH=None
TEST=emerge-brox coreboot chromeos-bootimage
Change-Id: I212c80412141e7770a512bd8ccf4111963bab395
Signed-off-by: Shelley Chen <shchen(a)google.com>
---
M src/mainboard/google/brox/Kconfig
M src/mainboard/google/brox/variants/brox/variant.c
2 files changed, 9 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/80085/2
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79980?usp=email )
The change is no longer submittable: All-Comments-Resolved is unsatisfied now.
Change subject: device/device_const: add pcidev_path_on_segbus
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
CB:78330 should be submitted first, so marking this one and unresolved
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Change subject: device/device.h: Rename busses for clarity
......................................................................
Patch Set 16: Code-Review+2
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Change subject: device/device.h: Drop multiple links
......................................................................
Patch Set 10:
(2 comments)
File src/device/device.c:
https://review.coreboot.org/c/coreboot/+/78328/comment/90c6969f_ceec8e63 :
PS8, Line 607: final_link(dev_root.link_list);
> > don't know sconfig too well, so i wonder if we can safely assume that dev_root is always present a […]
ok
File src/device/device_util.c:
https://review.coreboot.org/c/coreboot/+/78328/comment/5db9c2b5_362a5748 :
PS8, Line 250:
: const char *bus_path(struct bus *bus)
: {
: static char buffer[BUS_PATH_MAX];
: snprintf(buffer, sizeof(buffer),
: "%s,%d", dev_path(bus->dev), bus->link_num);
: return buffer;
: }
> this function is unused, right? if so, i'd prefer if you drop this function and the corresponding pr […]
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