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Change subject: LinuxBoot: sync usage of LINUX_INITRAMFS_PATH
......................................................................
Patch Set 2: Code-Review+1
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Change subject: mb/google/nissa/var/yavilla: Restore WLAN_PERST_L power sequence
......................................................................
Patch Set 4: Code-Review+2
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Hello Christian Walter, Martin L Roth, Stefan Reinauer, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/77608?usp=email
to look at the new patch set (#2).
Change subject: LinuxBoot: sync usage of LINUX_INITRAMFS_PATH
......................................................................
LinuxBoot: sync usage of LINUX_INITRAMFS_PATH
Building LinuxBoot with default options results in built error:
build/initramfs_u-root.cpio.xz no such file or directory
coreboot adds LINUXBOOT_INITRAMFS_PATH to ADDITIONAL_PAYLOAD_CONFIG and
prebuilt-files. The default value is ´build/initramfs_u-root.cpio´
where coreboot expects a relative path to location.
Update CONFIG_LINUXBOOT_INITRAMFS_PATH to contain absolute path to
cpio file.
Use this config in LinuxBoot/targets/u-root.mk to point to correct
file location.
BUG = N/A
TEST = Built and boot facebook monolith
Change-Id: If35cd2c2dc9307fc79311991162f7aeb1a15ae32
Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com>
---
M payloads/external/LinuxBoot/Kconfig
M payloads/external/LinuxBoot/targets/u-root.mk
2 files changed, 3 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/77608/2
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Change subject: {drivers/intel/fsp2_0, soc/intel}: Rename `SAVE_MRC_AFTER_FSPS` config
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/77616/comment/612d1d50_6eabe2fa :
PS2, Line 7: {drivers/intel/fsp2_0, soc/intel}: Rename `SAVE_MRC_AFTER_FSPS` config
> Just for the future, not all paths need to be mentioned in the prefix. (Or paths at all.) Next time I’d suggest:
>
> > drivers/intel/fsp2_0: Rename SAVE_MRC_AFTER_FSPS to FSP_NVS_DATA_POST_SILICON_INIT
>
> It’s 82 characters long, so longer than the recommended one, but more useful in the `git log --oneline` output. More abbreviation could have been:
>
> > drivers/intel/fsp2_0: SAVE_MRC_AFTER_FSPS → FSP_NVS_DATA_POST_SILICON_INIT
Noted!
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Change subject: soc/intel/cmd/blk/cse: Implement APIs to access FW versions in CMOS
......................................................................
Patch Set 54:
(2 comments)
File src/soc/intel/common/block/cse/cse_lite_cmos.c:
https://review.coreboot.org/c/coreboot/+/74995/comment/e6a6616f_257669cf :
PS54, Line 74: /* Update checksum over firmware versions */
: info->crc = get_cse_info_crc(info);
> The variable "info" is a temporary variable that stores the data read from the CMOS area.
info is a input which holds the DS that we wished to write into the CMOS. I don't understand why you said this is temp variable ?
> We update the required CSE firmware partition version, calculate the CRC checksum of the updated data, and update the CRC field. Finally, we copy the entire "info" variable to the CMOS area.
>
> So the design is to calculate CRC locally and update it to CMOS.
if you are passing the `info` to write into the CMOS, isn't the info->crc already has correct CRC data ? also the purpose of this function is to write into the CMOS, you can't change the input argument `info` in this process. Ideally the input should be `const`.
https://review.coreboot.org/c/coreboot/+/74995/comment/02b9bd07_94b9cf98 :
PS54, Line 90: info->crc = get_cse_info_crc(info);
> The variable "info" is a temporary variable that stores the data read from the CMOS area. We update the required CSE firmware partition version, calculate the CRC checksum of the updated data, and update the CRC field. Finally, we copy the entire "info" variable to the CMOS area.
https://review.coreboot.org/c/coreboot/+/74995/comment/1c7cf1af_4dbe01d8/
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Change subject: mb/siemens/mc_apl2: Set Full Reset Bit into Reset Control Register
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/77603/comment/908a58d7_40a99a0f :
PS2, Line 9: the introduction of a new Linux version
Please mention the versions? (It also seems to violate Linux’ no regression policy.)
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Change subject: soc/amd/*: Set ACPI CID for I2C TPM shared with PSP
......................................................................
Patch Set 1:
(1 comment)
File src/soc/amd/cezanne/acpi/mmio.asl:
https://review.coreboot.org/c/coreboot/+/77629/comment/fa3efbae_1eef9e30 :
PS1, Line 251: #endif
Maybe get rid of the else branch instead?
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Change subject: arch to drivers/intel: Fix misspellings & capitalization issues
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/77633/comment/448a4295_ae6bb0f3 :
PS1, Line 8:
Please mention the tool.
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Change subject: {drivers/intel/fsp2_0, soc/intel}: Rename `SAVE_MRC_AFTER_FSPS` config
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/77616/comment/dcd6b2c0_2feaf9e0 :
PS2, Line 7: {drivers/intel/fsp2_0, soc/intel}: Rename `SAVE_MRC_AFTER_FSPS` config
Just for the future, not all paths need to be mentioned in the prefix. (Or paths at all.) Next time I’d suggest:
> drivers/intel/fsp2_0: Rename SAVE_MRC_AFTER_FSPS to FSP_NVS_DATA_POST_SILICON_INIT
It’s 82 characters long, so longer than the recommended one, but more useful in the `git log --oneline` output. More abbreviation could have been:
> drivers/intel/fsp2_0: SAVE_MRC_AFTER_FSPS → FSP_NVS_DATA_POST_SILICON_INIT
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The change is no longer submittable: All-Comments-Resolved is unsatisfied now.
Change subject: mb/google/nissa/var/yavilla: Disable SUSCLK based on fw_config
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/77559/comment/951c954a_4708b410 :
PS2, Line 10:
Please mention SAR ID 3, and also denote the source of this change. Schematics? What version?
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