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Hello Lance Zhao, Tim Wawrzynczak, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
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Verified+1 by build bot (Jenkins)
Change subject: acpi/acpi.c: Move MADT lapic addr to APIC code
......................................................................
acpi/acpi.c: Move MADT lapic addr to APIC code
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Change-Id: I4e5032fd02af7e8e9ffd2e20aa214a8392ab6335
---
M src/acpi/acpi.c
M src/acpi/acpi_apic.c
M src/include/acpi/acpi.h
3 files changed, 20 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/76070/4
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I4e5032fd02af7e8e9ffd2e20aa214a8392ab6335
Gerrit-Change-Number: 76070
Gerrit-PatchSet: 4
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Attention is currently required from: Lance Zhao, Tim Wawrzynczak.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76295?usp=email )
Change subject: acpi.c: Move setting FADT SCI INT to arch specific code
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76295/comment/c91ae4ab_df97b68e :
PS2, Line 7: acpi.c: Move setting FADT SCI INT to arch specific code
> acpi/acpi. […]
Done
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Gerrit-Change-Number: 76295
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Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75280?usp=email )
Change subject: Revert "soc/intel/{adl, cmn/pcie}: Fix ASPM configuration enum definitions"
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS1:
> Have you tested this?
Any update?
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76809?usp=email )
Change subject: soc/amd/mendocino: select SOC_AMD_COMMON_BLOCK_CPU_SYNC_PSP_ADDR_MSR
......................................................................
soc/amd/mendocino: select SOC_AMD_COMMON_BLOCK_CPU_SYNC_PSP_ADDR_MSR
Select this Kconfig to ensure the PSP_ADD_MSR is properly programmed
across all cores.
This resolves a Windows BSOD "CRYPTO_LIBRARY_INTERNAL_ERROR."
BUG=b:293571109
BRANCH=skyrim
TEST=build/boot google/skyrim, use rdmsr to verify MSR value identical
across all cores.
Change-Id: I67391b49496d767912f5d81c1758a52a70fca6f6
Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76809
Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org>
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/soc/amd/mendocino/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Paul Menzel: Looks good to me, but someone else must approve
Felix Held: Looks good to me, approved
diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig
index 90a4fc9..6f3c0ca 100644
--- a/src/soc/amd/mendocino/Kconfig
+++ b/src/soc/amd/mendocino/Kconfig
@@ -45,6 +45,7 @@
select SOC_AMD_COMMON_BLOCK_APOB_HASH
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
select SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H
+ select SOC_AMD_COMMON_BLOCK_CPU_SYNC_PSP_ADDR_MSR
select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
select SOC_AMD_COMMON_BLOCK_DATA_FABRIC_DOMAIN
select SOC_AMD_COMMON_BLOCK_ESPI_EXTENDED_DECODE_RANGES
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Gerrit-Change-Number: 76809
Gerrit-PatchSet: 5
Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
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Gerrit-MessageType: merged
Tim Crawford has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76871?usp=email )
Change subject: mb/system76/cml-u: Fix inclusion of romstage.c
......................................................................
mb/system76/cml-u: Fix inclusion of romstage.c
When lemp9 was converted to a variant in CB:64528, the Makefile was not
updated to handle the variant-specific `romstage.c`. This, as would be
expected, caused memory init errors and broke boot on CML-U boards.
Tested lemp9 boots to payload again.
Fixes: 5b7b04c938f2 ("mb/system76/cml-u: Convert lemp9 to a variant")
Change-Id: Ibc11d69a1662df653e6553421d67a9cd1b1d03e2
Signed-off-by: Tim Crawford <tcrawford(a)system76.com>
---
M src/mainboard/system76/cml-u/Makefile.inc
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/76871/1
diff --git a/src/mainboard/system76/cml-u/Makefile.inc b/src/mainboard/system76/cml-u/Makefile.inc
index 5276308..51ad543 100644
--- a/src/mainboard/system76/cml-u/Makefile.inc
+++ b/src/mainboard/system76/cml-u/Makefile.inc
@@ -3,6 +3,8 @@
bootblock-y += bootblock.c
bootblock-y += gpio_early.c
+romstage-y += variants/$(VARIANT_DIR)/romstage.c
+
ramstage-y += ramstage.c
ramstage-y += variants/$(VARIANT_DIR)/gpio.c
ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
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Attention is currently required from: Martin L Roth.
Hello Martin L Roth, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70200?usp=email
to look at the new patch set (#2).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: lint/checkpatch: Add check for unnecessary <signed> int declarations
......................................................................
lint/checkpatch: Add check for unnecessary <signed> int declarations
This reduce the difference with linux v6.5-rc4.
Change-Id: I64bbc09b531ea217514601386dd517af92aa40f1
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M util/lint/checkpatch.pl
1 file changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/70200/2
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