coreboot-gerrit August 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/nissa/var/craaskov: Add wifi sar table
by Eric Lai (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Dtrain Hsu, Ian Feng, Jamie Chen, Tarun Tuli. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76576?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/nissa/var/craaskov: Add wifi sar table ...................................................................... Patch Set 11: (1 comment) Patchset: PS11: please fix the conflict -- To view, visit https://review.coreboot.org/c/coreboot/+/76576?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib21f674b6749e125bf76a196902c994bfac15e65 Gerrit-Change-Number: 76576 Gerrit-PatchSet: 11 Gerrit-Owner: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Wed, 02 Aug 2023 14:40:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/nissa/var/craaskov: Configure GPIOs according to schematics
by Eric Lai (Code Review) 02 Aug '23

02 Aug '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76636?usp=email ) Change subject: mb/google/nissa/var/craaskov: Configure GPIOs according to schematics ...................................................................... mb/google/nissa/var/craaskov: Configure GPIOs according to schematics Configure GPIOs based on schematics and confirm with EE. BUG=b:290248526 BRANCH=None TEST=emerge-nissa coreboot Change-Id: I17fc9333a0ef592ea36b196b3fd417be47fb82bb Signed-off-by: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76636 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Derek Huang <derekhuang(a)google.com> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> --- A src/mainboard/google/brya/variants/craaskov/Makefile.inc A src/mainboard/google/brya/variants/craaskov/gpio.c 2 files changed, 82 insertions(+), 0 deletions(-) Approvals: Derek Huang: Looks good to me, approved build bot (Jenkins): Verified Sumeet R Pawnikar: Looks good to me, approved Eric Lai: Looks good to me, approved Ian Feng: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/craaskov/Makefile.inc b/src/mainboard/google/brya/variants/craaskov/Makefile.inc new file mode 100644 index 0000000..760ef23 --- /dev/null +++ b/src/mainboard/google/brya/variants/craaskov/Makefile.inc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +bootblock-y += gpio.c + +ramstage-y += gpio.c diff --git a/src/mainboard/google/brya/variants/craaskov/gpio.c b/src/mainboard/google/brya/variants/craaskov/gpio.c new file mode 100644 index 0000000..f3ed2c5 --- /dev/null +++ b/src/mainboard/google/brya/variants/craaskov/gpio.c @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <commonlib/helpers.h> +#include <soc/gpio.h> + +/* Pad configuration in ramstage */ +static const struct pad_config override_gpio_table[] = { + /* A21 : GPP_A21 ==> NC */ + PAD_NC(GPP_A21, NONE), + /* A21 : GPP_A22 ==> NC */ + PAD_NC(GPP_A22, NONE), + /* B5 : I2C2_SDA ==> TOF_I2C_DAT */ + PAD_CFG_NF_LOCK(GPP_B5, NONE, NF1, LOCK_CONFIG), + /* B6 : I2C2_SCL ==> TOF_I2C_CLK */ + PAD_CFG_NF_LOCK(GPP_B6, NONE, NF1, LOCK_CONFIG), + /* D3 : ISH_GP3 ==> NC */ + PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG), + /* D8 : SRCCLKREQ3# ==> NC */ + PAD_NC(GPP_D8, NONE), + /* D15 : ISH_UART0_RTS# ==> NC */ + PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG), + /* D16 : ISH_UART0_CTS# ==> NC */ + PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG), + /* F6 : CNV_PA_BLANKING ==> NC */ + PAD_NC(GPP_F6, NONE), + /* F13 : SOC_PEN_DETECT_R_ODL ==> NC */ + PAD_NC(GPP_F13, NONE), + /* F15 : SOC_PEN_DETECT_ODL ==> NC */ + PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG), + /* H8 : CNV_MFUART2_RXD ==> NC */ + PAD_NC(GPP_H8, NONE), + /* H9 : CNV_MFUART2_TXD ==> NC */ + PAD_NC(GPP_H9, NONE), + /* H12 : UART0_RTS# ==> NC */ + PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG), + /* H13 : UART0_CTS# ==> NC */ + PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG), + /* H19 : SRCCLKREQ4# ==> TOF_INT# */ + PAD_CFG_GPI_INT(GPP_H19, NONE, PLTRST, EDGE_BOTH), + /* H22 : IMGCLKOUT3 ==> NC */ + PAD_NC(GPP_H22, NONE), + /* R6 : DMIC_CLK_A_1A ==> NC */ + PAD_NC(GPP_R6, NONE), + /* R7 : DMIC_DATA_1A ==> NC */ + PAD_NC(GPP_R7, NONE), +}; + +/* Early pad configuration in bootblock */ +static const struct pad_config early_gpio_table[] = { + /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */ + PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), + /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */ + PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP), + /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ + PAD_CFG_GPI(GPP_F18, NONE, DEEP), + /* H4 : I2C0_SDA ==> SOC_I2C_GSC_SDA */ + PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), + /* H5 : I2C0_SCL ==> SOC_I2C_GSC_SCL */ + PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), + /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */ + PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), + /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */ + PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), +}; + +const struct pad_config *variant_gpio_override_table(size_t *num) +{ + *num = ARRAY_SIZE(override_gpio_table); + return override_gpio_table; +} + +const struct pad_config *variant_early_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(early_gpio_table); + return early_gpio_table; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/76636?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17fc9333a0ef592ea36b196b3fd417be47fb82bb Gerrit-Change-Number: 76636 Gerrit-PatchSet: 13 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kenny Pan <kennypan(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/dedede/var/boxy: Add power limits for N4500/N5100
by Derek Huang (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Paul Menzel, Stanley Wu, Subrata Banik. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76876?usp=email ) Change subject: mb/google/dedede/var/boxy: Add power limits for N4500/N5100 ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76876?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b063dc235fb714ba47eb620b914f2f9e92a2715 Gerrit-Change-Number: 76876 Gerrit-PatchSet: 2 Gerrit-Owner: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Wed, 02 Aug 2023 14:37:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/dedede/var/boxy: Update power limits
by Derek Huang (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Stanley Wu, Subrata Banik. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76877?usp=email ) Change subject: mb/google/dedede/var/boxy: Update power limits ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76877?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4257dab358f066ebd13b6f251e8a5258a72fbd39 Gerrit-Change-Number: 76877 Gerrit-PatchSet: 1 Gerrit-Owner: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Wed, 02 Aug 2023 14:37:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/nissa/var/craaskov: Configure GPIOs according to schematics
by Derek Huang (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Chen-Tsung Hsieh, Dtrain Hsu, Jamie Chen, Kenny Pan, Paul Menzel, Rex Chou, Shou-Chieh Hsu, Tarun Tuli. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76636?usp=email ) Change subject: mb/google/nissa/var/craaskov: Configure GPIOs according to schematics ...................................................................... Patch Set 12: (1 comment) Patchset: PS12: > @googler, please review then I'll submit. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/76636?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17fc9333a0ef592ea36b196b3fd417be47fb82bb Gerrit-Change-Number: 76636 Gerrit-PatchSet: 12 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kenny Pan <kennypan(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kenny Pan <kennypan(a)google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Wed, 02 Aug 2023 14:35:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/nissa/var/craaskov: Configure GPIOs according to schematics
by Derek Huang (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Chen-Tsung Hsieh, Dtrain Hsu, Jamie Chen, Kenny Pan, Paul Menzel, Rex Chou, Shou-Chieh Hsu, Tarun Tuli. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76636?usp=email ) Change subject: mb/google/nissa/var/craaskov: Configure GPIOs according to schematics ...................................................................... Patch Set 12: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76636?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17fc9333a0ef592ea36b196b3fd417be47fb82bb Gerrit-Change-Number: 76636 Gerrit-PatchSet: 12 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kenny Pan <kennypan(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kenny Pan <kennypan(a)google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Wed, 02 Aug 2023 14:33:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/pirrha: Generate SPD ID for supported memory part
by Derek Huang (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: SH Kim, Shou-Chieh Hsu, Tarun Tuli. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76881?usp=email ) Change subject: mb/google/nissa/var/pirrha: Generate SPD ID for supported memory part ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76881?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib3f5a5e5c8296f976d92f0196026d7bb63845664 Gerrit-Change-Number: 76881 Gerrit-PatchSet: 1 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Wed, 02 Aug 2023 14:30:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/nissa/var/joxer: support DPTF oem_variables
by Eric Lai (Code Review) 02 Aug '23

02 Aug '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76773?usp=email ) Change subject: mb/google/nissa/var/joxer: support DPTF oem_variables ...................................................................... mb/google/nissa/var/joxer: support DPTF oem_variables 1. Joxer uses dptf.dv to distinguish 6W/15W by setting OEM variable. 2. Update passive policy and critical policy. BUG=b:285477026, b:293540179 TEST=emerge-nissa coreboot and check the OEM variable. Signed-off-by: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Change-Id: I4e52ac624f7d7628cce3035a2bac67fc527bc167 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76773 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Reviewed-by: Derek Huang <derekhuang(a)google.com> Reviewed-by: Ivan Chen <yulunchen(a)google.com> --- M src/mainboard/google/brya/variants/joxer/overridetree.cb M src/mainboard/google/brya/variants/joxer/variant.c 2 files changed, 42 insertions(+), 8 deletions(-) Approvals: Eric Lai: Looks good to me, approved Sumeet R Pawnikar: Looks good to me, approved build bot (Jenkins): Verified Ivan Chen: Looks good to me, but someone else must approve Derek Huang: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/joxer/overridetree.cb b/src/mainboard/google/brya/variants/joxer/overridetree.cb index bab93f6..f5118b7 100644 --- a/src/mainboard/google/brya/variants/joxer/overridetree.cb +++ b/src/mainboard/google/brya/variants/joxer/overridetree.cb @@ -1,4 +1,8 @@ fw_config + field THERMAL 2 2 + option THERMAL_FANLESS 0 + option THERMAL_FAN 1 + end field WIFI_SAR_ID 6 6 option WIFI_GFP2_SAR_ID_0 0 option WIFI_GFP2_SAR_ID_1 1 @@ -88,22 +92,22 @@ ## Passive Policy register "policies.passive" = "{ [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), - [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000), - [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000), - [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 5000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 5000), + [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 65, 5000), + [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 65, 5000), }" ## Critical Policy register "policies.critical" = "{ [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), - [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN), - [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN), - [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 75, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 75, SHUTDOWN), }" register "controls.power_limits" = "{ .pl1 = { - .min_power = 3000, + .min_power = 6000, .max_power = 6000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, @@ -126,7 +130,11 @@ [3] = { 8, 500 } }" - device generic 0 on end + register "oem_data.oem_variables" = "{ + [1] = 0x1 + }" + + device generic 0 alias dptf_policy on end end end device ref i2c1 on diff --git a/src/mainboard/google/brya/variants/joxer/variant.c b/src/mainboard/google/brya/variants/joxer/variant.c index 3c23dd1..e371ada 100644 --- a/src/mainboard/google/brya/variants/joxer/variant.c +++ b/src/mainboard/google/brya/variants/joxer/variant.c @@ -3,10 +3,34 @@ #include <baseboard/variants.h> #include <console/console.h> #include <device/device.h> +#include <device/pci.h> +#include <drivers/intel/dptf/chip.h> #include <fw_config.h> #include <soc/bootblock.h> #include <sar.h> +WEAK_DEV_PTR(dptf_policy); + +static void update_oem_variables(void) +{ + const struct device *policy_dev = DEV_PTR(dptf_policy); + struct drivers_intel_dptf_config *config = policy_dev->chip_info; + + if (fw_config_probe(FW_CONFIG(THERMAL, THERMAL_FANLESS))) { + config->oem_data.oem_variables[0] = 0; + config->oem_data.oem_variables[1] = 1; + printk(BIOS_INFO, "Set OEM Variable [0] to 0.\n"); + printk(BIOS_INFO, "Set OEM Variable [1] to 1.\n"); + } + + if (fw_config_probe(FW_CONFIG(THERMAL, THERMAL_FAN))) { + config->oem_data.oem_variables[0] = 1; + config->oem_data.oem_variables[1] = 0; + printk(BIOS_INFO, "Set OEM Variable [0] to 1.\n"); + printk(BIOS_INFO, "Set OEM Variable [1] to 0.\n"); + } +} + const char *get_wifi_sar_cbfs_filename(void) { return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI_SAR_ID)); @@ -18,6 +42,8 @@ struct device *ufs = DEV_PTR(ufs); struct device *ish = DEV_PTR(ish); + update_oem_variables(); + if (!fw_config_is_provisioned()) { printk(BIOS_INFO, "fw_config unprovisioned so enable all storage devices\n"); return; -- To view, visit https://review.coreboot.org/c/coreboot/+/76773?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e52ac624f7d7628cce3035a2bac67fc527bc167 Gerrit-Change-Number: 76773 Gerrit-PatchSet: 7 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/google/nissa/var/joxer: support DPTF oem_variables
by Derek Huang (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Eric Lai, Felix Held, Mark Hsieh, Scott Chao, Shou-Chieh Hsu, Tarun Tuli. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76773?usp=email ) Change subject: mb/google/nissa/var/joxer: support DPTF oem_variables ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76773?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e52ac624f7d7628cce3035a2bac67fc527bc167 Gerrit-Change-Number: 76773 Gerrit-PatchSet: 6 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 02 Aug 2023 14:21:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex/variants/ovis: Use and configure RT8168 driver
by Kapil Porwal (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Stefan Reinauer, Subrata Banik, Tarun Tuli, YH Lin. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76872?usp=email ) Change subject: mb/google/rex/variants/ovis: Use and configure RT8168 driver ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76872?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I699e52e25f851de325f96ef885e04d15ca64badd Gerrit-Change-Number: 76872 Gerrit-PatchSet: 3 Gerrit-Owner: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 Aug 2023 13:31:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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