coreboot-gerrit August 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: soc/intel/common/tcss: Configure USB-C ports with attached devices
by Jakub Czapiga (Code Review) 03 Aug '23

03 Aug '23

Attention is currently required from: Eric Lai, John Su, John Zhao, Kapil Porwal, Matt DeVillier, Subrata Banik. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72909?usp=email ) Change subject: soc/intel/common/tcss: Configure USB-C ports with attached devices ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/common/block/tcss/tcss.c: https://review.coreboot.org/c/coreboot/+/72909/comment/2c284af7_bd276914 : PS4, Line 361: ret = send_pmc_connect_request(i, &mux_info, port_info); > I'm afraid that we might end up sending the PMC connect cmd twice if DP=1 and USB=1 for the same por […] And that's the case here. Please take a look at logs below. ``` [DEBUG] port C0 DISC req: usage 1 usb3 1 usb2 2 [DEBUG] Raw Buffer output 0 00000211 [DEBUG] Raw Buffer output 1 00000000 [DEBUG] pmc_send_ipc_cmd succeeded [DEBUG] port C1 DISC req: usage 1 usb3 3 usb2 3 [DEBUG] Raw Buffer output 0 00000331 [DEBUG] Raw Buffer output 1 00000000 [DEBUG] pmc_send_ipc_cmd succeeded [DEBUG] port C2 DISC req: usage 1 usb3 2 usb2 1 [DEBUG] Raw Buffer output 0 00000121 [DEBUG] Raw Buffer output 1 00000000 [DEBUG] pmc_send_ipc_cmd succeeded [INFO ] AP Mode Entry enabled, skip waiting for DisplayPort connection [INFO ] DP ready after 100 ms [INFO ] HPD ready after 705 ms [DEBUG] port C1 CONN req: usage 0 usb3 3 usb2 3 ufp 0 ori_hsl 1 ori_sbu 1 dbg_acc 0 [DEBUG] Raw Buffer output 0 00006330 [DEBUG] Raw Buffer output 1 00000000 [DEBUG] pmc_send_ipc_cmd succeeded [DEBUG] port C1 SAFE req: usage 2 usb3 3 [DEBUG] Raw Buffer output 0 00000032 [DEBUG] Raw Buffer output 1 00000000 [DEBUG] pmc_send_ipc_cmd succeeded [DEBUG] port C1 ALT_1 req: usage 3 usb3 3 dp_mode 1 [DEBUG] port C1 ALT_2 req: polarity 1 cable 0 ufp 0 dp_mode 4 [DEBUG] Raw Buffer output 0 00001033 [DEBUG] Raw Buffer output 1 00000402 [DEBUG] pmc_send_ipc_cmd succeeded [DEBUG] Raw Buffer output 0 00001034 [DEBUG] Raw Buffer output 1 00000000 [DEBUG] pmc_send_ipc_cmd succeeded [INFO ] Port C1 is configured to DP mode! [DEBUG] port C1 CONN req: usage 0 usb3 3 usb2 3 ufp 0 ori_hsl 1 ori_sbu 1 dbg_acc 0 [DEBUG] Raw Buffer output 0 00006330 [DEBUG] Raw Buffer output 1 00000000 [ERROR] pmc_send_ipc_cmd status: fatal [ERROR] Port 1 connect request failed ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/72909?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69522dbcc8cae6bbf41659ae653107d0e031c812 Gerrit-Change-Number: 72909 Gerrit-PatchSet: 4 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: CoolStar <coolstarorganization(a)gmail.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 03 Aug 2023 11:27:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/{rex,ovis}: Disable C1-state auto demotion for rex & ovis
by Kapil Porwal (Code Review) 03 Aug '23

03 Aug '23

Attention is currently required from: Jakub Czapiga, Paul Menzel, Sukumar Ghorai, Tarun Tuli. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76827?usp=email ) Change subject: mb/google/{rex,ovis}: Disable C1-state auto demotion for rex & ovis ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: > Verified basic sanity and S0iX on Screebo. Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/76827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I548e0e5340dec537d05718dd2f4652e10fb36ac0 Gerrit-Change-Number: 76827 Gerrit-PatchSet: 5 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Comment-Date: Thu, 03 Aug 2023 11:19:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly
by Michał Żygowski (Code Review) 03 Aug '23

03 Aug '23

Michał Żygowski has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76915?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly ...................................................................... soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly Build issue introduced by patch CB:76418 (commit hash 01025d3ae78e02192d389f22abd36747e3d8c63b) for Google boards. Patch has not been rebased to latest master and tested before submission causing the Jenkins jobs to fail. Change-Id: I95bd2485b98be4ab3a39eaaebb9efb34db93bbe8 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76915 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/alderlake/meminit.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved diff --git a/src/soc/intel/alderlake/meminit.c b/src/soc/intel/alderlake/meminit.c index 42b6698..35c3252 100644 --- a/src/soc/intel/alderlake/meminit.c +++ b/src/soc/intel/alderlake/meminit.c @@ -240,7 +240,7 @@ bool dq_dqs_auto_detect = false; FSP_M_CONFIG *mem_cfg = &memupd->FspmConfig; -#if CONFIG(SOC_INTEL_RAPTORLAKE) +#if CONFIG(SOC_INTEL_RAPTORLAKE) && !CONFIG(FSP_USE_REPO) mem_cfg->CsPiStartHighinEct = mb_cfg->cs_pi_start_high_in_ect; #endif mem_cfg->ECT = mb_cfg->ect; -- To view, visit https://review.coreboot.org/c/coreboot/+/76915?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I95bd2485b98be4ab3a39eaaebb9efb34db93bbe8 Gerrit-Change-Number: 76915 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly
by Michał Żygowski (Code Review) 03 Aug '23

03 Aug '23

Attention is currently required from: Tarun Tuli. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76915?usp=email ) Change subject: soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/76915/comment/11334420_f0fca29e : PS1, Line 9: B:76418 > good to have commit hash Done -- To view, visit https://review.coreboot.org/c/coreboot/+/76915?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I95bd2485b98be4ab3a39eaaebb9efb34db93bbe8 Gerrit-Change-Number: 76915 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Thu, 03 Aug 2023 11:12:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly
by Michał Żygowski (Code Review) 03 Aug '23

03 Aug '23

Attention is currently required from: Michał Żygowski, Tarun Tuli. Hello Subrata Banik, Tarun Tuli, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/76915?usp=email to look at the new patch set (#2). Change subject: soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly ...................................................................... soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly Build issue introduced by patch CB:76418 (commit hash 01025d3ae78e02192d389f22abd36747e3d8c63b) for Google boards. Patch has not been rebased to latest master and tested before submission causing the Jenkins jobs to fail. Change-Id: I95bd2485b98be4ab3a39eaaebb9efb34db93bbe8 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M src/soc/intel/alderlake/meminit.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/76915/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76915?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I95bd2485b98be4ab3a39eaaebb9efb34db93bbe8 Gerrit-Change-Number: 76915 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[master]: soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly
by Subrata Banik (Code Review) 03 Aug '23

03 Aug '23

Attention is currently required from: Michał Żygowski, Tarun Tuli. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76915?usp=email ) Change subject: soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/76915/comment/9d9e0b79_05b3d9ad : PS1, Line 9: B:76418 good to have commit hash -- To view, visit https://review.coreboot.org/c/coreboot/+/76915?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I95bd2485b98be4ab3a39eaaebb9efb34db93bbe8 Gerrit-Change-Number: 76915 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Comment-Date: Thu, 03 Aug 2023 11:09:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex/var/screebo: Add fw_config probe for GL9750 and RTS5227S
by Kapil Porwal (Code Review) 03 Aug '23

03 Aug '23

Attention is currently required from: Eran Mitrani, Jakub Czapiga, Kun Liu, Subrata Banik, Tarun Tuli. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76912?usp=email ) Change subject: mb/google/rex/var/screebo: Add fw_config probe for GL9750 and RTS5227S ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76912?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I98aa0d3e52c355f6c1528c912a6fa0f32652dda8 Gerrit-Change-Number: 76912 Gerrit-PatchSet: 4 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Thu, 03 Aug 2023 11:03:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly
by Michał Żygowski (Code Review) 03 Aug '23

03 Aug '23

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76915?usp=email ) Change subject: soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly ...................................................................... soc/intel/alderlake/meminit.c: Guard CsPiStartHighinEct properly Build issue introduced by patch CB:76418 for Google boards. Patch has not been rebased to latest master and tested before submission causing the Jenkins jobs to fail. Change-Id: I95bd2485b98be4ab3a39eaaebb9efb34db93bbe8 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M src/soc/intel/alderlake/meminit.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/76915/1 diff --git a/src/soc/intel/alderlake/meminit.c b/src/soc/intel/alderlake/meminit.c index 42b6698..35c3252 100644 --- a/src/soc/intel/alderlake/meminit.c +++ b/src/soc/intel/alderlake/meminit.c @@ -240,7 +240,7 @@ bool dq_dqs_auto_detect = false; FSP_M_CONFIG *mem_cfg = &memupd->FspmConfig; -#if CONFIG(SOC_INTEL_RAPTORLAKE) +#if CONFIG(SOC_INTEL_RAPTORLAKE) && !CONFIG(FSP_USE_REPO) mem_cfg->CsPiStartHighinEct = mb_cfg->cs_pi_start_high_in_ect; #endif mem_cfg->ECT = mb_cfg->ect; -- To view, visit https://review.coreboot.org/c/coreboot/+/76915?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I95bd2485b98be4ab3a39eaaebb9efb34db93bbe8 Gerrit-Change-Number: 76915 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: src/soc/intel/alderlake: add SOC_INTEL_RAPTORLAKE_PCH_S symbol
by Michał Żygowski (Code Review) 03 Aug '23

03 Aug '23

Michał Żygowski has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76322?usp=email ) ( 12 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: src/soc/intel/alderlake: add SOC_INTEL_RAPTORLAKE_PCH_S symbol ...................................................................... src/soc/intel/alderlake: add SOC_INTEL_RAPTORLAKE_PCH_S symbol Introduce new symbol SOC_INTEL_RAPTORLAKE_PCH_S that can be selected by board with RPL-S PCH. For now only the IoT variant of RPL-S FSP is available for use with 700 series chipsets. Boards with 600 series chipsets can still use RPL CPUs with the ADL-S C.0.75.10, which contains minimal RPL-S CPU support. Change-Id: I303fac78dac1ed7ccc9d531a6c3c10262f7273ee Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76322 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Michał Kopeć <michal.kopec(a)3mdeb.com> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/soc/intel/alderlake/Kconfig 1 file changed, 11 insertions(+), 2 deletions(-) Approvals: Michał Kopeć: Looks good to me, approved Eric Lai: Looks good to me, but someone else must approve build bot (Jenkins): Verified diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 3e8f767..c9845ad 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -36,11 +36,18 @@ config SOC_INTEL_ALDERLAKE_PCH_S bool select SOC_INTEL_ALDERLAKE - select HAVE_INTEL_FSP_REPO + select HAVE_INTEL_FSP_REPO if !SOC_INTEL_RAPTORLAKE_PCH_S || (SOC_INTEL_RAPTORLAKE_PCH_S && FSP_TYPE_IOT) select PLATFORM_USES_FSP2_3 help Choose this option if your mainboard has a PCH-S chipset. +config SOC_INTEL_RAPTORLAKE_PCH_S + bool + select SOC_INTEL_ALDERLAKE_PCH_S + select SOC_INTEL_RAPTORLAKE + help + Choose this option if your mainboard has a Raptor Lake PCH-S chipset. + if SOC_INTEL_ALDERLAKE config CPU_SPECIFIC_OPTIONS @@ -138,8 +145,8 @@ config SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT bool - default y if !SOC_INTEL_ALDERLAKE_PCH_S default n if SOC_INTEL_ALDERLAKE_PCH_S + default y select SOC_INTEL_COMMON_BLOCK_TCSS select SOC_INTEL_COMMON_BLOCK_USB4 select SOC_INTEL_COMMON_BLOCK_USB4_PCIE @@ -399,6 +406,7 @@ string "Location of FSP headers" default "src/vendorcode/intel/fsp/fsp2_0/alderlake_n/" if SOC_INTEL_ALDERLAKE_PCH_N && !FSP_USE_REPO default "src/vendorcode/intel/fsp/fsp2_0/raptorlake/" if SOC_INTEL_RAPTORLAKE && !FSP_USE_REPO + default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/Include/" if SOC_INTEL_RAPTORLAKE_PCH_S && FSP_TYPE_IOT default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && FSP_TYPE_IOT default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Include/" if SOC_INTEL_ALDERLAKE_PCH_S && FSP_TYPE_IOT default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P @@ -408,6 +416,7 @@ config FSP_FD_PATH string depends on FSP_USE_REPO + default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd" if SOC_INTEL_RAPTORLAKE_PCH_S && FSP_TYPE_IOT default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && FSP_TYPE_IOT default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S && FSP_TYPE_IOT default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P -- To view, visit https://review.coreboot.org/c/coreboot/+/76322?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I303fac78dac1ed7ccc9d531a6c3c10262f7273ee Gerrit-Change-Number: 76322 Gerrit-PatchSet: 16 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[L] Change in coreboot[master]: [HACK] soc/intel/alderlake: Add a copy of ADL-S IOT FSP MemInfoHob.h ...
by Michał Żygowski (Code Review) 03 Aug '23

03 Aug '23

Attention is currently required from: Subrata Banik, Tarun Tuli. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76324?usp=email ) Change subject: [HACK] soc/intel/alderlake: Add a copy of ADL-S IOT FSP MemInfoHob.h for RPL-S IOT ...................................................................... Patch Set 15: (1 comment) Patchset: PS10: > Stefan, Patrick, would would be your take on this approach? […] Stefan, Patrick ping -- To view, visit https://review.coreboot.org/c/coreboot/+/76324?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec35db4573a3c3d011e4c1edf1c82a5c34438695 Gerrit-Change-Number: 76324 Gerrit-PatchSet: 15 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <patrick(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Thu, 03 Aug 2023 10:09:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: comment

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coreboot-gerrit August 2023