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Change subject: cpu/intel/microcode: Have CPU microcode per CPUID into CBFS
......................................................................
Patch Set 17:
(1 comment)
Patchset:
PS17:
> Is there any pending task for this?
one comment still open as I have explain the reason behind keeping it as user interactive.
> If there is any additional request, I think we should merge this and follow up.
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Change subject: mb/google/skyrim/: Set system_configuration to 3 to avoid SMU call
......................................................................
Patch Set 6: Code-Review+2
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Change subject: util/cbmem: add parsing of TPM logs per specs
......................................................................
Patch Set 22:
(1 comment)
File util/cbmem/cbmem.c:
https://review.coreboot.org/c/coreboot/+/68749/comment/35a9c54e_6e419175 :
PS22, Line 961: die("Unknown hash algorithm\n");
> is it necessary to call die() here or would printing an error (and telling the caller that something […]
I think in a user-space utility like `cbmem` dying can always be avoided and is used just a shorthand for `puts()`+`exit(1)` with a familiar name. Changing that will probably require updating most functions to communicate error condition.
In this particular case parsing must be stopped because log entries don't contain hash size, they contain hash type from which the code infers the size, thus unknown type prevents further parsing.
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Change subject: cpu/intel/microcode: Have CPU microcode per CPUID into CBFS
......................................................................
Patch Set 17:
(1 comment)
Patchset:
PS17:
Is there any pending task for this?
If there is any additional request, I think we should merge this and follow up.
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Change subject: soc/intel/common: Print crashlog size info in hex
......................................................................
Patch Set 8:
(1 comment)
Patchset:
PS8:
If no more comments, can we merge this patch? it was +2'd already but got removed in newer version.
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Change subject: soc/intel/meteorlake: Add support for crashlog
......................................................................
Patch Set 28:
(1 comment)
Patchset:
PS28:
If no more comments, can we merge this crashlog patch?
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Hello Alexander Couzens, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/75992?usp=email
to look at the new patch set (#8).
Change subject: mb/lenovo: Add new port for Lenovo L420 laptop
......................................................................
mb/lenovo: Add new port for Lenovo L420 laptop
This should also work as-it for Lenovo L520 and L421.
Change-Id: I0e46810b80af72c608679235585ec8d5a98d48ac
Signed-off-by: Nicolas Provost <dev(a)npsoft.fr>
---
A src/mainboard/lenovo/l420/Kconfig
A src/mainboard/lenovo/l420/Kconfig.name
A src/mainboard/lenovo/l420/Makefile.inc
A src/mainboard/lenovo/l420/acpi/ec.asl
A src/mainboard/lenovo/l420/acpi/mainboard.asl
A src/mainboard/lenovo/l420/acpi/platform.asl
A src/mainboard/lenovo/l420/acpi/superio.asl
A src/mainboard/lenovo/l420/acpi/thermal.asl
A src/mainboard/lenovo/l420/acpi_tables.c
A src/mainboard/lenovo/l420/board_info.txt
A src/mainboard/lenovo/l420/cmos.default
A src/mainboard/lenovo/l420/cmos.layout
A src/mainboard/lenovo/l420/data.vbt
A src/mainboard/lenovo/l420/devicetree.cb
A src/mainboard/lenovo/l420/dsdt.asl
A src/mainboard/lenovo/l420/early_init.c
A src/mainboard/lenovo/l420/gma-mainboard.ads
A src/mainboard/lenovo/l420/gpio.c
A src/mainboard/lenovo/l420/hda_verb.c
A src/mainboard/lenovo/l420/mainboard.c
A src/mainboard/lenovo/l420/smihandler.c
A src/mainboard/lenovo/l420/status.txt
22 files changed, 1,047 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/75992/8
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Change subject: new port for Lenovo L420 laptop
......................................................................
Patch Set 7:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75992/comment/b2385695_7d5416da :
PS7, Line 7: new port for Lenovo L420 laptop
> Suggestion: […]
Done
File src/mainboard/lenovo/l420/Kconfig:
https://review.coreboot.org/c/coreboot/+/75992/comment/f342d08b_6d7677bc :
PS7, Line 17: select TPM
> This should probably be `MAINBOARD_HAS_TPM1`. Then it compiles without errors.
Done
https://review.coreboot.org/c/coreboot/+/75992/comment/bf59dde6_0e060365 :
PS7, Line 5: select SYSTEM_TYPE_LAPTOP
: select NORTHBRIDGE_INTEL_SANDYBRIDGE
: select USE_NATIVE_RAMINIT
: select SOUTHBRIDGE_INTEL_BD82X6X
: select EC_QUANTA_IT8518
: select NO_UART_ON_SUPERIO
: select BOARD_ROMSIZE_KB_4096
: select HAVE_ACPI_TABLES
: select HAVE_OPTION_TABLE
: select HAVE_CMOS_DEFAULT
: select HAVE_ACPI_RESUME
: select INTEL_INT15
: select TPM
: select MEMORY_MAPPED_TPM
: select MAINBOARD_HAS_LIBGFXINIT
: select GFX_GMA_PANEL_1_ON_LVDS
: select INTEL_GMA_HAVE_VBT
: select SERIRQ_CONTINUOUS_MODE
: s
> Please order the list alphabetically: […]
Done
File src/mainboard/lenovo/l420/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/75992/comment/226a3a7c_8776587e :
PS7, Line 68: # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) &
: # 3 (eSATA) & 4 (dock)
: register "sata_port_map" = "0x1f"
:
: # Set max SATA speed to 6.0 Gb/s
:
> Move these under the SATA controller
Done
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